Abstract: In various embodiments, a chip may include a substrate; a coating, the coating covering the substrate at least partially and the coating being designed for being stripped at least partially by means of laser ablation; wherein between the substrate and the coating, a laser detector layer is arranged at least partially, the laser detector layer being designed for generating a detector signal for ending the laser ablation.

Abstract: Semiconductor nano-devices, such as nano-probe and nano-knife devices, which are constructed using graphene films that are suspended between open cavities of a semiconductor structure. The suspended graphene films serve as electro-mechanical membranes that can be made very thin, from one or few atoms in thickness, to greatly improve the sensitivity and reliability of semiconductor nano-probe and nano-knife devices.

Abstract: Embodiments relate to a method of forming a graphene-based memory device. The method includes forming a forming a first graphene layer on an first insulator layer, and forming a second insulation layer on the first graphene layer. The method further includes forming a second graphene layer on the second insulation layer and forming an opening in the second insulation layer to expose a portion of the first graphene layer and a portion of the second graphene layer and to suspend the exposed portion of the second graphene layer in the opening.

Abstract: A semiconductor pressure sensor includes a cavity disposed in one silicon substrate of a SOI substrate having two silicon substrates bonded to each other with an oxide film therebetween and a diaphragm formed from the other silicon substrate and the oxide film, wherein the oxide film, bordering the cavity, of the diaphragm includes an arc-shaped section at the boundary portion to the one silicon substrate defining the inner wall side surface of the cavity, the arc-shaped section having the same width as the width of the cavity at a desired section in the one silicon substrate and reducing the width of the cavity from the boundary portion toward the diaphragm center.

Abstract: It is an object of the present invention to provide a micro-electro-mechanical-device having a microstructure and a semiconductor element over one surface. In particular, it is an object of the present invention to provide a method for simplifying the process of forming the microstructure and the semiconductor element over one surface. A space in which the microstructure is moved, that is, a movable space for the microstructure is formed by processsing an insulating layer which is formed in a process of forming the semiconductor element. The movable space can be formed by forming the insulating layer having a plurality of openings and making the openings face each other to be overlapped each other.

Abstract: A method of fabricating a micro-electrical-mechanical system (MEMS) transducer comprises the steps of forming a membrane (5) on a substrate (3), and forming a back-volume in the substrate. The step of forming a back-volume in the substrate comprises the steps of forming a first back-volume portion (7a) and a second back-volume portion (7b), the first back-volume portion (7a) being separated from the second back-volume portion (7b) by a step in a sidewall of the back-volume. The cross-sectional area of the second back-volume portion (7b) can be made greater than the cross-sectional area of the membrane (5), thereby enabling the back-volume to be increased without being constrained by the cross-sectional area of the membrane (5). The back-volume may comprise a third back-volume portion. The third back-volume portion enables the effective diameter of the membrane to be formed more accurately.

Abstract: A semiconductor device (10) comprising a bipolar transistor and a field effect transistor within a semiconductor body (1) comprising a projecting mesa (5) within which are at least a portion of a collector region (22d and 22e) and a base region (33d) of the bipolar transistor. The bipolar transistor is provided with a first insulating cavity (92) provided in the collector region (22d and 22e). The base region (33d) is narrower in the plane of the substrate than the collector region (22d and 22e) due to a second insulating cavity (94) provided around the base region (33d) and between the collector region (22d and 22e) and the emitter region (4). By blocking diffusion from the base region the first insulating cavity (92) provides a reduction in the base collector capacitance and can be described as defining the base contact.

Abstract: A metal mesh lid MEMS package includes a substrate, a MEMS electronic component coupled to the substrate, and a metal mesh lid coupled to the substrate with a lid adhesive. The metal mesh lid includes a polymeric lid body having a top port formed therein and a metal mesh cap coupled to the lid body. The metal mesh cap covers the top port and serves as both a particulate filter and a continuous conductive shield for EMI/RF interferences. Further, the metal mesh cap provides a locking feature for the lid adhesive to maximize the attach strength of the metal mesh lid to the substrate.

Abstract: A micromechanical structure which includes a substrate having a main plane of extension, and a seismic mass which is movable relative to the substrate. The micromechanical structure includes a fixed electrode which is connected to the substrate, and a counterelectrode which is connected to the seismic mass. The fixed electrode has a first fixed electrode region and a second fixed electrode region which is connected in an electrically conductive manner to the first fixed electrode region. The counterelectrode is partially situated between the first and the second fixed electrode region, perpendicular to the main plane of extension.

Abstract: A microelectromechanical system (MEMS) device and a method for fabricating the same are described. The MEMS device includes a first electrode and a second electrode. The first electrode is disposed on a substrate, and includes at least two metal layers, a first protection ring and a dielectric layer. The first protection ring connects two adjacent metal layers, so as to define an enclosed space between two adjacent metal layers. The dielectric layer is disposed in the enclosed space and connects two adjacent metal layers. The second electrode is disposed on the first electrode, wherein a cavity is formed between the first electrode and the second electrode.

Abstract: A micromechanical sensor apparatus has a movable gate and a field effect transistor. The field effect transistor has a drain region, a source region, an intermediate channel region with a first doping type, and a movable gate which is separated from the channel region by an intermediate space. The drain region, the source region, and the channel region are arranged in a substrate. A guard region is provided in the substrate at least on the longitudinal sides of the channel region and has a second doping type which is the same as the first doping type and has a higher doping concentration.

Abstract: A piezoelectric strain sensor and method thereof for detecting strain, vibration, and/or pressure. The sensor incorporates a sequence of piezoelectric and semiconductor layers in a thin-film transistor structure. The thin-film transistor structure can be configured on a flexible substrate via a low-cost fabrication technique. The piezoelectric layer generates an electric charge resulting in a modulation of a transistor current, which is a measure of external strain. The sensor can be formed as a single gate field-effect piezoelectric sensor and a dual gate field-effect piezoelectric sensor. The semiconductor layer can be configured from a nanowire array resulting in a metal-piezoelectric-nanowire field effect transistor. The single and dual gate field-effect piezoelectric sensor offer increased sensitivity and device control due to the presence of the piezoelectric layer in the transistor structure and low cost manufacturability on large area flexible substrates.

Abstract: Embodiments relate to a graphene-based memory device. The graphene-based memory device includes a first graphene layer and a second graphene layer. A first insulation layer is located between the first and second graphene layers. The first insulation layer has an opening between the first and second graphene layers, and the first graphene layer is configured to bend into the opening to contact the second graphene layer based on a first electrostatic force.

Abstract: A system that powers a wireless sensor mechanism from ambient sources without the need to replace a battery is disclosed. The present invention uses an energy harvesting mechanism built onto, for example, a substrate to recharge a rechargeable energy storage mechanism that is built on the same substrate. The energy storage mechanism provides power to a transmission/receiving mechanism and microprocessor that may also be arranged on said substrate. The energy-harvesting mechanism may be combined with a power management unit to enable efficient use and regulation of the harvested energy.

Abstract: A micro-electromechanical semiconductor component is provided with a semiconductor substrate, a reversibly deformable bending element made of semiconductor material, and at least one transistor that is sensitive to mechanical stresses. The transistor is designed as an integrated component in the bending element.

Abstract: Semiconductor devices are formed with a nano-electro-mechanical system (NEMS) logic or memory on a bulk substrate. Embodiments include forming source/drain regions directly on a bulk substrate, forming a fin connecting the source/drain regions, forming two gates, one on each side of the fin, the two gates being insulated from the bulk substrate, and forming a substrate gate in the bulk substrate. The fin is separated from each of the two gates and the substrate gate with an air gap.

Abstract: A sensor device includes a semiconductor chip. The semiconductor chip has a sensing region sensitive to mechanical loading. A pillar is mechanically coupled to the sensing region.

Abstract: A semiconductor structure with high breakdown voltage and high resistance and method for manufacturing the same. The semiconductor structure at least comprises a substrate having a first conductive type; a deep well having a second conductive type formed in the substrate; two first wells having the first conductive type and formed within the deep well; a second well having the first conductive type and formed between the two first wells within the deep well, and an implant dosage of the second well lighter than an implant dosage of each of the two first wells; and two first doping regions having the first conductive type and respectively formed within the two first wells.

Abstract: A compact MEMS motion sensor device is provided, including a CMOS substrate layer, with plural anchor posts having an isolation oxide layer surrounding a conductive layer. On one side of CMOS substrate layer, the device further includes a field oxide (FOX) layer, a first set and a second set of implant doped silicon areas, a first polysilicon layer, an oxide layer embedded with plural metal layers interleaved with via hole layers, a Nitride deposition layer, an under bump metal (UBM) layer and a plurality of solder spheres. On the other side of CMOS substrate layer, the present invention further includes a backside interconnect isolation oxide layer, a first MEMS bonding layer, a first metal compound layer, a second MEMS bonding layer, a MEMS layer, a first MEMS eutectic bonding layer, a second metal compound layer, a second MEMS eutectic bonding layer, and a MEMS cap layer.

Abstract: A semiconductor device (10) comprising a bipolar transistor and a field 5 effect transistor within a semiconductor body (1) comprising a projecting mesa (5) within which are at least a portion of a collector region (22c and 22d) and a base region (33c) of the bipolar transistor. The bipolar transistor is provided with an insulating cavity (92b) provided in the collector region (22c and 22d). The insulating cavity (92b) may be provided by providing a layer (33a) in the collector region (22c), creating an access path, for example by selectively etching polysilicon towards monocrystalline, and removing a portion of the layer (33a) to provide the cavity using the access path. The layer (33a) provided in the collector region may be of SiGe:C. By blocking diffusion from the base region the insulating cavity (92b) provides a reduction in the base collector capacitance and can be described as defining the base contact.

Abstract: An integrated MEMS device is provided, including, from bottom up, a bonding wafer layer, a bonding layer, an aluminum layer, a CMOS substrate layer defining a large back chamber area (LBCA), a small back chamber area (SBCA) and a sound damping path (SDP), a set of CMOS wells, a field oxide (FOX) layer, a set of CMOS transistor sources/drains, a first polysilicon layer forming CMOS transistor gates, a second polysilicon layer, said CMOS wells, said CMOS transistor sources/drains and said CMOS gates forming CMOS transistors, an oxide layer embedded with a plurality of metal layers interleaved with a plurality of via hole layers, and a gap control layer, an oxide layer, a first Nitride deposition layer, a metal deposition layer, a second Nitride deposition layer, an under bump metal (UBM) layer made of preferably Al/NiV/Cu and a plurality of solder spheres.

Abstract: A sensor element array and method of fabricating the same are provided. The sensor element array is disposed on a substrate and includes a first patterned conductive layer, a channel layer, a first insulation layer, a second patterned conductive layer, a second insulation layer, and a third patterned conductive layer. The first patterned conductive layer includes a sensing line, a first power line, a source/drain pattern and a branch pattern. The channel layer includes a first channel and a second channel. Margins of the first insulation layer and the second patterned conductive layer are substantially overlapped. The second patterned conductive layer includes a selecting line, a gate pattern, and a gate connecting pattern. The second insulation layer has a first connecting opening for exposing the gate connecting pattern. The third patterned conductive layer includes a sensing electrode electrically connected to the gate connecting pattern.

Abstract: This invention is an acoustic device protected by an acoustically transparent low water permeability encapsulant made from an acoustically clear polymer such as polyurethane. High aspect ratio clay nanoparticles are positioned in the substrate in overlapping layers with layers of the substrate interposed. The invention also provides a method for forming an acoustically transparent low permeability encapsulant about an acoustic device. The method includes treating high aspect ration clay nanoparticles to make them organophilic. The treated nanoparticles are then mixed in a polymer resin in such a way as to form an intercalated mixture. A curing agent is added to the mixture, and the mixture is allowed to set. When set the resulting intercalated mixture produces an acoustically clear, low permeability polymer coating.

Abstract: A transistor structure includes a first terminal region, a second terminal region and a channel region therebetween in a semiconductor substrate. Additionally, the transistor structure includes a control electrode associated with the channel region, the control electrode having a control electrode portion which is elastically deflectable under the action of a force and spaced apart from the channel region. The distance between the control electrode portion and the channel region is changed based on the action of force.

Abstract: A structure includes a silicon layer disposed on a buried oxide layer that is disposed on a substrate; at least one transistor device formed on or in the silicon layer, the at least one transistor having metallization; a released region of the silicon layer disposed over a cavity in the buried oxide layer; a back end of line (BEOL) dielectric film stack overlying the silicon layer and the at least one transistor device; a nitride layer overlying the BEOL dielectric film stack; a hard mask formed as a layer of hafnium oxide overlying the nitride layer; and an opening made through the layer of hafnium oxide, the layer of nitride and the BEOL dielectric film stack to expose the released region of the silicon layer disposed over the cavity in the buried oxide layer. The hard mask protects the underlying material during a MEMS/NEMS HF vapor release procedure.

Abstract: A device structure is made using a first conductive layer over a first wafer. An isolated conductive region is formed in the first conductive layer surrounded by a first opening in the conductive layer. A second wafer has a first insulating layer and a conductive substrate, wherein the conductive substrate has a first major surface adjacent to the first insulating layer. The insulating layer is attached to the isolated conductive region. The conductive substrate is thinned to form a second conductive layer. A second opening is formed through the second conductive layer and the first insulating layer to the isolated conductive region. The second opening is filled with a conductive plug wherein the conductive plug contacts the isolated conductive region. The second conductive region is etched to form a movable finger over the isolated conductive region. A portion of the insulating layer under the movable finger is removed.

Abstract: The present disclosure relates to a pressure sensor having a nanostructure and a method for manufacturing the same. More particularly, it relates to a pressure sensor having a nanostructure attached on the surface of the pressure sensor and thus having improved sensor response time and sensitivity and a method for manufacturing the same. The pressure sensor according to the present disclosure having a nanostructure includes: a substrate; a source electrode and a drain electrode arranged on the substrate with a predetermined spacing; a flexible sensor layer disposed on the source electrode and the drain electrode; and a nanostructure attached on the surface of the flexible sensor layer and having nanosized wrinkles.

Abstract: A micro structure and an electric circuit included in a micro electro mechanical device are manufactured over the same insulating surface in the same step. In the micro electro mechanical device, an electric circuit including a transistor and a micro structure are integrated over a substrate having an insulating surface. The micro structure includes a structural layer having the same stacked-layer structure as a layered product of a gate insulating layer of the transistor and a semiconductor layer provided over the gate insulating layer. That is, the structural layer includes layers formed of the same insulating film as the gate insulating layer and the same semiconductor film as the semiconductor layer of the transistor. Further, the micro structure is manufactured by using each of conductive layers used for a gate electrode, a source electrode, and a drain electrode of the transistor as a sacrificial layer.

Abstract: In a method for producing a micro-electromechanical device in a material substrate, component element defining the position of an electronic component and/or required for the function of the electronic component is selectively formed on the material substrate from an etching stop material acting as an etching stop in case of etching of the material substrate and/or in case of etching of a material layer disposed on the material substrate. When the component element of the electronic component is implemented, a bounding region is also formed on the material substrate along at least a partial section of an edge of the surface structure, wherein the bounding region bounds the partial section. The material substrate thus implemented is selectively etched for forming the surface structure, in that the edge of the bounding region defines the position of the surface structure to be implemented on the material substrate.

Abstract: A microelectronic device including a substrate, at least a semi-conductor element, an anti metal ion layer, a non-doping oxide layer and a MEMS structure is provided. The substrate has a CMOS circuit region and a MEMS region. The semi-conductor element is configured within the CMOS circuit region of the substrate. The anti metal ion layer is disposed within the CMOS circuit region of the substrate and covers the semi-conductor element. The non-doping oxide layer is disposed on the substrate within the MEMS region. The MEMS structure is partially suspended above the non-doping oxide layer. The present invention also provides a MEMS package structure and a fabricating method thereof.

Abstract: The present application discloses a semiconductor device and a method of manufacturing the same. Wherein, the semiconductor device comprises: a semiconductor substrate; a stressor embedded in the semiconductor substrate; a channel region disposed on the stressor; a gate stack disposed on the channel region; a source/drain region disposed on two sides of the channel region and embedded in the semiconductor substrate; wherein, surfaces of the stressor comprise a top wall, a bottom wall, and side walls, the side walls comprising a first side wall and a second side wall, the first side wall connecting the top wall and the second side wall, the second side wall connecting the first side wall and the bottom wall, the angle between the first side wall and the second side wall being less than 180°, and the first sidewall and the second side wall being roughly symmetrical with respect to a plane parallel to the semiconductor substrate.

Abstract: The present invention relates to integrating an inertial mechanical device on top of a CMOS substrate monolithically using IC-foundry compatible processes. The CMOS substrate is completed first using standard IC processes. A thick silicon layer is added on top of the CMOS. A subsequent patterning step defines a mechanical structure for inertial sensing. Finally, the mechanical device is encapsulated by a thick insulating layer at the wafer level. Comparing to the incumbent bulk or surface micromachined MEMS inertial sensors, the vertically monolithically integrated inertial sensors have smaller chip size, lower parasitics, higher sensitivity, lower power, and lower cost.

Abstract: A semiconductor substrate of a semiconductor device has a sensor region and an integrated circuit region, and a cavity is formed immediately under a surface layer portion of the sensor region. A capacitive acceleration sensor is formed on the sensor region by working a surface layer portion of the semiconductor substrate opposed to the cavity. The capacitive acceleration sensor includes an interdigital fixed electrode and an interdigital movable electrode. A CMIS transistor is formed on the integrated circuit region. The CMIS transistor includes a P-type well region and an N-type well region formed on the surface layer portion of the semiconductor substrate. A gate electrode is opposed to the respective ones of the P-type well region and the N-type well region through a gate insulating film formed on a surface of the semiconductor substrate.

Abstract: An acoustic wave biosensor comprises a plurality of spaced apart electrodes disposed on a substrate of piezoelectric material and having a biolayer matched to a specific type of autoinducer signaling molecule to be detected. The biolayer comprises a layer of heterobifunctional molecules disposed on the electrodes and on the piezoelectric material between the electrodes, and a plurality of bioreceptor molecules which bind exclusively with the specific type of autoinducer signaling molecule to be detected. The bioreceptor molecules are supported by the layer of heterobifunctional molecules, and a hydrogel layer surrounds the bioreceptor molecules to support a three-dimensional structure thereof. The bioreceptor molecules can bind with the specific type of autoinducer signaling molecule to be detected, and the biolayer is reactive thereto such that corresponding autoinducer signaling molecules bind to the biolayer and detectably vary acoustic characteristics of the acoustic wave biosensor.

Abstract: Provided is an acoustic sensor. The acoustic sensor includes: a substrate including sidewall portions and a bottom portion extending from a bottom of the sidewall portions; a lower electrode fixed at the substrate and including a concave portion and a convex portion, the concave portion including a first hole on a middle region of the bottom, the convex portion including a second hole on an edge region of the bottom; diaphragms facing the concave portion of the lower electrode, with a vibration space therebetween; diaphragm supporters provided on the lower electrode at a side of the diaphragm and having a top surface having the same height as the diaphragm; and an acoustic chamber provided in a space between the bottom portion and the sidewall portions below the lower electrode.

Abstract: The present disclosure provides one embodiment of a motion sensor structure. The motion sensor structure includes a first substrate having an integrated circuit formed thereon; a second substrate bonded to the first substrate from a first surface, wherein the second substrate includes a motion sensor formed thereon; and a third substrate bonded to a second surface of the second substrate, wherein the third substrate includes a recessed region aligned with the motion sensor.

Abstract: An piezoelectric electromechanical transistor has first and second terminals formed in a semiconductor region, a gate and a piezoelectric region between the gate and the semiconductor region. The piezoelectric region may be configured to drive the semiconductor region to vibrate in response to a signal applied to the gate. The transistor may be configured to produce a signal at the first terminal at least partially based on vibration of the semiconductor region.

Abstract: A touch panel includes a first substrate having a plurality of lower electrodes; a second substrate spaced a distance apart from the lower substrate and having a plurality of upper electrodes that correspond to the lower electrodes; a conductive rubber layer interposed between the lower electrodes and the upper electrodes; and a plurality of organic transistors interposed between the lower electrodes and the upper electrodes and to be connected to a top or bottom portion of the conductive rubber layer.

Abstract: In one embodiment, the invention provides a method for fabricating a microelectromechanical systems device. The method comprises fabricating a first layer comprising a film having a characteristic electromechanical response, and a characteristic optical response, wherein the characteristic optical response is desirable and the characteristic electromechanical response is undesirable; and modifying the characteristic electromechanical response of the first layer by at least reducing charge build up thereon during activation of the micro electromechanical systems device.

Abstract: A microelectromechanical system microphone package structure includes a base plate and a plurality of chips is provided. The plurality of chips are disposed on the base plate, wherein an active area of each of the chips is disposed with a microelectromechanical system microphone structure, each of the active areas comprises a normal line, and the normal lines of the chips are unparallel and nonorthogonal to each other.

Abstract: An efficient deposition process is provided for fabricating reliable RF MEMS capacitive switches with multilayer ultrananocrystalline (UNCD) films for more rapid recovery, charging and discharging that is effective for more than a billion cycles of operation. Significantly, the deposition process is compatible for integration with CMOS electronics and thereby can provide monolithically integrated RF MEMS capacitive switches for use with CMOS electronic devices, such as for insertion into phase array antennas for radars and other RF communication systems.

Abstract: A semiconductor device includes: a first substrate made of semiconductor and having first regions, which are insulated from each other and disposed in the first substrate; and a second substrate having electric conductivity and having second regions and insulation trenches. Each insulation trench penetrates the second substrate so that the second regions are insulated from each other. The first substrate provides a base substrate, and the second substrate provides a cap substrate. The second substrate is bonded to the first substrate so that a sealed space is provided between a predetermined surface region of the first substrate and the second substrate. The second regions include an extraction conductive region, which is coupled with a corresponding first region.

Abstract: The present invention relates to a CMOS compatible MEMS microphone, comprising: an SOI substrate, wherein a CMOS circuitry is accommodated on its silicon device layer; a microphone diaphragm formed with a part of the silicon device layer, wherein the microphone diaphragm is doped to become conductive; a microphone backplate including CMOS passivation layers with a metal layer sandwiched and a plurality of through holes, provided above the silicon device layer, wherein the plurality of through holes are formed in the portions thereof opposite to the microphone diaphragm, and the metal layer forms an electrode plate of the backplate; a plurality of dimples protruding from the lower surface of the microphone backplate opposite to the diaphragm; and an air gap, provided between the diaphragm and the microphone backplate, wherein a spacer forming a boundary of the air gap is provided outside of the diaphragm or on the edge of the diaphragm; wherein a back hole is formed to be open in substrate underneath the diaph

Abstract: The invention relates to a integrated circuit comprising an electronic circuit integrated on a substrate (5), and further comprising protections means for protection of the electronic circuit (25). The protection means comprise: i) a first strained encapsulation layer (10) being provided on a first side of the substrate (5), wherein the first strained encapsulation layer (10) has a strain (S1) in a direction parallel to the substrate (5), and ii) disabling means (20) arranged for at least partially disabling the electronic circuit (25) under control of a strain change in the substrate (5). The invention further relates to a method of manufacturing such integrated circuit, and to a system comprising such integrated circuit. Such system is selected from a group comprising: a bank-card, a smart-card, a contact-less card and an RFID.

Abstract: A bulk GaN layer is on a first surface of a substrate, wherein the bulk GaN layer has a GaN transistor region and a bulk acoustic wave (BAW) device region. A source/drain layer is over a first surface of the bulk GaN layer in the GaN transistor region. A gate electrode is formed over the source/drain layer. A first BAW electrode is formed over the first surface of the bulk GaN layer in the BAW device region. An opening is formed in a second surface of the substrate, opposite the first surface of the substrate, which extends through the substrate and exposes a second surface of the bulk GaN layer, opposite the first surface of the bulk GaN layer. A second BAW electrode is formed within the opening over the second surface of the bulk GaN layer.

Abstract: A method of forming CMOS circuitry integrated with MEMS devices includes bonding a wafer to a top surface layer having contacts formed to CMOS circuitry. A handle wafer is then removed from one of the top or bottom surfaces of the CMOS circuitry, and MEMS devices are formed in a remaining silicon layer.

Abstract: This invention provides a technique whereby, even if a step is produced by splitting a lower electrode into component elements, resistance increase of an upper electrode, damage to a membrane and decrease of dielectric strength between an upper electrode and the lower electrode, are reduced. In an ultrasonic transducer comprising plural lower electrodes, an insulation film covering the lower electrodes, plural hollow parts formed to overlap the lower electrodes on the insulation film, an insulation film filling the gaps among the hollow parts, an insulation film covering the hollow parts and insulation film, plural upper electrodes formed to overlap the hollow parts on the insulation film and plural interconnections joining them, the surfaces of the hollow parts and insulation film are flattened to the same height.

Abstract: A field effect transistor comprises an electrostatically moveable gate electrode. The moveable gate is supported by at least two posts, and the source, drain, and channel of the transistor are centrally located under the moveable layer. At least one electrode is positioned on at least two sides of the source, drain, and channel.

Abstract: Embodiments of embedded MEMS sensors and related methods are described herein. Other embodiments and related methods are also disclosed herein.

Abstract: The present invention relates to integrating an inertial mechanical device on top of a CMOS substrate monolithically using IC-foundry compatible processes. The CMOS substrate is completed first using standard IC processes. A thick silicon layer is added on top of the CMOS. A subsequent patterning step defines a mechanical structure for inertial sensing. Finally, the mechanical device is encapsulated by a thick insulating layer at the wafer level. Comparing to the incumbent bulk or surface micromachined MEMS inertial sensors, the vertically monolithically integrated inertial sensors have smaller chip size, lower parasitics, higher sensitivity, lower power, and lower cost.