Abstract: An integrated device, the device including: a first level including a first mono-crystal layer, the first mono-crystal layer including a plurality of single crystal transistors; an overlying oxide disposed on top of the first level; a second level including a second mono-crystal layer, the second level overlaying the oxide, where the second mono-crystal layer includes a plurality of image sensors, where the second level is bonded to the first level, where the bonded includes an oxide to oxide bond; and a plurality of pixel control circuits, where each of the plurality of image sensors is directly connected to at least one of the plurality of pixel control circuits, and where the integrated device includes a plurality of memory circuits.

Abstract: An Ethernet switch and a switch microcontroller or CPU are integrated onto a system-on-a-chip (SoC). The Ethernet switch remains independently operating at full speed even though the remainder of the SoC is being reset or is otherwise nonoperational. The Ethernet switch is on a separated power and clock domain from the remainder of the integrated SoC. A warm reset signal is trapped by control microcontroller (MCU) to allow the switch CPU to isolate the Ethernet switch and save state. When the Ethernet switch is isolated and operating independently, the warm reset request is provided to the other entities on the integrated SoC. When warm reset is completed, the state is restored and the various DMA and flow settings redeveloped in the integrated SoC to allow return to normal operating condition.

Abstract: An imaging device includes a first semiconductor element including at least one bump pad that has a concave shape. The at least one bump pad includes a first metal layer and a second metal layer on the first metal layer. The imaging device includes a second semiconductor element including at least one electrode. The imaging device includes a microbump electrically connecting the at least one bump pad to the at least one electrode. The microbump includes a diffused portion of the second metal layer, and first semiconductor element or the second semiconductor element includes a pixel unit.

Abstract: A photon counting device includes a plurality of pixels each including a photoelectric conversion element configured to convert input light to charge, and an amplifier configured to amplify the charge converted by the photoelectric conversion element and convert the charge to a voltage, an A/D converter configured to convert the voltage output from the amplifier of each of the plurality of pixels to a digital value and output the digital value, a correction unit configured to correct the digital value output from the A/D converter so that an influence of a variation in a gain and an offset value among the plurality of pixels is curbed, a calculation unit configured to output a summed value obtained by summing the corrected digital values corresponding to at least two pixels, and a conversion unit configured to convert the summed value output from the calculation unit to a number of photons.

Abstract: A photon counting device includes a plurality of pixels each including a photoelectric conversion element configured to convert input light to charge, and an amplifier configured to amplify the charge converted by the photoelectric conversion element and convert the charge to a voltage, an A/D converter configured to convert the voltage output from the amplifier of each of the plurality of pixels to a digital value and output the digital value, a correction unit configured to correct the digital value output from the A/D converter so that an influence of a variation in a gain and an offset value among the plurality of pixels is curbed, a calculation unit configured to output a summed value obtained by summing the corrected digital values corresponding to at least two pixels, and a conversion unit configured to convert the summed value output from the calculation unit to a number of photons.

Abstract: A solid-state imaging element of a pixel sharing type with improved driving of transistors is disclosed. A first electric charge accumulating section and a second electric charge accumulating section are arranged in a predetermined direction. A first transfer section transfers electric charge from first photoelectric conversion elements to the first electric charge accumulating section, causing it to accumulate the electric charge. A second transfer section transfers electric charge from second photoelectric conversion elements to the second electric charge accumulating section, causing it to accumulate the electric charge. A first transistor is configured to output a signal corresponding to an amount of the electric charge accumulated in each of the first electric charge accumulating section and the second electric charge accumulating section. A second transistor is arranged with the first transistor in the predetermined direction and connected in parallel to the first transistor.

Abstract: A system for authorizing a mobile identity information controlled device includes a mobile identity information controlled device, an identity system device, and/or an enabling device. At least one digital representation of a biometric is received using a biometric reader device. Identity information is obtained from an identity system device using the at least one digital representation of the biometric. Operation of the mobile identity information controlled device is controlled using the identity information. In some examples, the operation may subsequently be deauthorized if the at least one digital representation of the biometric and/or the identity information is not reobtained.

Abstract: A photon counting device includes a plurality of pixels each including a photoelectric conversion element configured to convert input light to charge, and an amplifier configured to amplify the charge converted by the photoelectric conversion element and convert the charge to a voltage, an A/D converter configured to convert the voltage output from the amplifier of each of the plurality of pixels to a digital value and output the digital value, a correction unit configured to correct the digital value output from the A/D converter so that an influence of a variation in a gain and an offset value among the plurality of pixels is curbed, a calculation unit configured to output a summed value obtained by summing the corrected digital values corresponding to at least two pixels, and a conversion unit configured to convert the summed value output from the calculation unit to a number of photons.

Abstract: A 3D micro display, the 3D micro display including: a first level including a first single crystal layer, the first single crystal layer includes a plurality of LED driving circuits; a second level including a first plurality of light emitting diodes (LEDs), the first plurality of LEDs including a second single crystal layer; a third level including a second plurality of light emitting diodes (LEDs), the second plurality of LEDs including a third single crystal layer, where the first level is disposed on top of the second level, where the second level includes at least ten individual first LED pixels; and a bonding structure, where the bonding structure includes oxide to oxide bonding.

Abstract: A method of manufacturing a semiconductor device, includes forming a trench in a semiconductor substrate having a first face and a second face by processing the first face of the semiconductor substrate, the trench including a first portion and a second portion located between the first portion and a plane including a first face, filling an insulator in the second portion such that a space remains in the first portion and the trench is closed, and forming a plurality of elements between the first face and the second face, wherein the space and the insulator form element isolation.

Abstract: A semiconductor structure includes a sensor chip. The sensor chip includes a pixel array region, a bonding pad region, and a periphery region surrounding the pixel array region. The semiconductor structure further includes a stress-releasing trench, wherein the stress-releasing trench is in the periphery region, and the stress-releasing trench fully surrounds a perimeter of the pixel array region and the bonding pad region.

Abstract: A photoelectric conversion device includes a photoelectric conversion unit that generates signal charge of a first polarity and a charge conversion circuit that converts the signal charge into a signal voltage. The photoelectric conversion unit includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type that are provided in a surface side of a semiconductor substrate, a third semiconductor region of the first conductivity type provided at a first depth, a fourth semiconductor region of the second conductivity type provided at a second depth and overlaps the second semiconductor region in a plan view, and a fifth semiconductor region of the first conductivity type provided at a third depth, and the third semiconductor region and the fifth semiconductor region overlap the first semiconductor region, the second semiconductor region, and the fourth semiconductor region in the plan view.

Abstract: An imaging element includes a photoelectric conversion unit formed by laminating a first electrode 21, a photoelectric conversion layer 23A, and a second electrode 22. Between the first electrode 21 and the photoelectric conversion layer 23A, a first semiconductor material layer 23B1 and a second semiconductor material layer 23B2 are formed from the first electrode side, and the second semiconductor material layer 23B2 is in contact with the photoelectric conversion layer 23A. The photoelectric conversion unit further includes an insulating layer 82 and a charge accumulation electrode 24 disposed apart from the first electrode 21 so as to face the first semiconductor material layer 23B1 via the insulating layer 82. When the carrier mobility of the first semiconductor material layer 23B1 is represented by ?1, and the carrier mobility of the second semiconductor material layer 23B2 is represented by ?2, ?2<?1 is satisfied.

Abstract: In some embodiments, the present disclosure relates to a device having a semiconductor substrate including a frontside and a backside. On the frontside of the semiconductor substrate are a first source/drain region and a second source/drain region. A gate electrode is arranged on the frontside of the semiconductor substrate and includes a horizontal portion, a first vertical portion, and a second vertical portion. The horizontal portion is arranged over the frontside of the semiconductor substrate and between the first and second source/drain regions. The first vertical portion extends from the frontside towards the backside of the semiconductor substrate and contacts the horizontal portion of the gate electrode structure. The second vertical portion extends from the frontside towards the backside of the semiconductor substrate, contacts the horizontal portion of the gate electrode structure, and is separated from the first vertical portion by a channel region of the substrate.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to stacked gate transistors and methods of manufacture. The structure includes a stacked gate structure having a plurality of transistors with at least one floating node and at least one node to either ground or a supply voltage, and a contact to either of the ground or supply voltage and the at least one floating node being devoid of any contact.

Abstract: A 3D micro display, the 3D micro display including: a first level including a first single crystal layer, the first single crystal layer includes at least one LED driving circuit; a second level including a first plurality of light emitting diodes (LEDs), the first plurality of LEDs including a second single crystal layer, where the second level is disposed on top of the first level, where the second level includes at least ten individual first LED pixels; and a bonding structure, where the bonding structure includes oxide to oxide bonding.

Abstract: Providing a solid-state imaging element capable of improving image quality. Provided is a solid-state imaging element at least including: a first electrode, a second electrode, a third electrode, a first photoelectric conversion unit, a second photoelectric conversion unit, a first insulation layer, a second insulation layer, and an optical waveguide. The second electrode, the first photoelectric conversion unit, and the first electrode are disposed in this order. The third electrode is provided away from the first electrode, and faces the first photoelectric conversion unit through the first insulation layer. The second insulation layer is provided between the third electrode and the second photoelectric conversion unit. The optical waveguide is provided between the third electrode and the second photoelectric conversion unit.

Abstract: A solid-state imaging device includes a pixel array unit in which a plurality of imaging pixels configured to generate an image, and a plurality of phase difference detection pixels configured to perform phase difference detection are arranged, each of the plurality of phase difference detection pixels including a plurality of photoelectric conversion units, a plurality of floating diffusions configured to convert charges stored in the plurality of photoelectric conversion units into voltage, and a plurality of amplification transistors configured to amplify the converted voltage in the plurality of floating diffusions.

Abstract: Embodiments of the present application disclose an optical image capturing unit, an optical image capturing system, and an electronic device. The optical image capturing unit includes: a micro lens; a light shielding layer disposed under the micro lens, where the light shielding layer is provided with a window; and a photosensor disposed under the light shielding layer, where the micro lens is configured to converge an optical signal from above the micro lens to the window, and the optical signal is transmitted to the photosensor via the window. Technical solutions of embodiments of the present application could enhance performance of an optical image capturing product.

Abstract: A display device includes a thin film transistor on a base substrate and a signal wiring electrically connected to the thin film transistor. The signal wiring includes a main conductive layer including copper, and a capping layer including titanium the capping layer overlapping a portion of an upper surface of the main conductive layer. The signal wiring has a taper angle in a range of about 70° to about 90°. A thickness of the capping layer is in a range of about 100 ? to about 300 ?, and a thickness of the main conductive layer is in a range of about 1,000 ? to about 20,000 ?.

Abstract: A display apparatus that includes a substrate, a first thin-film transistor and a second, thin-film transistor disposed on the substrate at different distances from a top surface of the substrate. A display device is electrically connected to the first thin-film transistor. The first thin-film transistor includes a first semiconductor layer in polycrystalline silicon and a first gate electrode that overlaps a channel region of the first semiconductor layer in a direction of a thickness of the substrate. The second thin-film transistor includes a second semiconductor layer including an oxide semiconductor. The first gate electrode has a stacked structure including a first layer and a second layer. The second layer includes titanium and the first layer includes a different material from the second layer.

Abstract: A 3D micro display, the 3D micro display including: a first single crystal layer including a first plurality of light emitting diodes (LEDs); a second single crystal layer including a second plurality of light emitting diodes (LEDs), where the first single crystal layer includes at least ten individual first LED pixels, where the second single crystal layer includes at least ten individual second LED pixels, where the first plurality of light emitting diodes (LEDs) emits a first light with a first wavelength, where the second plurality of light emitting diodes (LEDs) emits a second light with a second wavelength, where the first wavelength and the second wavelength differ by greater than 10 nm; and further including a third single crystal layer including at least one LED driving circuit.

Abstract: An apparatus for mitigating contamination of an optical device comprises an open-topped, closed-sided, and closed-bottomed housing cup partially defining a protected volume to enclose the optical device. A housing cap encloses a top of the housing cup and partially defines the protected volume. The housing cap includes a top collar having an open central aperture. A top cover laterally spans the central aperture of the top collar. An interface structure circumscribes the top cover to suspend the top cover downwardly into the housing cup from the top collar. The interface structure prevents direct contact between the top cover and the top collar.

Abstract: A semiconductor device having a first semiconductor section including a first wiring layer at one side thereof; a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together with the respective first and second wiring layer sides of the first and second semiconductor sections facing each other; a conductive material extending through the first semiconductor section to the second wiring layer of the second semiconductor section and by means of which the first and second wiring layers are in electrical communication; and an opening, other than the opening for the conductive material, which extends through the first semiconductor section to the second wiring layer.

Abstract: Disclosed is a display apparatus including a transistor substrate including an emission part overlapping a plurality of organic light emitting devices and a peripheral part surrounding the emission part, a plurality of color filters disposed to respectively correspond to the plurality of organic light emitting devices at the emission part, and a plurality of spacer members spaced apart from one another and disposed to surround the plurality of organic light emitting devices at the peripheral part. Accordingly, the display apparatus is protected from an external impact, and heat transferred to the inside of the display apparatus is easily dissipated to the outside.

Abstract: A refractory metal-containing etch stop layer, a ruthenium etch stop layer, and a conductive material layer can be sequentially formed over an electrode layer and a selector material layer. A sequence of anisotropic etch processes can be employed to etch the conductive material layer selective to the ruthenium etch stop layer, to etch the ruthenium etch stop layer selective to the refractory metal-containing etch stop layer, and to etch the refractory metal-containing etch stop layer within minimal overetch into the electrode layer. The selector material layer can be subsequently anisotropically etched without exposure to the plasma of etchant gases for etching the refractory metal-containing etch stop layer and the conductive material layer, which may include a fluorine-containing plasma that can damage the selector material.

Abstract: An embodiment includes a plurality of pixels each including a light receiving unit that outputs a pulse in response to incidence of a photon, and a signal generation unit that generates a signal in accordance with the number of pulses output from the light receiving unit, wherein the plurality of pixels includes a first pixel in which an upper limit value of a signal generated by the signal generation unit is a first value and a second pixel in which an upper limit value of a signal generated by the signal generation unit is a second value that is smaller than the first value.

Abstract: The image sensing device includes a pixel array including a plurality of unit pixels arranged in columns and rows. Each unit pixel includes a photoelectric conversion element, circulation gates, transfer gates, and drain nodes. The photoelectric conversion element generates photocharges by performing photoelectric conversion of incident light. The circulation gates are located at sides of the photoelectric conversion element, receive circulation control signals and move the photocharges within the photoelectric conversion element in a predetermined direction based on the circulation control signals. The transfer gates are respectively located between two adjacent circulation gates, receive a transfer control signal and transmit the photocharges to a floating diffusion region based on the transfer control signal. The drain nodes are located at sides of the circulation gates that are opposite to the photoelectric conversion element, and receive a drain voltage.

Abstract: A method includes forming a light-sensitive element in a substrate. The substrate is doped with a first dopant to form a pinning region over a first portion of the light-sensitive element. A second portion of the light-sensitive element is surrounded by the pinning region. A first contact is formed in contact with the second portion of the light-sensitive element, and a second contact is formed over the pinning region.

Abstract: An imaging device including: a photoelectric converter that generates a signal charge by photoelectric conversion of light; a semiconductor substrate that includes a first semiconductor layer containing an impurity of a first conductivity type and an impurity of a second conductivity type different from the first conductivity type; and a first transistor that includes, as a source or a drain, a first impurity region of the second conductivity type in the first semiconductor layer. The first semiconductor layer includes: a charge accumulation region that is an impurity region of the second conductivity type, the charge accumulation region being configured to accumulate the signal charge; and a blocking structure that is located between the charge accumulation region and the first transistor, and the blocking structure includes a second impurity region of the second conductivity type.

Abstract: A semiconductor device includes a pixel array comprising a first pixel and a second pixel. The semiconductor device includes a metal structure overlying a portion of a substrate between the first pixel and the second pixel. The semiconductor device includes a first barrier layer adjacent a sidewall of the metal structure. The semiconductor device includes a passivation layer adjacent a sidewall of the first barrier layer. The first barrier layer is between the passivation layer and the metal structure.

Abstract: A color filter is disposed on a substrate. An organic photodiode is disposed on the color filter. The organic photodiode includes an electrode insulating layer having a recess region on the substrate, a first electrode on the color filter, the first electrode filling the recess region of the electrode insulating layer, a second electrode on the first electrode, and an organic photoelectric conversion layer interposed between the first electrode and the second electrode. The first electrode includes a seam extending at a first angle from a side surface of the recess region of the electrode insulating layer.

Abstract: An image sensor includes a photosensitive sensor, a floating diffusion node, a reset transistor, and a source follower transistor. The reset transistor comprises a first source/drain coupled to the floating diffusion node and a second source/drain coupled to a first voltage source. The source follower transistor comprises a gate coupled to the floating diffusion node and a first source/drain coupled to the second source/drain of the reset transistor. A first elongated contact contacts the second source/drain of the reset transistor and the first source/drain of the source follower transistor. The first elongated contact has a first dimension in a horizontal cross-section and a second dimension in the horizontal cross-section. The second dimension is perpendicular to the first dimension, and the second dimension is less than the first dimension.

Abstract: A display panel and a display device are provided. The display panel includes a substrate. The substrate includes a display area in the middle of the substrate and a wiring area around the display area. A refractive device is disposed on the front side of the substrate to refract light from the display area and the wiring area and so partially or totally prevent the wiring area from being seen.

Abstract: A 3D micro display, the 3D micro display including: a first single crystal layer including a first plurality of light emitting diodes (LEDs), a second single crystal layer including a second plurality of light emitting diodes (LEDs), where the first single crystal layer includes at least ten individual first LED pixels, where the second single crystal layer includes at least ten individual second LED pixels, where the first plurality of light emitting diodes (LEDs) emits a first light with a first wavelength, where the second plurality of light emitting diodes (LEDs) emits a second light with a second wavelength, where the first wavelength and the second wavelength differ by greater than 10 nm, and where the 3D micro display includes an oxide to oxide bonding structure.

Abstract: A first solid-state imaging element according to an embodiment of the present disclosure includes a bottom-electrode; a top-electrode opposed to the bottom-electrode; a photoelectric conversion layer provided between the bottom-electrode and the top-electrode and including a first organic semiconductor material; and an—upper inter-layer provided between the top-electrode and the photoelectric conversion layer, and including a second organic semiconductor material having a halogen atom in a molecule at a concentration in a range from 0 volume % or more to less than 0.05 volume %.

Abstract: [Object] To achieve a radiation detector capable of suppressing variation in the amount of radiation detected. [Solution] A first gate electrode (52) is connected to a light receiving device, and a second gate electrode (53) is configured to have the same potential as that of the first gate electrode (52).

Abstract: The present embodiment relates to a distance sensor that reduces a difference in amounts of current injected into each of plural charge collection regions prepared for one photosensitive region in order to avoid saturation caused by disturbance light. A current injection circuit injecting current into each charge collection region includes a voltage generation circuit generating a control voltage for adjustment of the injected current amount, and the voltage generation circuit generates the control voltage corresponding to a large amount of charge between the charge amounts of storage nodes coupled, respectively, to the charge collection regions. Meanwhile, a cascode device is disposed between a transistor configured to adjust the amount of current according to the control voltage and the storage node, and a potential of a current output end of the transistor and a potential of the storage node are separated.

Abstract: Image sensor includes a first semiconductor material and a plurality of first doped regions disposed in the semiconductor material. The plurality of first doped regions is part of a plurality of photodiodes to receive light and convert the light into image charge. A second semiconductor material is disposed on the first semiconductor material, and a plurality of second doped regions is disposed in the second semiconductor. The plurality of second doped regions is electrically coupled to the plurality of first doped regions, and the plurality of second doped regions is part of the plurality of photodiodes.

Abstract: An image capturing device is provided. The device includes a substrate comprising a pixel region, a peripheral region and a trench region, in which trenches are formed, between the pixel region and the peripheral region. The plurality of trenches include first trenches arranged to be spaced apart from each other in a first direction along a first side of an outer edge of the pixel region and second trenches arranged to be spaced apart from each other in the first direction. The first and second trenches are arranged to be spaced apart from each other in a second direction crossing the first direction. The first and second trenches are arranged so that, any straight line path which connects, without overlapping any one of the first and second trenches, the first side and the peripheral region, does not exist.

Abstract: An interconnection structure includes a first interlayer dielectric layer, a first conductive line, a protection layer, a second interlayer dielectric layer, and a connection plug. The first conductive line is partially disposed in the first interlayer dielectric layer. The protection layer is disposed on the first conductive line and the first interlayer dielectric layer. The protection layer covers a top surface and a sidewall of the first conductive line. The protection layer includes a recess disposed corresponding to the first conductive line in a vertical direction. The second interlayer dielectric layer is disposed on the protection layer. The connection plug penetrates at least a part of the second interlayer dielectric layer and the protection layer for being connected with the first conductive line.

Abstract: An image-forming element includes a plurality of pixels, and projects and displays light emitted from the pixels. The image-forming element includes a light emitting element which includes a light source emitting the light and a mounting substrate on which a plurality of light emitting elements are provided on a mounting surface. A plurality of light sources which are segmented and included in at least one pixel are provided, and each of the light sources includes power supply electrodes provided on the same surface or a surface facing the mounting substrate. The mounting substrate includes a drive circuit which drives the light source and electrodes which are provided on the mounting surface and are electrically connected to the power supply electrodes of the light source. In each pixel, an area occupation ratio of the light source with respect to a region area of the pixel is 15% or more and 85% or less.

Abstract: A photoelectric conversion apparatus includes, a semiconductor substrate having a photoelectric conversion unit performing photoelectric conversion on entering light and accumulating first electric charges, a first transistor electrically connected to the photoelectric conversion unit and having a first gate on a second surface, and a second transistor having a second gate shorter than the first gate on the second surface, a first fixed charge film continuously provided directly or with an insulating film in between in an area overlapping the photoelectric conversion unit on a first surface and the second transistor, the first fixed charge film having fixed charges of the first polarity, and a second fixed charge film provided directly or with an insulating film in between in an area overlapping the second transistor and the first fixed charge film, the second fixed charge film having fixed charges of a second polarity.

Abstract: A semiconductor device and method for forming the semiconductor device are provided. In some embodiments, a semiconductor substrate comprises a device region. An isolation structure extends laterally in a closed path to demarcate the device region. A first source/drain region and a second source/drain region are in the device region and laterally spaced. A sidewall of the first source/drain region directly contacts the isolation structure at a first isolation structure sidewall, and remaining sidewalls of the first source/drain region are spaced from the isolation structure. A selectively-conductive channel is in the device region, and extends laterally from the first source/drain region to the second source/drain region. A plate comprises a central portion and a first peripheral portion. The central portion overlies the selectively-conductive channel, and the first peripheral portion protrudes from the central portion towards the first isolation structure sidewall.

Abstract: The present technology relates to an imaging element and an electronic device capable of improving sensitivity to infrared light in a back side irradiation imaging element. An imaging element is provided with a semiconductor substrate on which a photoelectric converting unit is formed, a wiring layer arranged on a side opposite to a light receiving surface of the semiconductor substrate, and provided with a wire and a reflective film, and an insulating film stacked between the semiconductor substrate and the wiring layer, in which the reflective film is arranged between the insulating film and the wire and overlaps with at least a part of the photoelectric converting unit of each pixel in a first direction in which the semiconductor substrate and the wiring layer are stacked, and a first interlayer film between the insulating film and the reflective film is thicker than the insulating film. The present technology is applicable to a back side irradiation CMOS image sensor, for example.

Abstract: A solid-state imaging device includes: a first semiconductor substrate including a photoelectric conversion element; and a second semiconductor substrate including at least a part of a peripheral circuit arranged in a main face of the second semiconductor substrate, the peripheral circuit generating a signal based on the charge of the photoelectric conversion element, a main face of the first semiconductor substrate and the main face of the second semiconductor substrate being opposed to each other with sandwiching a wiring structure therebetween; a pad to be connected to an external terminal; and a protection circuit electrically connected to the pad and to the peripheral circuit, wherein the protection circuit is arranged in the main face of the second semiconductor substrate.

Abstract: A solid-state imaging device includes a first-conductivity-type semiconductor well region, a plurality of pixels each of which is formed on the semiconductor well region and is composed of a photoelectric conversion portion and a pixel transistor, an element isolation region provided between the pixels and in the pixels, and an element isolation region being free from an insulation film and being provided between desired pixel transistors.

Abstract: A multi-level semiconductor device, the device including: a first level including integrated circuits; a second level including a structure designed to conduct electromagnetic waves in a confined manner, where the second level is disposed above the first level, where the first level includes crystalline silicon, where the second level includes crystalline silicon; and an oxide layer disposed between the first level and the second level, where the second level is bonded to the oxide layer, and where the bonded includes oxide to oxide bonds.

Abstract: Disclosed is a light receiving element including an on-chip lens, a wiring layer, and a semiconductor layer disposed between the on-chip lens and the wiring layer. The semiconductor layer includes a photodiode, a first transfer transistor that transfers electric charge generated in the photodiode to a first charge storage portion, a second transfer transistor that transfers electric charge generated in the photodiode to a second charge storage portion, and an interpixel separation portion that separates the semiconductor layers of adjacent pixels from each other, for at least part of the semiconductor layer in the depth direction. The wiring layer has at least one layer including a light blocking member. The light blocking member is disposed to overlap with the photodiode in a plan view.

Abstract: A clamp circuit can control a clamp transistor such that a change in a photodiode current detection voltage signal in an optical receiver circuit can control the clamp transistor to change state when a difference of a clamp voltage and the photodiode current detection voltage signal exceeds a threshold voltage of the clamp transistor. Using a feedback loop, the clamp circuit can accurately clamp a current when the photodiode current is larger than a detect current threshold.