Abstract: An image sensor includes an array of CMOS pixels and a plurality of micro-lens arrays. Each micro-lens array of the plurality of micro-lens arrays includes a plurality of horizontally adjacent micro-lenses. Each micro-lens array of the plurality of micro-lens arrays is situated above a respective CMOS pixel in the array of CMOS pixels.

Abstract: The present disclosure relates to a solid-state imaging device, a method for manufacturing the same, and an electronic apparatus capable of improving sensitivity while suppressing degradation of color mixture. The solid-state imaging device includes an anti-reflection portion having a moth-eye structure provided on a boundary surface on a light-receiving surface side of a photoelectric conversion region of each pixel arranged two-dimensionally, and an inter-pixel light-blocking portion provided below the boundary surface of the anti-reflection portion to block incident light. In addition, the photoelectric conversion region is a semiconductor region, and the inter-pixel light-blocking portion has a trench structure obtained by digging the semiconductor region in a depth direction at a pixel boundary. The techniques according to the present disclosure can be applied to, for example, a solid-state imaging device of a rear surface irradiation type.

Abstract: A single photon avalanche diode (SPAT) image sensor is disclosed. The SPAT) image sensor include: a substrate of a first conductivity type, the substrate having a front surface and a back surface; a deep trench isolation (DTI) extending from the front surface toward the back surface of the substrate, the DTI having a first surface and a second surface opposite to the first surface, the first surface being level with the front surface of the substrate; an epitaxial layer of a second conductivity type opposite to the first conductivity type, the epitaxial layer surrounding sidewalls and the second surface of the DTI; and an implant region of the first conductivity type extending from the front surface to the back surface of the substrate. An associated method for fabricating the SPAD image sensor is also disclosed.

Abstract: A photodetector sensor array device as usable for camera chips comprises upper and lower contact layers of n+ and p+ semiconductor material either side of a light absorbing region made of either one layer, or two oppositely doped layers, of semiconductor material. Insulating trenches of dielectric material extending through the layers to form the individual pixels. Respective contacts are connected to the upper and lower contact layers so that each pixel can be reverse biased or forward biased. In operation, the device is reset with a reverse bias, and then switched to forward bias for sensing. After switching, carriers generated in response to photon absorption accumulate in potential wells in the light absorbing region and so reduce the potential barriers to the contact layers, which causes current to start to flow between the contacts after a time delay which is inversely proportional to the incident light intensity.

Abstract: A system includes a pixel having a diffusion layer within a cap layer. The diffusion layer defines a front side and an illumination side opposite the front side with an absorption layer operatively connected to the illumination side as well as the diffusion and cap layers. A set of alternating oxide and nitride layers are deposited on the front side of the cap and diffusion layers.

Abstract: A method for manufacturing a light-emitting element includes exposing a portion of an insulating layer from under a metal layer and a semiconductor layer by removing, through an opening of a resist layer, a portion of the metal layer and a portion of the semiconductor layer by wet etching using a first etchant, etching rates of the first etchant for the metal layer and the semiconductor layer each being higher than an etching rate of the first etchant for the insulating layer; removing the resist layer by wet etching after the removing of the metal layer portion and the semiconductor layer portion; and after the removing of the resist layer, removing a remaining portion of the metal layer while causing the insulating layer exposed from under the metal layer and the semiconductor layer to remain. The opening of the resist layer is positioned directly on the conductive layer.

Abstract: An imaging device includes a first substrate including a pixel array and a first multilayer wiring layer. The first multilayer wiring layer includes a first wiring that receives electrical signals based on electric charge generated by at least one photoelectric conversion unit, and a plurality of second wirings. The imaging device includes a second substrate including a second multilayer wiring layer and a logic circuit that processes the electrical signals. The second multilayer wiring layer includes a third wiring bonded to the first wiring, and a plurality of fourth wirings. At least one of the plurality of fourth wirings being bonded to at least one of the plurality of second wirings. The second multilayer wiring layer includes at least one fifth wiring that is connected to the plurality of fourth wirings and that receives a power supply signal.

Abstract: A single photon avalanche diode (SPAD) image sensor is disclosed. The SPAD image sensor includes: a substrate having a front surface and a back surface; wherein the substrate includes a sensing region, and the sensing region includes: a common node heavily doped with dopants of a first conductivity type, the common node being within the substrate and abutting the back surface of the substrate; a sensing node heavily doped with dopants of a second conductivity type opposite to the first conductivity type, the sensing node being within the substrate and abutting the front surface of the substrate; and a first layer doped with dopants of the first conductivity type between the common node and the sensing node.

Abstract: Isolators and methods for operating the same are described for opto-isolators with improved common mode transient immunity (CMTI). In some embodiments, a pair of photodetectors are provided in the opto-isolator and configured to generate photocurrents of opposite signs or directions in response to a light signal. Photocurrents from the pair of photodetectors are combined in a differential manner to represent data transmitted in a light signal, while common mode transient noise at the two photodetectors is attenuated or eliminated.

Abstract: A fast-rate thermoelectric device control system includes a fast-rate thermoelectric device, a sensor, and a controller. The fast-rate thermoelectric device includes a thermoelectric actuator array disposed on a wafer, and the thermoelectric actuator array includes a thin-film thermoelectric (TFTE) actuator that generates a heating and/or a cooling effect in response to an electrical current. The sensor is configured to measure a temperature associated with the heating or cooling effect and output a feedback signal indicative of the measured temperature. The controller is in communication with the fast-rate thermoelectric device and the sensor, and is configured to control the electrical current based on the feedback signal.

Abstract: A range sensor includes a silicon substrate and a transfer electrode. The silicon substrate includes a first principal surface and a second principal surface opposing each other. The silicon substrate is provided with a charge generation region configured to generate a charge in response to incident light and a charge collection region configured to collect charges from the charge generation region, on the first principal surface side. The transfer electrode is disposed between the charge generation region and the charge collection region on the first principal surface. A region of the second principal surface corresponding at least to the charge generation region is formed with a plurality of protrusions. The plurality of protrusions includes a slope inclined with respect to a thickness direction of the silicon substrate. A (111) plane of the silicon substrate is exposed as the slope at the protrusion. A height of the protrusion is 200 nm or more.

Abstract: A pixel cell includes a first subpixel and a plurality of second subpixels. Each subpixel includes a photodiode to photogenerate image charge in response to incident light. Image charge is transferred from the first subpixel to a floating diffusion through a first transfer transistor. Image charge is transferred from the plurality of second subpixels to the floating diffusion through a plurality of second transfer transistors. An attenuation layer is disposed over the first subpixel. The first subpixel receives the incident light through the attenuation layer. The plurality of second subpixels receive the incident light without passing through the attenuation layer. A dual floating diffusion (DFD) transistor is coupled to the floating diffusion. A capacitor is coupled to the DFD transistor.

Abstract: According to an embodiment, a method of fabricating a photodiode device may include: growing an epitaxial layer on a first surface of a substrate, wherein the epitaxial layer is first type lightly doped; forming, in the substrate, a first type heavily doped region in contact with the first type lightly doped epitaxial layer; thinning the substrate from a second surface of the substrate opposite to the first surface to expose the first type heavily doped region; patterning the first type heavily doped region from the second surface side of the substrate to form a trench therein, that penetrates through the first type heavily doped region and extends into the epitaxial layer, to serve as a first electrode region of the photodiode device; and forming a second type heavily doped region at bottom of the trench, to serve as a second electrode region of the photodiode device.

Abstract: An image sensor structure and manufacturing method thereof are provided. The image sensor structure includes a substrate with a first surface. A first doped region of a first conductivity type is in the substrate and under the first surface. A second doped region of a second conductivity type is in the substrate and under the first surface. A gate structure is on the first surface of the substrate and overlapping a boundary of the first doped region and the second doped region. The epitaxial structure is on the first surface of the substrate. A method for manufacturing an image sensor structure is also provided.

Abstract: Embodiments of a hybrid imaging sensor that optimizes a pixel array area on a substrate using a stacking scheme for placement of related circuitry with minimal vertical interconnects between stacked substrates and associated features are disclosed. Embodiments of maximized pixel array size/die size (area optimization) are disclosed, and an optimized imaging sensor providing improved image quality, improved functionality, and improved form factors for specific applications common to the industry of digital imaging are also disclosed. Embodiments of the above may include systems, methods and processes for staggering ADC or column circuit bumps in a column or sub-column hybrid image sensor using vertical interconnects are also disclosed.

Abstract: An organic photoelectric conversion element, an imaging device, and an optical sensor, which can detect a plurality of wavelength regions by a single element structure, are provided. The photoelectric conversion element is formed by providing an organic photoelectric conversion portion including two or more types of organic semiconductor materials having different spectral sensitivities between the first and the second electrodes. Wavelength sensitivity characteristics of the photoelectric conversion element change according to a voltage (bias voltage) applied between the first and the second electrodes. The photoelectric conversion element is mounted in the imaging device and the optical sensor.

Abstract: The present disclosure relates to a solid-state image-capturing element and an electronic device capable of reducing the capacitance by using a hollow region. At least a part of a region between an FD wiring connected to a floating diffusion and a wiring other than the FD wiring is a hollow region. The present disclosure can be applied to a CMOS image sensor having, for example, a floating diffusion, a transfer transistor, an amplifying transistor, a selection transistor, a reset transistor, and a photodiode.

Abstract: Disclosed herein is a solid-state imaging device including: a laminated semiconductor chip configured to be obtained by bonding two or more semiconductor chip sections to each other and be obtained by bonding at least a first semiconductor chip section in which a pixel array and a multilayer wiring layer are formed and a second semiconductor chip section in which a logic circuit and a multilayer wiring layer are formed to each other in such a manner that the multilayer wiring layers are opposed to each other and are electrically connected to each other; and a light blocking layer configured to be formed by an electrically-conductive film of the same layer as a layer of a connected interconnect of one or both of the first and second semiconductor chip sections near bonding between the first and second semiconductor chip sections. The solid-state imaging device is a back-illuminated solid-state imaging device.

Abstract: A photodetector sensor array device as usable for camera chips comprises upper and lower contact layers of n+ and p+ semiconductor material either side of a light absorbing region made of either one layer, or two oppositely doped layers, of semiconductor material. Insulating trenches of dielectric material extending through the layers to form the individual pixels. Respective contacts are connected to the upper and lower contact layers so that each pixel can be reverse biased or forward biased. In operation, the device is reset with a reverse bias, and then switched to forward bias for sensing. After switching, carriers generated in response to photon absorption accumulate in potential wells in the light absorbing region and so reduce the potential barriers to the contact layers, which causes current to start to flow between the contacts after a time delay which is inversely proportional to the incident light intensity.

Abstract: The present disclosure relates to a solid-state image pickup device, a manufacturing method, and an electronic apparatus, which can obtain high charge transfer efficiency from a photoelectric conversion unit to a floating diffusion layer. The floating diffusion layer is arranged in a rectangular shape so as to surround a gate electrode of a vertical transistor whose groove portion is rectangular. A reset drain is formed so as to be adjacent to the floating diffusion layer through a reset gate. A potential of the floating diffusion layer is reset to the same potential as that of the reset drain by applying a predetermined voltage to the reset gate. It is possible to apply the present disclosure to, for example, a CMOS solid-state image pickup device used in an image pickup device such as a camera.

Abstract: Most semiconductor devices manufactured today, have uniform dopant concentration, either in the lateral or vertical device active (and isolation) regions. By grading the dopant concentration, the performance in various semiconductor devices can be significantly improved. Performance improvements can be obtained in application specific areas like increase in frequency of operation for digital logic, various power MOSFET and IGBT ICs, improvement in refresh time for DRAMs, decrease in programming time for nonvolatile memory, better visual quality including pixel resolution and color sensitivity for imaging ICs, better sensitivity for varactors in tunable filters, higher drive capabilities for JFETs, and a host of other applications.

Abstract: Image sensors are provided. The image sensors may include a substrate including first, second, third and fourth regions, a first photoelectric conversion element in the first region, a second photoelectric conversion element in the second region, a third photoelectric conversion element in the third region, a fourth photoelectric conversion element in the fourth region, a first microlens at least partially overlapping both the first and second photoelectric conversion elements, and a second microlens at least partially overlapping both the third and fourth photoelectric conversion elements. The image sensors may also include a floating diffusion region and first, second and third pixel transistors configured to perform different functions from each other. Each of the first, second and third pixel transistors may be disposed in at least one of first, second, third and fourth pixel regions. The first pixel transistor may include multiple first pixel transistors.

Abstract: Embodiments of a hybrid imaging sensor that optimizes a pixel array area on a substrate using a stacking scheme for placement of related circuitry with minimal vertical interconnects between stacked substrates and associated features are disclosed. Embodiments of maximized pixel array size/die size (area optimization) are disclosed, and an optimized imaging sensor providing improved image quality, improved functionality, and improved form factors for specific applications common to the industry of digital imaging are also disclosed.

Abstract: The present disclosure provides an array substrate and a method for manufacturing an array substrate. The array substrate includes a substrate, a switch assembly disposed on the substrate and correspondingly disposed beside the switch assembly, a color photoresist layer formed on the switch assembly and the photosensor, and a pixel electrode formed on the color photoresist layers and coupled with the switch assembly. The switch assembly includes a first metal layer. The photosensor includes a first electrode layer formed directly on the substrate and a first amorphous silicon layer disposed above the first electrode layer. The first electrode layer and the first metal layer are disposed on a same layer.

Abstract: A photoelectric conversion unit that outputs an image signal according to received light and a bonding pad section are disposed on one surface side of the substrate, and the bonding pad section has at least: a first opening provided to expose a pad electrode at a bottom; and a second opening that is arranged to surround the first opening and that is shallower than the first opening. The surface of a terrace in the bonding pad section is formed such that multiple types of materials are exposed.

Abstract: An image signal processor that generates a display signal receives an input image signal having a first pedestal level from an image sensor, generates a first signal from the input image signal, the first signal including a second pedestal level, the second pedestal level being different from the first pedestal level and being determined in accordance with the first pedestal level and a processing gain of the image signal processor, generates a second signal having the second pedestal level by amplifying the first signal in accordance with the processing gain, generates a third signal having the second pedestal level by removing a noise signal from the second signal; and generates a fourth signal by subtracting the second pedestal level from the third signal.

Abstract: Disclosed is an image sensor. The image sensor includes an active pixel sensor array including first to fourth pixel units sequentially arranged in a column direction, and each of the first to fourth pixel units is composed of a plurality of pixels. A first pixel group including the first and second pixel units is connected to a first column line, and a second pixel group including the third pixel unit and the fourth pixel unit is connected to a second column line. The image sensor includes a correlated double sampling circuit including first and second correlated double samplers and configured to convert a first sense voltage sensed from a selected pixel of the first pixel group and a second sense voltage sensed from a selected pixel of the second pixel group into a first correlated double sampling signal and a second correlated double sampling signal, respectively.

Abstract: An apparatus is provided which comprises: a fin; a layer formed on the fin, the layer dividing the fin in a first section and a second section; a first device formed on the first section of the fin; and a second device formed on the second section of the fin.

Abstract: Dark current from a transfer transistor is suppressed and power-supply voltage in a second semiconductor substrate is lowered. A solid-state image pickup device includes a pixel array, a plurality of common output lines receiving signals read out from a plurality of pixels, a transfer scanning unit sequentially driving the plurality of transfer transistors, a signal processing unit processing the signals output to the common signal lines, and a level shift unit making amplitude of a pulse supplied to a gate of the transfer transistor larger than amplitude of a pulse supplied to a gate of a transistor constituting the signal processing unit. The pixel array and the level shift unit are arranged on a first semiconductor substrate, whereas the plurality of common output lines and the signal processing unit are arranged on a second semiconductor substrate.

Abstract: An imaging apparatus performs a global electronic shutter operation. During an exposure period for acquiring one frame, the imaging apparatus transfers electric charges accumulated in a first period from a photoelectric conversion portion to a holding portion. When a second period has elapsed since an end time of the first period, the holding portion holds both electric charges generated in the first period and electric charges generated in the second period. A plurality of pixels included in the imaging apparatus includes a first pixel and a second pixel each having a different saturation charge quantity of the photoelectric conversion portion included in each pixel.

Abstract: A display device and a method for manufacturing the same are disclosed, in which a cathode electrode is not separated from an organic light emitting layer. The method for manufacturing a display device comprises the steps of forming pixels on a display area on a first substrate, forming an encapsulation film to cover the display area, attaching a protective film onto the encapsulation film, and removing the protective film. When attaching the protective film, the protective film includes a substrate layer and an adhesive layer formed at an edge area of at least one side of the substrate layer.

Abstract: An image sensor includes a first pixel group and a second pixel group positioned adjacent to the first pixel group. The first pixel group includes a first light receiving circuit and first and second driving circuits formed adjacent to one end of the first light receiving circuit. The first light receiving circuit includes a plurality of unit pixels sharing a first floating diffusion. The second pixel group includes a second light receiving circuit and third and fourth driving circuits formed adjacent to one end of the second light receiving circuit. The second light receiving circuit includes a plurality of unit pixels sharing a second floating diffusion. The first driving circuit is coupled in parallel to the third driving circuit, and the second driving circuit is coupled in parallel to the fourth driving circuit.

Abstract: A solid-state imaging element of a pixel sharing type with improved driving of transistors is disclosed. A first electric charge accumulating section and a second electric charge accumulating section are arranged in a predetermined direction. A first transfer section transfers electric charge from first photoelectric conversion elements to the first electric charge accumulating section, causing it to accumulate the electric charge. A second transfer section transfers electric charge from second photoelectric conversion elements to the second electric charge accumulating section, causing it to accumulate the electric charge. A first transistor is configured to output a signal corresponding to an amount of the electric charge accumulated in each of the first electric charge accumulating section and the second electric charge accumulating section. A second transistor is arranged with the first transistor in the predetermined direction and connected in parallel to the first transistor.

Abstract: A solar cell is disclosed. The solar cell has a front side facing the sun during normal operation, and a back side facing away from the sun. The solar cell comprises a silicon substrate, a first polysilicon layer with a region of doped polysilicon on the back side of the substrate. The solar cell also comprises a second polysilicon layer with a second region of doped polysilicon on the back side of the silicon substrate. The second polysilicon layer at least partially covers the region of doped polysilicon. The solar cell also comprises a resistive region disposed in the first polysilicon layer. The resistive region extends from an edge of the second region of doped polysilicon. The resistive region can be formed by ion implantation of oxygen into the first polysilicon layer.

Abstract: An image sensor includes a substrate, a grid isolation structure, and a color filter. The substrate has a light-sensitive element therein. The grid isolation structure is above the substrate and includes a reflective layer, a first dielectric layer above the reflective layer, and a second dielectric layer above the first dielectric layer. The color filter is above the light-sensitive element and is surrounded by the grid isolation structure.

Abstract: The present disclosure relates to a solid-state imaging device, a method for manufacturing the same, and an electronic device capable of increasing utilization efficiency of a substrate. The solid-state imaging device includes a first semiconductor substrate provided with a sensor circuit having a photoelectric conversion part, and a second semiconductor substrate and a third semiconductor substrate provided with respective circuits different from the sensor circuit. The first semiconductor substrate, the second semiconductor substrate, and the third semiconductor substrate are stacked on each other in three layers, and a metal element for an electrode constituting an electrode for external connection is disposed in the first semiconductor substrate. An electrode for a measuring terminal is disposed within the second semiconductor substrate or the third semiconductor substrate, and the first semiconductor substrate is stacked after performing a predetermined measurement.

Abstract: The present technology relates to a semiconductor device, a solid-state image pickup element, an imaging device, and an electronic apparatus that can suppress characteristic fluctuations caused by capacitance fluctuations due to a dummy wire, while maintaining an affixing bonding strength by the dummy wire. Two or more chips in which wires that are electrically connected are formed on bonding surfaces and the bonding surfaces opposing each other are bonded to be laminated are included and, with respect to a region where the wires are periodically and repeatedly disposed in sharing units each made up of a plurality of pixels sharing the same floating diffusion contact, a dummy wire is disposed at the center position thereof on the bonding surface at a pitch of the sharing unit. The present technology can be applied to a CMOS image sensor.

Abstract: A solid-state imaging device including a semiconductor substrate including photoelectric conversion elements, and having color filters of plural colors formed on the semiconductor substrate and positioned in correspondence to the photoelectric conversion elements, a first visible-light transmissive layer formed between the semiconductor substrate and the color filters, and second visible-light transmissive layers each formed between adjacent color filters. The second visible-light transmissive layers include a same material as the first visible-light transmissive layer and are continuous with the first visible-light transmissive layer.

Abstract: The present technology relates to a solid state image pickup device and a production method, a semiconductor wafer, and an electronic apparatus by which the yield can be improved. On a semiconductor wafer, a chip region in which pixels and so forth that configure a solid state image pickup device are formed and a scribe region are formed. In the scribe region, a measuring region in which an inspection circuit for measuring a property of the chip region and measurement pads are formed and a dicing line to be cut upon fragmentation of the semiconductor wafer are provided. The measuring region is positioned between the dicing line and the chip region. The present technology can be applied to a solid state image pickup device.

Abstract: A solid state imaging device includes: a group of a plurality of pixels configured to include pixels of the same color coding and with no pixel sharing between each other; and a color filter that is formed by Bayer arrangement of the group of a plurality of pixels.

Abstract: Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion preventing material for the first electrode and covering a periphery of the first electrode, the first electrode and the first insulating film cooperating with each other to configure a bonding face; and a second substrate bonded to and provided on the first substrate and including a second electrode joined to the first electrode, and a second insulating film configured from a diffusion preventing material for the second electrode and covering a periphery of the second electrode, the second electrode and the second insulating film cooperating with each other to configure a bonding face to the first substrate.

Abstract: In an embodiment, an image sensor includes a semiconductor region, a first doped region disposed over the semiconductor region, a ring shaped well disposed over the first doped region and surrounding parts of the first doped region, a second doped region formed within the ring shaped well and disposed over the first doped region, and a third doped region disposed over the second doped region. The ring shaped well is defined by a conductor surrounded by an insulator. The conductor is connected to a voltage terminal. The third doped region is more heavily doped than the second doped region, which is more heavily doped than the first region, and are all of the same doping type. The first doped region and the second doped region within the ring shaped well, form a potential barrier for controlling transfer of charge carriers from the first doped region to the third doped region.

Abstract: An image pickup element includes: a semiconductor substrate including a photoelectric conversion section for each pixel; a pixel separation groove provided in the semiconductor substrate; and a fixed charge film provided on a light-receiving surface side of the semiconductor substrate, wherein the fixed charge film includes a first insulating film and a second insulating film, the first insulating film being provided contiguously from the light-receiving surface to a wall surface and a bottom surface of the pixel separation groove, and the second insulating film being provided on a part of the first insulating film, the part corresponding to at least the light-receiving surface.

Abstract: A semiconductor device with at least one embedded photodetector is disclosed. The at least one photodetector is embedded in a hot carrier injection (HCI) area, and detects a quantity of emitted photons. Further, the photodetector triggers a warning when the photodetector detects a number of photons greater than a threshold number of photons. Additional embodiments are directed to a method of detecting HCI. The method includes embedding a photodetector in a power semiconductor device, setting at least one threshold number of photons, detecting photons, determining a number of photons, determining when the number of photons is above a threshold number of photons, and generating a warning. When the number of photons is above the threshold, the warning is triggered. Further embodiments are directed to an article of manufacture comprising at least one semiconductor device with at least one photodetector embedded in an area predicted to experience HCI.

Abstract: The present invention provides a pixel structure for a CMOS image sensor and a manufacturing method therefor, the pixel structure comprising: a substrate; a floating diffusion region formed in the substrate; an interlayer dielectric layer formed on an upper surface of the substrate and covering the pixel structure; and a light-shielding wall formed in the interlayer dielectric layer, wherein a projection of the light-shielding wall in the height direction of the substrate surrounds a projection of the floating diffusion region in the height direction of the substrate. The present invention further provides a manufacturing method for manufacturing the pixel structure. The pixel structure manufactured by means of the manufacturing method provided in the present invention can shield the irradiation of incident light on the floating diffusion region of the global CMOS image sensor, thereby reducing interference signals.

Abstract: An imaging device comprising a pixel substrate including pixel element circuitry, a logic substrate including read circuitry configured to receive an output signal voltage from the pixel element circuitry, and electrically-conductive material arranged between the pixel substrate and the logic substrate, wherein the electrically-conductive material is configured to transfer at least one reference voltage from the logic substrate to the pixel substrate, wherein the electrically-conductive material comprises a Cu—Cu bonding portion.

Abstract: An image sensor is provided and includes a semiconductor substrate having a first conductivity type, a photoelectric conversion region in the semiconductor substrate and having a second conductivity type, an oxide semiconductor pattern adjacent to a first surface of the semiconductor substrate, and a transfer gate on the first surface and adjacent to the photoelectric conversion region and the oxide semiconductor pattern.

Abstract: A time-of-flight image sensor (TOF) for imaging with ambient light subtraction. In one embodiment, the TOF image sensor includes a pixel array, a control circuit, and a signal processing circuit. The signal processing circuit reads out a first data signal from respective first floating diffusions and respective second floating diffusions during a first frame while a light generator is not emitting, reads out a second data signal from the respective first floating diffusions and the respective second floating diffusions during a second frame after the first integration and after a second integration while the light generator is emitting, generate a third data signal indicative of ambient light, generate a fourth data signal indicative of the ambient light and a light signal reflected off an object, and generate a fifth data signal indicative of the light signal by subtracting the third data signal from the fourth data signal.

Abstract: A solid state imaging device according to one embodiment, includes a first pixel and a second pixel adjacent to each other in a first direction. Structures of the first pixel and the second pixel are mutually mirror-symmetric. Each of the first pixel and the second pixel includes an opening region where light enters. The opening region of the first pixel is disposed over an entire width in the first direction of the first pixel. The opening region of the second pixel is disposed over an entire width in the first direction of the second pixel.

Abstract: The present technology relates to an imaging element and an electronic device that enable pixels to flexibly share a charge voltage converting unit. The imaging element includes a pixel array unit in which pixels respectively having charge voltage converting units and switches are arranged, and the charge voltage converting units of the plurality of pixels are connected to a signal line in parallel via the respective switches. The present technology is applied to, for example, a Complementary Metal Oxide Semiconductor (CMOS) image sensor in which pixels share a charge voltage converting unit.