Magnetic Field Sensor In Integrated Circuit (e.g., In Bipolar Transistor Integrated Circuit) Patents (Class 257/427)
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Patent number: 6858909Abstract: A method and structure for a microelectronic device comprises a first film over a substrate, a first polish resistant layer over the first film, a second film over the first polish resistant layer, a second polish resistant layer over the second film, wherein the first and second polish resistant layers comprise diamond-like carbon. The first film comprises an electrically resistive material, while the second film comprises low resistance conductive material. The first film is an electrical resistor embodied as a magnetic read sensor. The electrically resistive material is sensitive to magnetic fields. The device further comprises a generally vertical junction between the first and second films and a dielectric film abutted to the electrically resistive material.Type: GrantFiled: November 29, 2002Date of Patent: February 22, 2005Assignee: International Business Machines CorporationInventors: Marie-Claire Cyrille, Frederick H. Dill, Cherngye Hwang, Jui-Lung Li
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Patent number: 6833599Abstract: A semiconductor magnetic sensor includes a semiconductor substrate, a source, a drain, a gate, and a carrier condensing means. The source and the drain are located in a surface of the substrate. One of the source and the drain includes adjoining two regions. The gate is located between the source and the drain for drawing minority carriers of the substrate to induce a channel, through which the carriers flow between the source and the drain to form a channel carrier current. The carriers flow into the two regions to form two regional carrier currents. The magnitude of a magnetic field where the sensor is placed is measured using the difference in quantity between the two regional carrier currents. The carrier condensing means locally increases carrier density in the channel carrier current in the proximity of an axis that passes between the two regions in order to increase the difference.Type: GrantFiled: February 27, 2003Date of Patent: December 21, 2004Assignee: Denso CorporationInventors: Inao Toyoda, Noboru Endo
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Patent number: 6828639Abstract: MRAM structures employ the magnetic properties of layered magnetic and non-magnetic materials to read memory storage logic states. Improvements in switching reliability may be achieved by altering the shape of the layered magnetic stack structure. Forming recessed regions with sloped interior walls in an ILD layer prior to depositing the layered magnetic stack structure produces a significant advantage over the prior art by allowing a CMP process to be used to define the magnetic bit shapes. The sloped interior walls of the recessed regions, which is singular to the present invention, provide a unique formation and shaping of the magnetic stack structure, which may reduce the magnetic coupling effect between magnetic layers of the magnetic stack structure.Type: GrantFiled: July 17, 2002Date of Patent: December 7, 2004Assignee: Micron Technology, Inc.Inventors: Hasan Nejad, James G. Deak
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Patent number: 6828641Abstract: A semiconductor memory device includes a first wiring extending in a first direction, a second wiring extending in a second direction differing from the first direction, and a magneto resistive element arranged between the first and second wirings and comprising a first portion and a second portion, the second portion being in contact with the second wiring and extending along the second wiring to reach an outside region positioned outside the first portion.Type: GrantFiled: September 8, 2003Date of Patent: December 7, 2004Assignee: Kabushiki Kaisha ToshibaInventors: Keiji Hosotani, Kentaro Nakajima
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Patent number: 6815784Abstract: A magneto-resistive random access memory includes a MOS transistor having a first gate and source and drain junctions on a substrate, a lower electrode connected to the source junction, a first magnetic layer on the lower electrode, a dielectric barrier layer including aluminum and hafnium on the first magnetic layer which, together with the first magnetic layer, form a potential well, a second magnetic layer on the dielectric barrier layer opposite the first magnetic layer, an upper electrode on the second magnetic layer, a second gate interposed between the first gate and the lower electrode to control the magnetic data of one of the first and second magnetic layers, and a bit line positioned orthogonal to the first gate and electrically connected to the upper electrode. Improved characteristics of the barrier layer increase a magnetic resistance ratio and improve data storage capacity of the magneto-resistive random access memory.Type: GrantFiled: May 28, 2003Date of Patent: November 9, 2004Assignee: Samsung Electronics Co., Ltd.Inventors: Wan-jun Park, Taek-dong Lee, Byeong-kook Park, Tae-wan Kim, I-hun Song, Sang-jin Park
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Publication number: 20040207035Abstract: A magnetic-sensing apparatus and method of making and using thereof is disclosed. The sensing apparatus may be fabricated from semiconductor circuitry and a magneto-resistive sensor. A dielectric may be disposed between the semiconductor circuitry and the magneto-resistive sensor.Type: ApplicationFiled: January 8, 2004Publication date: October 21, 2004Applicant: Honeywell International Inc.Inventors: William F. Witcraft, Lonny L. Berg, Mark D. Amundson
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Publication number: 20040207031Abstract: A magnetic sensor device formed using SOI CMOS techniques includes a substrate, a silicon oxide layer and in some cases a plurality of gated regions. A first terminal is located between two innermost gated regions and supplies a supply voltage. A second and a third terminal, each of which is located between two adjacent gated regions other than the two innermost gated regions, output positive and negative Hall voltages. By appropriately controlling a bias voltage to the gated regions, small changes in a magnetic field induces larger currents in channel regions under the gated regions, which, in turn, results in detectable Hall voltages.Type: ApplicationFiled: April 15, 2003Publication date: October 21, 2004Inventors: Dale F. Berndt, Andrzej Peczalski, Eric E. Vogt, William F. Witcraft
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Patent number: 6803638Abstract: A semiconductor Hall sensor can reduce measuring error due to an unbalanced voltage by decreasing the unbalanced voltage, and improve resistance to electrostatic by suppressing maximum electric field in the sensor. A cross-shaped pattern of the semiconductor Hall sensor includes cutouts at its concave corners. Among the four concave corners of the cross-shaped pattern, consecutive two or four concave corners are provided with the cutouts. Besides, among the four concave corners of the cross-shaped patterns, the consecutive two or four concave corners have an acute angle at the intersection of the input terminal side pattern and output terminal side pattern. The semiconductor Hall sensor becomes insensitive to defects or unbalance of its pattern, thereby being able to reduce the unbalanced voltage as compared with a conventional cross-shaped pattern of the semiconductor Hall sensor.Type: GrantFiled: March 9, 2004Date of Patent: October 12, 2004Assignee: Asahi Kasei Electronics Co., Ltd.Inventor: Toshinori Takatsuka
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Patent number: 6794696Abstract: A magnetic memory device includes a magnetoresistance configured to store information. A first wiring is provided along a first direction. The first wiring has a function of applying a magnetic field to the magnetoresistance element. The first wiring has a first surface and a second surface. The second surface faces the magnetoresistance element and the first surface is opposite to it. The second surface is smaller in width than the first surface.Type: GrantFiled: December 10, 2002Date of Patent: September 21, 2004Assignee: Kabushiki Kaisha ToshibaInventor: Yoshiaki Fukuzumi
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Publication number: 20040140514Abstract: Semiconductor devices containing a MOSFET and an on-chip current sensor in the form of a magnetic resistive element are described. The magnetic resistive element (MRE) is proximate the MOSFET in the semiconductor device. The current flowing through the MOSFET generates a magnetic field that is detected by the MRE. The MRE comprises a metal film that is placed proximate the MOSFET during the normal fabrication processes, thereby adding little to the manufacturing complexity or cost. Using the MRE adds an accurate, effective, and cheap method to measure currents in MOSFET devices.Type: ApplicationFiled: October 9, 2003Publication date: July 22, 2004Inventor: Alan Elbanhawy
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Publication number: 20040135220Abstract: A noise-proof, integrated semiconductor current detector is disclosed which has formed in a semiconductor substrate a Hall generator for providing a Hall voltage in proportion to the strength of a magnetic field applied, a control current supply circuit for delivering a control current to the Hall generator, and a Hall voltage output circuit for putting out the Hall voltage for detection or measurement. The Hall generator, control current supply circuit, and Hall voltage output circuit are all exposed at one of the pair of opposite major surfaces of the semiconductor substrate. A current-path conductor is attached to this one major surface of the substrate via insulating layers for carrying a current to be detected.Type: ApplicationFiled: December 23, 2003Publication date: July 15, 2004Applicant: Sanken Electric Co., Ltd.Inventor: Hirokazu Goto
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Patent number: 6762478Abstract: The invention relates to an inductor comprising a plurality of interconnected conductive segments interwoven with a substrate. The inductance of the inductor is increased through the use of coatings and films of ferromagnetic materials such as magnetic metals, alloys, and oxides. The inductor is compatible with integrated circuit manufacturing techniques and eliminates the need in many systems and circuits for large off chip inductors. A sense and measurement coil, which is fabricated on the same substrate as the inductor, provides the capability to measure the magnetic field or flux produced by the inductor. This on chip measurement capability supplies information that permits circuit engineers to design and fabricate on chip inductors to very tight tolerances.Type: GrantFiled: May 7, 2001Date of Patent: July 13, 2004Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 6756649Abstract: A modulator includes a voltage source, a first arrangement including first and second non-insulating layers configured such that a modulation voltage from the voltage source can be applied there across, and a second arrangement between the first and second non-insulating layers. The second arrangement includes a first amorphous layer configured such that a transport of electrons between the first and second non-insulating layers includes tunneling. The first arrangement further includes an antenna structure for absorbing part of an input radiation, while a remainder of the input radiation is reflected. The second arrangement cooperates with the first arrangement such that the antenna exhibits a first absorptivity, when a first modulation voltage is applied to the first arrangement, and exhibits a distinct, second absorptivity, when a second modulation voltage is applied, thereby causing the antenna to reflect a different amount of input radiation to an output as modulated radiation.Type: GrantFiled: January 20, 2003Date of Patent: June 29, 2004Assignee: The Regents of the University of ColoradoInventors: Garret Moddel, Blake J. Eliasson
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Patent number: 6747335Abstract: A memory cell includes a magnetic data storage layer, a magnetic reference layer, and an insulating layer between the data storage layer and the reference layer. A resistive layer having a known electrical resistance is positioned adjacent the insulating layer.Type: GrantFiled: January 31, 2003Date of Patent: June 8, 2004Assignee: Hewlett-Packard Development Company, L.P.Inventor: Darrel R. Bloomquist
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Publication number: 20040089905Abstract: A magnetic sensor uses injection of spin-polarized electrons between magnetized regions via a semiconductor and spin precession of electrons that a magnetic field being measured causes in the semiconductor. The sensor can include donor n+-doped &dgr;-layers and acceptor doped transition layers at one or both interfaces between magnetized regions and the semiconductor region. The properties of the &dgr;-doped layers and the transition layers can be adjusted to improve efficiency of injection of spin-polarized electrons into the semiconductor at small voltage between about 25 and 50 mV. One geometry for the sensor has the magnetized regions that are laterally spaced apart on a major surface of a substrate with the semiconductor being either between or adjacent to the magnetic regions to form a current path for spin-polarized electrons.Type: ApplicationFiled: November 5, 2003Publication date: May 13, 2004Inventors: Viatcheslav V. Ossipov, Alexandre M. Bratkovski
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Patent number: 6727537Abstract: A magnetic memory device based on easy domain wall propagation and the extraordinary Hall effect includes a perpendicular-to-plane a magnetic electrically conductive element (2) that includes a memory node (3). Electrical conductors (12-15) surround the node (3) so that when energised, a magnetic field is produced to change the magnetization state of the node (3). In memory state “0” a magnetic domain is pinned within tapered portion (5) of the element (2). When a magnetic field is applied to the device, the domain (D) becomes unpinned and extends into the node (3) to produce a “1” state. The state of magnetization is sensed by means of a Hall contact (11). The current pulse (Jc) is applied through the element (2) so that the Hall voltage can be detected.Type: GrantFiled: July 8, 2002Date of Patent: April 27, 2004Assignee: Hitachi, Ltd.Inventor: Joerg Wunderlich
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Patent number: 6727563Abstract: A Hall element comprises a region having a non-zero Hall constant, a first contact for supplying an operating current to the region, a third contact for conducting the operating current from the region, the first and third contacts defining a direction of the operating current within the region, a second and a fourth contact for tapping a Hall voltage, and a conductor pattern connected to the first contact or to the third contact and substantially surrounding the region laterally or being arranged above or below the region. The conductor pattern has the effect that the intrinsic field of the operating current through the Hall element is suppressed outside the Hall element such that the Hall element effects an at least reduced offset in adjacent Hall elements. In addition thereto, the arrangement of the conductor pattern has the effect that effects of the current return on the Hall voltage generated by the Hall element itself are also at least reduced.Type: GrantFiled: April 30, 2002Date of Patent: April 27, 2004Assignee: Fraunhofer-Gesellschaft zur Fürderung der angewandten Forschung e.V.Inventors: Hans-Peter Hohe, Josef Sauerer
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Patent number: 6724059Abstract: The present invention provides a thin magnetoelectric transducer which has a projected size substantially equal to that of a pellet and which can be subjected to an inspection test nondestructively. The magnetoelectric transducer has a semiconductor device provided on the upper surface of a projecting portion of a projecting nonmagnetic insulating substrate 9 and comprising a magnetosensitive section 3 and inner electrodes 2 made of metal. A conductive resin layer 4 is formed on the internal electrodes 2 and on part of the side surfaces of the projecting portion. A strain buffering layer 5 is formed at least on the magnetosensitive section 3. Furthermore, at least the strain buffering layer 5 on the magnetosensitive section 3 is coated with a protective layer 6.Type: GrantFiled: December 6, 2001Date of Patent: April 20, 2004Assignee: Asahi Kasei Electronics Co., Ltd.Inventor: Toshiaki Fukunaka
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Patent number: 6707122Abstract: A symmetric van der Pauw disk of homogeneous nonmagnetic semiconductor material, such as indium antimonide, with an embedded concentric conducting material inhomogeneity, such as gold, exhits room temperature geometric extraordinary magnetoresistance (EMR) as high as 100%, 9,100% and 750,000% at magnetic fields of 0.05, 0.25 and 4.0 Tesla, respectively. Moreover, for inhomogeneities of sufficiently large cross section relative to that of the surrounding semiconductor material, the resistance of the disk is field-independent up to an onset field above which the resistance increases rapidly. These results can be understood in terms of the field-dependent deflection of current around the inhomogeneity.Type: GrantFiled: October 26, 2000Date of Patent: March 16, 2004Assignee: NEC Laboratories America, Inc.Inventors: Daniel R. Hines, Stuart A. Solin, Tineke Thio, Tao Zhou
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Patent number: 6656760Abstract: A detector and a camera system for electromagnetic radiation being integrated in a solid state substrate are disclosed. Said substrate comprises a first region of a first conductivity and a second region of a second conductivity, said first region being adjacent to said second region, and said first and second region forming a detection junction, at least part of said junction being substantially orthogonal with respect to the plane of the surface of the substrate above said detection junction. The camera system comprises a configuration of pixels in an imaging sensor being integrated in a solid state substrate, essentially each of the pixels comprising a region of a first conductivity type being at least partly surrounded by a region of a second conductivity type, thereby forming a junction region, and wherein the region of the first conductivity type includes at least one contact area.Type: GrantFiled: March 9, 2001Date of Patent: December 2, 2003Assignee: Koninklijke Philips Electronics N.V.Inventors: Jurriaan Schmitz, Edwin Roks, Daniel Wilhelmus Elisabeth Verbugt
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Patent number: 6653703Abstract: A semiconductor memory device includes a first wiring extending in a first direction, a second wiring extending in a second direction differing from the first direction, and a magneto resistive element arranged between the first and second wirings and including a first portion and a second portion, the second portion being in contact with the second wiring and extending along the second wiring to reach an outside region positioned outside the first portion.Type: GrantFiled: April 19, 2002Date of Patent: November 25, 2003Assignee: Kabushiki Kaisha ToshibaInventors: Keiji Hosotani, Kentaro Nakajima
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Patent number: 6653704Abstract: A magnetic random access memory (MRAM) array includes a plurality of magnetic tunnel junction (MTJ) memory cells and a plurality of non-electronic switching elements, each MTJ memory cell and an associated switching element being in electrical series connection and located between the bit and word lines of the array. The switching element is a layer of vanadium dioxide, a material that exhibits a first order phase transition at a transition temperature of approximately 65° C. from a low-temperature monoclinic (semiconducting) to a high-temperature tetragonal (metallic) crystalline structure. This phase transition is accompanied by a change in electrical resistance from high resistance at room temperature to low resistance above the transition temperature. To read a memory cell, the vanadium dioxide switching element associated with that cell is heated to lower the resistance of the switching element to allow sense current to pass through the cell, thereby enabling the memory state of the cell to be read.Type: GrantFiled: September 24, 2002Date of Patent: November 25, 2003Assignee: International Business Machines CorporationInventors: Bruce A. Gurney, Stefan Maat
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Publication number: 20030214004Abstract: A spin valve transistor, magnetic reproducing head including a spin valve transistor and-a magnetic information storage system having the spin valve transistor. The spin valve transistor has a collector, a base formed on the collector, a tunnel barrier layer formed on the base and an emitter formed on the tunnel barrier layer. In one embodiment, the collector may have a first semiconductor layer of first composition and a second semiconductor layer of a different composition epitaxially grown. The base of the first spin valve transistor may be formed on the second semiconductor layer and have a magnetization pinned layer having a magnetization substantially fixed in an applied magnetic field, a nonmagnetic layer and a magnetization free layer having a magnetization free to rotate under the applied magnetic field. The emitter of a spin valve transistor of a second embodiment may include a semiconductor layer containing an oxide of transitional metal and contacting the tunnel barrier layer.Type: ApplicationFiled: March 28, 2003Publication date: November 20, 2003Applicant: Kabushiki Kaisha ToshibaInventors: Rie Sato, Koichi Mizushima
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Patent number: 6646315Abstract: A Hall effect device comprising: (a) an electrically-conductive layer or plate having a top surface; and (b) a ferromagnetic layer, where the conductive film or layer is composed of high mobility semiconductors. Also, a Hall effect device can have a ferromagnetic element that is a multilayer (e.g., a bilayer), and a device in which the Hall plate comprises an indium compound, germanium or mixtures thereof. The devices are useful for a variety of applications such as a memory element in a nonvolatile random access memory array (NRAM) and as a logic gate.Type: GrantFiled: April 22, 2002Date of Patent: November 11, 2003Assignee: The United States of America as represented by the Secretary of the NavyInventors: Mark B. Johnson, Gary A. Prinz
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Patent number: 6639291Abstract: A tunneling barrier for a spin dependent tunneling (SDT) device is disclosed that includes a plurality of ferromagnetic particles. The presence of such particles in the tunneling barrier has been found to increase a magnetoresistance or &Dgr;R/R response, improving the signal and the signal to noise ratio. Such an increased &Dgr;R/R response also offers the possibility of decreasing an area of the tunnel barrier layer and/or increasing a thickness of the tunnel barrier layer. Decreasing the area of the tunnel barrier layer can afford improvements in resolution of devices such as MR sensors and increased density of devices such as of MRAM cells. Increasing the thickness of the tunnel barrier can afford improvements in manufacturing such as increased yield.Type: GrantFiled: February 6, 2002Date of Patent: October 28, 2003Assignee: Western Digital (Fremont), Inc.Inventors: Kyusik Sin, Shin Funada, Hugh Craig Hiner, Hua-Ching Tong, Xizeng Shi
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Publication number: 20030183890Abstract: Proposed are a device, a magnetic-field sensor and a current sensor, the device having the feature that provision is made for a first magnetic-field sensing means (1, 101), for a second magnetic-field sensing means (201), and for a third magnetic-field sensing means (301), a first output variable (110) of the first magnetic-field sensing means (101) being provided as a first input variable (200), a second output variable (120) of the first magnetic-field sensing means (101) being provided as a second input variable (300), the first input variable (200) being provided as input variable for the second magnetic-field sensing means (201), and the second input variable (300) being provided as input variable for the third magnetic-field sensing means (301).Type: ApplicationFiled: November 12, 2002Publication date: October 2, 2003Inventor: Henning M. Hauenstein
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Patent number: 6621100Abstract: This invention relates to organic based spintronic devices, and electronic devices comprising them, including spin valves, spin tunnel junctions, spin transistors and spin light-emitting devices. New polymer-, organic- and molecular-based electronic devices in which the electron spin degree of freedom controls the electric current to enhance device performance. Polymer-, organic-, and molecular-based spintronic devices have enhanced functionality, ease of manufacture, are less costly than inorganic ones. The long spin coherence times due to the weak spin-orbit interaction of carbon and other low atomic number atoms that comprise organic materials make them ideal for exploiting the concepts of spin quantum devices. The hopping mechanism of charge transport that dominates in semiconducting polymers (vs. band transport in crystalline inorganic semiconductors) enhances spin-magneto sensitivity and reduces the expected power loss.Type: GrantFiled: October 26, 2001Date of Patent: September 16, 2003Assignee: The Ohio State UniversityInventors: Arthur J. Epstein, Vladimir N. Prigodin
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Patent number: 6607992Abstract: An antireflection coating has two-layer structure including lower and upper silicon nitride films (p-SiN films) formed by plasma CVD. For the lower p-SiN film, the real part of its complex index of refraction is set in the range not less than 1.9 nor more than 2.5, the imaginary part is set in the range of not less than 0.9 nor more than 1.7, and the film thickness is set in the range of not less than 20 nm nor more than 60 nm. For the upper p-SiN film, the real part of its complex index of refraction is set in the range not less than 1.7 nor more than 2.4, the imaginary part is set in the range of not less than 0.15 nor more than 0.75, and the film thickness is set in the range of not less than 10 nm nor more than 40 nm.Type: GrantFiled: September 19, 2001Date of Patent: August 19, 2003Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Kouichirou Tsujita, Atsumi Yamaguchi, Junjiro Sakai, Kouji Oda, Koichiro Narimatsu
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Patent number: 6600202Abstract: A compact sensing apparatus having reduced cross section and methods are provided for sensing the magnitude and direction of an electrical or magnetic field. The compact sensing apparatus and method preferably provide one of two transducer orientations in relation to the direction of the field arranged in the sensor apparatus to provide the smallest possible cross section. The compact sensing apparatus preferably includes a plurality of mounting pins. Each of the plurality of mounting pins preferably includes a first pin portion and a second pin portion connected to the first pin portion at a predetermined angle. The predetermined angle is preferably less than 180 degrees and more preferably in the range of about 70-110 degrees.Type: GrantFiled: October 6, 2000Date of Patent: July 29, 2003Assignee: Wolff Controls CorporationInventors: Marshall E. Smith, Jr., Peter U. Wolff, Richard W. Stettler
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Publication number: 20030122208Abstract: There is provided a spin valve transistor that comprises a collector region made of semiconductor, a base region provided on the collector region and including a first ferromagnetic layer whose magnetization direction changes in accordance with a direction of an external magnetic field, a barrier layer provided on the base layer and made of insulator or semiconductor, and an emitter region provided on the barrier layer and including a second ferromagnetic layer whose magnetization direction is fixed.Type: ApplicationFiled: December 17, 2002Publication date: July 3, 2003Inventors: Rie Sato, Koichi Mizushima
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Patent number: 6573713Abstract: A transpinnor switch is described having a network of thin-film elements in a bridge configuration, selected ones of the thin-film elements exhibiting giant magnetoresistance. The switch also includes at least one input conductor inductively coupled to a first subset of the selected thin-film elements, and a switch conductor inductively coupled to a second subset of the selected thin-film elements for applying magnetic fields thereto. The switch is configurable using the switch conductor to generate an output signal representative of an input signal on the input conductor. The switch is also configurable using the switch conductor to generate substantially no output signal regardless of whether the input signal is present. The transpinnor switch described herein may be used in a wide variety of applications including, for example, a field programmable gate array.Type: GrantFiled: March 25, 2002Date of Patent: June 3, 2003Assignee: Integrated Magnetoelectronics CorporationInventors: E. James Torok, Richard Spitzer
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Patent number: 6566722Abstract: A method of forming a photo sensor in a photo diode is provided. The photo diode is formed in a semiconductor wafer. The semiconductor wafer includes a substrate with a first conductive type, and an insulating layer surrounding the photo sensor. A first ion implantation process, utilizing dopants with a second conductive type, is performed to form a plurality of first doped regions in the surface of the photo sensor. A second ion implantation process, utilizing dopants with the second conductive type, is performed to form a second doped region in the surface of the photo sensor. The second doped region is overlapped with a portion of each of the first doped regions.Type: GrantFiled: June 26, 2002Date of Patent: May 20, 2003Assignee: United Microelectronics Corp.Inventors: Liang-Hua Lin, Anchor Chen
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Patent number: 6528326Abstract: A magnetoresistive device including a high-resistivity layer (13), a first magnetic layer (12) and a second magnetic layer (14), the first magnetic layer (12) and the second magnetic layer (14) being arranged so as to sandwich the high-resistivity layer (13), wherein the high-resistivity layer (13) is a barrier for passing tunneling electrons between the first magnetic layer (12) and the second magnetic layer (14), and contains at least one element LONC selected from oxygen, nitrogen and carbon; at least one layer A selected from the first magnetic layer (12) and the second magnetic layer (14) contains at least one metal element M selected from Fe, Ni and Co, and an element RCP different from the metal element M; and the element RCP combines with the element LONC more easily in terms of energy than the metal element M. Accordingly, a novel magnetoresistive device having a low junction resistance and a high MR can be obtained.Type: GrantFiled: January 24, 2001Date of Patent: March 4, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masayoshi Hiramoto, Nozomu Matsukawa, Hiroshi Sakakima, Hideaki Adachi, Akihiro Odagawa
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Publication number: 20030020127Abstract: A method of manufacturing a monolithic compound semiconductor sensing device includes epitaxially depositing a signal conditioning epitaxy on a substrate surface, providing a well in the signal conditioning circuit and exposing the substrate surface, and epitaxially depositing a sensor within the well.Type: ApplicationFiled: September 13, 2002Publication date: January 30, 2003Applicant: Emcore CorporationInventors: Stephen Schwed, Edward W. Douglas, Christopher Palmer
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Patent number: 6509620Abstract: A microelectromechanical system (MEMS) device is disclosed for determining the position of a mover. The MEMS device has a bottom layer connected to a mover layer. The mover layer is connected to a mover by flexures. The mover moves relative to the mover layer and the bottom layer. The flexures urge the mover back to an initial position of mechanical equilibrium. The flexures include coupling blocks to control movement of the mover. The MEMS device determines the location of the mover by determining the capacitance between mover electrodes located on the coupling blocks of the flexures and counter electrodes located on an adjacent layer. The coupling block moves according to a determinable relationship with the mover. As the coupling block moves, the capacitance between the mover electrode and the counter electrode changes. A capacitance detector analyzes the capacitance between the electrodes and determines the position of the mover.Type: GrantFiled: May 31, 2001Date of Patent: January 21, 2003Assignee: Hewlett-Packard CompanyInventors: Peter G. Hartwell, Donald J. Fasen
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Patent number: 6507496Abstract: A dual-sided circuit board module designed for an operating position that is not perpendicular to a system motherboard will be coupled to the motherboard by leads having at least two different lengths. Because leads of differing lengths have differing associated inductance, the operating characteristics of the leads and therefore the devices coupled to the leads will differ. In order to improve the operating characteristics of the module, integrated circuit packages are selected based on the inductive (and possibly other) qualities of the leads to which the respective packages are coupled. In one embodiment, leads having a larger inductance are coupled to integrated circuit (IC) packages having a smaller inductance and vice versa, which allows the inductive characteristics of the various components of the module to have more closely matching inductive characteristics than would otherwise be possible.Type: GrantFiled: May 31, 2001Date of Patent: January 14, 2003Assignee: Intel CorporationInventors: Paul S. Levy, David Frame
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Patent number: 6501143Abstract: A spin-valve transistor has an emitter, a base including a spin-valve film in which two magnetic layers are stacked with interposing a nonmagnetic layer between the two magnetic layers, and a collector, the spin-valve film having a stacked structure of M/A/M′ or M/B/M′ and the spin-valve film being (100)-oriented, where each of M and M′ includes at least one element selected from the group consisting of Fe, Co, Ni and an alloy including Fe, Co, Ni, A includes at least one element selected from the group consisting of Au, Ag, Pt, Cu and Al, and B includes at least one element selected from the group consisting of Cr and Mn.Type: GrantFiled: June 29, 2001Date of Patent: December 31, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Rie Sato, Koichi Mizushima
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Patent number: 6492697Abstract: A Hall-effect element includes an isolating layer and an active layer of a first electrical conductivity type disposed on the isolating layer, the active layer having a surface. A first set of contacts is disposed in contact with the surface along a first axis, and a second set of contacts is disposed in contact with the surface along a second axis transverse to the first axis. An insulating layer is disposed on the surface. A metal control field plate is disposed on the insulating layer and is coupleable to a voltage source to control the accumulation of charge carriers at the surface of the active layer to vary the resistance of the active layer. Also, a method is provided for reducing null offset in a Hall-effect element.Type: GrantFiled: April 4, 2000Date of Patent: December 10, 2002Assignee: Honeywell International Inc.Inventors: Mark R. Plagens, Michael J. Haji-Sheikh, Walter T. Matzen
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Publication number: 20020179987Abstract: The invention is based on an electronic control circuit (10) having a printed circuit board (12) on which multiple electronic components (14, 16, 18, 20, 22) are arranged, in at least one (18) of which a Hall-effect sensor (20, 22) having a circuit part (18) belonging to the control electronics is assembled.Type: ApplicationFiled: January 11, 2002Publication date: December 5, 2002Inventors: Marcus Meyer, Stefan Reck, Stefan Kotthaus, Joerg Wolf, Michael Soellner
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Patent number: 6476485Abstract: In a thin-film structure, since a flat face of a bump, which is exposed at the surface of an insulating layer and is to be in contact with an electrode layer, is an exposed surface of a nickel layer, an oxide layer on the flat face can be reliably removed by using ion-milling or sputter etching.Type: GrantFiled: May 11, 2000Date of Patent: November 5, 2002Assignee: Alps Electric Co., Ltd.Inventor: Kiyoshi Sato
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Patent number: 6452240Abstract: In order to dampen magnetization changes in magnetic devices, such as tunnel junctions (MTJ) used in high speed Magnetic Random Access Memory (MRAM), a transition metal selected from the 4d transition metals and 5d transition metals is alloyed into the magnetic layer to be dampened. In a preferred form, a magnetic permalloy layer is alloyed with osmium (Os) in an atomic concentration of between 4% and 15% of the alloy.Type: GrantFiled: October 30, 2000Date of Patent: September 17, 2002Assignee: International Business Machines CorporationInventors: Snorri T. Ingvarsson, Roger H. Koch, Stuart S. Parkin, Gang Xiao
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Patent number: 6452239Abstract: The present invention, generally speaking, provides a magnetic memory element that is single domain in nature and has a geometry that mitigates the effects of half-select noise. In a preferred embodiment, the magnetic memory element takes the form of a magnetic post or tube having an aspect ratio in the range of 2:1 (more preferably 4:1). The outside diameter of the magnetic tube or post is preferably less than 0.8 microns, more preferably 0.6 microns or less. The magnetic post or tube then functions as a single magnetic domain. In the case of a magnetic tube, the skin of the tube is formed of a magnetic material and the interior of the tube is formed of a non-magnetic material. Suitable non-magnetic materials include copper, gold and silicon. The coercivity of the magnetic tube structure may be adjusted by adjusting the thickness of the magnetic skin. As a result, the magnetic memory element is readily scalable to smaller geometries as lithographic techniques improve.Type: GrantFiled: March 14, 2000Date of Patent: September 17, 2002Assignee: Plumeria Investments, Inc.Inventors: Joseph McDowell, James Harris, Juan Monico, Otto Voegli
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Patent number: 6445024Abstract: The fabrication of ferromagnet-insulator-ferromagnet magnetic tunneling junction devices using a ramp-edge geometry based on, e.g., (La0.7Sr0.3) MnO3, ferromagnetic electrodes and a SrTiO3 insulator is disclosed. The maximum junction magnetoresistance (JMR) as large as 23% was observed below 300 Oe at low temperatures (T<100 K). These ramp-edge junctions exhibited JMR of 6% at 200 K with a field less than 100 Oe.Type: GrantFiled: January 25, 2000Date of Patent: September 3, 2002Assignee: The United States of America, as represented by the Department of EnergyInventors: Chuhee Kwon, Quanxi Jia
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Patent number: 6426620Abstract: A magnetic field sensing element comprises an underlayer formed on a substrate, a giant magnetoresistance element formed on the underlayer for detecting a change in a magnetic field, and an integrated circuit formed on the substrate for carrying out predetermined arithmetic processing based on a change in a magnetic field detected by the giant magnetoresistance element, wherein the giant magnetoresistance element and the integrated circuit are formed on the same surface.Type: GrantFiled: May 10, 1999Date of Patent: July 30, 2002Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Motohisa Taguchi, Izuru Shinjo, Yuji Kawano, Tatsuya Fukami, Kazuhiko Tsutsumi, Yuuichi Sakai, Naoki Hiraoka, Yasuyoshi Hatazawa
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Publication number: 20020084500Abstract: A magnetic random access memory (RAM) is implemented by a gate electrode formed on an active region in a semiconductor substrate and being a word line used as a write line, a ground line formed in one side of the word line, a lower lead layer formed in the other side of the word line, a seed layer connected to the lower lead layer and overlapped with the word line, a magnetic tunnel junction (MTJ) cell made on the seed layer and located in an upper portion of the word line and an upper lead layer being a bit line formed connected to the MTJ cell.Type: ApplicationFiled: December 27, 2001Publication date: July 4, 2002Inventors: Chang-Yong Kang, Chang-Suk Kim
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Patent number: 6396372Abstract: A movable substrate 20 is supported on a base 10 via first beam portions 22. A movable contact 28 is supported on the movable substrate 20 via a second beam portion 23 which has an elasticity larger than the first beam portions 22.Type: GrantFiled: July 5, 2000Date of Patent: May 28, 2002Assignee: Omron CorporationInventors: Minoru Sakata, Yoshiyuki Komura, Takuya Nakajima, Tomonori Seki
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Patent number: 6342713Abstract: A hybrid memory device combines a ferromagnetic layer and a Hall Effect device. The ferromagnetic layer is magnetically coupled to a portion of a Hall plate, and when such plate is appropriately biased, a Hall Effect signal can be generated whose value is directly related to the magnetization state of the ferromagnetic layer. The magnetization state of the ferromagnetic layer can be set to correspond to different values of a data item to be stored in the hybrid memory device. The magnetization state is non-volatile, and a write circuit can be coupled to the ferromagnetic layer to reset or change the magnetization state to a different value. The memory device can also be fabricated to include an associated transistor (or other suitable switch) that functions as an isolation element to reduce cross-talk and as a selector for the output of the device when such is used in a memory array.Type: GrantFiled: March 22, 2000Date of Patent: January 29, 2002Inventor: Mark B. Johnson
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Patent number: 6317354Abstract: A non-volatile RAM device is disclosed which utilizes a plurality of ferromagnetic bits (6) each surrounded by a coil of a write line (13) for directing the remnant polarity thereof is disclosed. The direction of magnetic remnance in each bit (6) is dictated by the direction of a current induced into write line (13). Further, a magneto sensor (7) comprising a magneto resistor (1) coupled to a collector (2) is placed approximate each bit (6). The magneto resistor (1) is coupled to a control circuit (30) for receiving current. The current passing across magneto resistor (1) is biased in a direction either right or left of the original current flow direction. The collector is coupled to a sense line (4), which in turn, is coupled to an amplifier (12). When current flow is biased in the direction of the collector, the serial resistance of the magneto resistor will be decreased, and the sense line (4) will receive a high amount of current.Type: GrantFiled: February 29, 2000Date of Patent: November 13, 2001Assignee: Pageant Technologies, Inc.Inventor: Richard M. Lienau
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Patent number: 6278271Abstract: A magnetic field sensor for measurement of the three components (Bx, By, Bz) of a magnetic field comprises a Hall-effect element (1) and an electronic circuit (22). The Hall-effect element (1) comprises an active area (18) of a first conductivity type which is contacted with voltage and current contacts (2-5 or 6-9). Four voltage contacts (2-5) are present which are connected to inputs of the electronic circuit (22). By means of summation or differential formation of the electrical potentials (V2, V3, V4, V5) present at the voltage contacts (2-5), the electronic circuit (22) derives three signals (Vx, Vy, Vz) which are proportional to the three components (Bx, By, Bz) of the magnetic field.Type: GrantFiled: March 29, 1999Date of Patent: August 21, 2001Assignee: Sentron AGInventor: Christian Schott
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Patent number: 6252258Abstract: A high power rectifier device has an − drift layer on an N+ layer. A number of trench structures are recessed into the drift layer opposite the N+ layer; respective mesa regions separate each pair of trenches. Each trench structure includes oxide side-walls and an oxide bottom, and is filled with a conductive material. A metal layer contacts the trench structures and mesa regions, forming Schottky contacts at the metal-mesa interface. Shallow P regions extend from the bottom of each trench into the drift layer. Forward conduction occurs when the Schottky contact's barrier height is overcome. When reversed-biased, depletion regions form around the shallow P regions and the oxide side-walls which provide potential barriers across the mesa regions that shield the Schottky contacts from high electric fields, providing a high reverse blocking voltage and reducing reverse leakage current.Type: GrantFiled: August 10, 1999Date of Patent: June 26, 2001Assignee: Rockwell Science Center LLCInventors: Hsueh-Rong Chang, Rajesh Gupta