Magnetic Field Sensor In Integrated Circuit (e.g., In Bipolar Transistor Integrated Circuit) Patents (Class 257/427)
  • Patent number: 6204662
    Abstract: A magnetic field sensing element comprising a giant magnetic resistance element formed on a substrate for detecting a change in a magnetic field, an integrated circuit formed on the substrate for carrying out predetermined arithmetic processing based on a change in the magnetic field, and an input side protective resistor and an output side protective resistor provided on the input side and the output side, respectively, of the integrated circuit, wherein the metal film from which the input side resistor and the output side resistor are formed is identical to the metal film from which the integrated circuit is formed.
    Type: Grant
    Filed: October 21, 1998
    Date of Patent: March 20, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Izuru Shinjo, Yasuyoshi Hatazawa, Takuji Nada, Masahiro Yokotani
  • Patent number: 6201259
    Abstract: A magnetic material is used for the gate of a MOSFET, and tunnel junctions are formed between a magnetic electrode and the gate electrode, and between a nonmagnetic electrode and the gate electrode. The magnetic gate electrode is biased through the two tunnel junctions, and the drain current of the MOSFET changes with a change in an external magnetic field, according to the tunneling magnetoresistance effect. Thus, the MOSFET can be used as a magnetic sensor, as the reading element in a read/write head, or in a magnetic memory cell of a magnetic random access memory.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: March 13, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Toshihiko Sato, Ryoichi Nakatani
  • Patent number: 6191464
    Abstract: The present invention relates to the electrical isolation of components within an integrated opto-electronic device where two or more active regions are optically coupled, for example by a waveguide. The device includes a distributed feed-back laser diode and an electro-absorption modulator fabricated on the same substrate. The laser diode and modulator are: separated by an electrical isolation region; linked optically across the isolation region by a waveguide; and capped by a ternary cap layer through which ohmic contacts are made to operate the components. The cap layer extends to the isolation region from which a grounding contact is made to ground the cap layer in the isolation region and so to electrically isolate the laser diode and modulator from each other.
    Type: Grant
    Filed: September 14, 1998
    Date of Patent: February 20, 2001
    Assignee: Hewlett-Packard Company
    Inventor: Joseph Alan Barnard
  • Patent number: 6140139
    Abstract: A Hall effect ferromagnetic non-volatile random access memory cell comprising a Hall effect sensor adjacent to a ferromagnetic bit which is surrounded by a drive coil. The coil is electrically connected to a drive circuit, and when provided with an appropriate current creates a residual magnetic field in the ferromagnetic bit, the polarity of which determines the memory status of the cell. The Hall effect sensor is electrically connected via four conductors to a voltage source, ground, and two read sense comparator lines for comparing the voltage output to determine the memory status of the cell. The read and write circuits are arranged in a matrix of bit columns and byte rows. A method for manufacturing said Hall effect ferromagnetic non-volatile random access memory cell.
    Type: Grant
    Filed: December 22, 1998
    Date of Patent: October 31, 2000
    Assignees: Pageant Technologies, Inc., Estancia Limited Providencials
    Inventors: Richard Lienau, Laurence Sadwick
  • Patent number: 6114719
    Abstract: A magnetic tunnel junction (MTJ) memory cell uses a biasing ferromagnetic layer in the MTJ stack of layers that is magnetostatically coupled with the free ferromagnetic layer in the MTJ stack to provide transverse and/or longitudinal bias fields to the free ferromagnetic layer. The MTJ is formed on an electrical lead on a substrate and is made up of a stack of layers.
    Type: Grant
    Filed: May 29, 1998
    Date of Patent: September 5, 2000
    Assignee: International Business Machines Corporation
    Inventors: Frederick Hayes Dill, Robert Edward Fontana, Jr., Tsann Linn, Stuart Stephen Papworth Parkin, Ching Hwa Tsang
  • Patent number: 6072311
    Abstract: A magnetic sensor which can be produced in a small size at low cost with high productivity. The magnetic sensor includes: a main electric circuit; a magnet disposed on said main electric circuit; and a detector unit including an integrated circuit having a magnetic detector unit composed of a sensing resistor for outputting a signal in the form of a voltage change corresponding to the change in the magnetic field of the magnet, and having a filter for removing noise from a signal applied to a processing circuit of the integrated circuit.
    Type: Grant
    Filed: September 25, 1997
    Date of Patent: June 6, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Izuru Shinjo, Yasuyoshi Hatazawa
  • Patent number: 6064083
    Abstract: A hybrid memory device combines a ferromagnetic layer and a Hall Effect device. The ferromagnetic layer is magnetically coupled to a portion of a Hall plate, and when such plate is appropriately biased, a Hall Effect signal can be generated whose value is directly related to the magnetization state of the ferromagnetic layer. The magnetization state of the ferromagnetic layer can be set to correspond to different values of a data item to be stored in the hybrid memory device. The magnetization state is non-volatile, and a write circuit can be coupled to the ferromagnetic layer to reset or change the magnetization state to a different value. The memory device can also be fabricated to include an associated transistor (or other suitable switch) that functions as an isolation element to reduce cross-talk and as a selector for the output of the device when such is used in a memory array.
    Type: Grant
    Filed: February 24, 1997
    Date of Patent: May 16, 2000
    Inventor: Mark B. Johnson
  • Patent number: 6051441
    Abstract: The present invention, generally speaking, provides a magnetic memory element that is single domain in nature and has a geometry that mitigates the effects of half-select noise. In a preferred embodiment, the magnetic memory element takes the form of a magnetic post or tube having an aspect ratio in the range of 2:1 (more preferably 4:1). The outside diameter of the magnetic tube or post is preferably less than 0.8 microns, more preferably 0.6 microns or less. The magnetic post or tube then functions as a single magnetic domain. In the case of a magnetic tube, the skin of the tube is formed of a magnetic material and the interior of the tube is formed of a non-magnetic material. Suitable non-magnetic materials include copper, gold and silicon. The coercivity of the magnetic tube structure may be adjusted by adjusting the thickness of the magnetic skin. As a result, the magnetic memory element is readily scalable to smaller geometries as lithographic techniques improve.
    Type: Grant
    Filed: May 12, 1998
    Date of Patent: April 18, 2000
    Assignee: Plumeria Investments, Inc.
    Inventors: Joseph McDowell, James Harris, Juan Monico, Otto Voegli
  • Patent number: 5990533
    Abstract: Disclosed is a semiconductor device with a current detector, in which a semiconductor element for current-driving a load and a current-detecting element for detecting a driving current flowing through the semiconductor element are integrated on a common semiconductor pellet, and which has: a magnetoresistance effect element which has a two layer film composed of a magnetic film and a conductive film and means for supplying the two-layer film with a constant current and which has a resistivity depending on a magnetic field generated by the driving current; wherein the magnetoresistance effect element is vertically deposited above the semiconductor element to function as the current-detecting element.
    Type: Grant
    Filed: March 31, 1997
    Date of Patent: November 23, 1999
    Assignee: NEC Corporation
    Inventor: Yuji Hasegawa
  • Patent number: 5962905
    Abstract: A magnetoresistive element comprises an n-type emitter layer, a p-type base layer, and an n-type collector layer, the three layers being so arranged as to form a pn-junction with each other, an emitter ferromagnetic layer formed in contact with the n-type emitter layer, a base ferromagnetic layer formed in contact with the p-type base layer, a power source for applying, by way of the emitter ferromagnetic layer, a forward bias voltage between the n-type emitter layer and the p-type base layer, a power source for applying a backward bias voltage to the n-type collector layer and the p-type base layer and a power source for applying, by way of the base ferromagnetic layer, a bias voltage so as to inject minority carriers into the p-type base layer.
    Type: Grant
    Filed: September 16, 1997
    Date of Patent: October 5, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuzo Kamiguchi, Masashi Sahashi
  • Patent number: 5920500
    Abstract: A magnetic random access memory (10) has a plurality of stacked memory cells on semiconductor substrate (11), each cell basically having a portion of magnetic material (12), a word line (13), and sense line (14). Upper sense line (22) is electrically coupled to lower sense line (12) via conductor line (23) with ohmic contacts. In order to read and store states in the memory cell, lower and upper word lines (13, 18) are activated, thereby total magnetic field is applied to portion of magnetic material (11). This stacked memory structure allows magnetic random access memory (10) to integrate more memory cells on semiconductor substrate (11).
    Type: Grant
    Filed: August 23, 1996
    Date of Patent: July 6, 1999
    Assignee: Motorola, Inc.
    Inventors: Saied N. Tehrani, Xiaodong T. Zhu, Eugene Chen, Herbert Goronkin
  • Patent number: 5874749
    Abstract: A device for producing circularly polarized optical emission includes a light emitting semiconductor heterostructure, further including at least one semiconducting layer; a ferromagnetic contact having a magnetic moment, in electrical contact with a layer of the semiconductor heterostructure; and a contact electrically connected to a different region of the semiconductor heterostructure. This light emitting semiconductor heterostructure may be a light emitting diode (LED), or some other structure. The ferromagnetic contact injects spin polarized carriers (electrons or holes) into the semiconducting device, which recombine with their opposing carriers to produce circularly polarized light. A process for producing circularly polarized optical emission includes applying a bias across a light emitting semiconductor heterostructure having a contact with a net magnetic moment, therby injecting spin polarized carriers into the light emitting semiconductor heterostructure.
    Type: Grant
    Filed: June 29, 1993
    Date of Patent: February 23, 1999
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Berend T. Jonker
  • Patent number: 5872384
    Abstract: A controllable magnetic field generator applies a magnetic field to a transistor device at a particular orientation for producing a corresponding Lorentz force on the flow of carriers in the device to advantageously deflect the carriers to facilitate performance of a corresponding desired circuit function. Such a component arrangement is useable in a variety of circuit configurations for performing different circuit functions with a reduced number of devices and complexity relative to conventional circuit configurations. Exemplary circuit configurations for signal mixers, differential amplifiers, switches, and multiplexers and demultiplexers are possible using as little as one or two devices. According to another aspect of the invention, an inductor coil is used for the magnetic field generator and is formed on a substrate containing the transistor device to provide a component arrangement having relatively compact dimensions.
    Type: Grant
    Filed: January 17, 1997
    Date of Patent: February 16, 1999
    Assignee: Lucent Technologies Inc.
    Inventor: Thaddeus John Gabara
  • Patent number: 5821596
    Abstract: A micro-switch having a flexible conductive membrane which is moved by an external force, such as pressure from an air flow, to establish a connection between contact pads. The conductive membrane is stretched over one or more spacer pads to introduce deformation in the conductive membrane, thereby improving the accuracy and repeatability of the micro-switch. The spacing between the contact pads and the conductive membrane is precisely controlled by controlling the height difference between the spacer pads and the conductive pads. This height difference is determined by one or more precisely controlled etch operations.
    Type: Grant
    Filed: March 24, 1997
    Date of Patent: October 13, 1998
    Assignee: Integrated Micromachines, Inc.
    Inventors: Denny K. Miu, James R. W. Clymer, Paul A. Endter, Viktoria A. Temesvary, Tseng-Yang Hsu, Weilong Tang
  • Patent number: 5763928
    Abstract: A semiconductor structure is disclosed in which two regions of semiconductor material positioned adjacent to each other have different electron mobilities. By application of a magnetic field to the device, a Hall voltage is created across the boundary region between the regions of semiconductor material to modify their resistance. By detecting the change in resistance, the device can function as a memory cell, a programmable logic device, a head for hard disk drives, a measurement tool for measuring magnetic fields, or other apparatus.
    Type: Grant
    Filed: January 22, 1996
    Date of Patent: June 9, 1998
    Inventor: Falke Hennig
  • Patent number: 5757055
    Abstract: A triple drain magnetic field effect transistor (MagFET) for measuring magnetic field. The disclosed MagFET has a gate, a source, a center drain and two lateral drains and generates an increased Hall voltage between the two lateral drains. The MagFET provides a high conductivity channel disposed between the center drain and the source to allow a high sense current to flow. The relationship between the sense current and the background carrier concentration of the lateral drains of the transistor are effectively reduced or decoupled in order to provide the increased Hall voltage between the lateral drains in response to a magnetic field.
    Type: Grant
    Filed: September 17, 1996
    Date of Patent: May 26, 1998
    Assignee: Intel Corporation
    Inventor: Jeffrey C. Kalb, Jr.
  • Patent number: 5747859
    Abstract: A magnetic sensor has a three-terminal magnetic device consisting of an emitter, a base, and a collector. A semiconductor layer serving as the collector and a magnetic multilayered film serving as the base form a Schottky junction. The magnetic multilayered film has two magnetic films opposing each other with a nonmagnetic film between them. The emitter constructed of a metal film and the base are connected via a tunnel insulating film. The relationship between the magnetization directions in the magnetic films changes in accordance with an external magnetic field, and this changes the value of a current flowing through the magnetic device. The external magnetic field is sensed on the basis of this change in the current value.
    Type: Grant
    Filed: August 19, 1996
    Date of Patent: May 5, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Mizushima, Teruyuki Kinno, Takashi Yamauchi, Koichiro Inomata
  • Patent number: 5742080
    Abstract: A magnetically controlled logic cell comprising a semiconductor substrate (1) coated with a dielectric film and containing four field-effect transistors; four current supply buses in contact with the transistors and arranged on the surface of the dielectric film (17), two of the buses in question being power supply buses (34, 35), the other two being output buses (36, 37); and a region insulated from the substrate by a layer of concealed dielectric and by side insulation, the region in question containing four contacts configured symmetrically in pairs and connected to said transistors, power supply buses (34, 35) and output buses (36, 37).
    Type: Grant
    Filed: September 18, 1996
    Date of Patent: April 21, 1998
    Assignee: Aktsionernoe Obschestvo VL
    Inventors: Mikhail Lvovich Baranochnikov, Gennady Yakovlevich Krasnikov, Viktor Naumovich Mordkovich, Pavel Sergeevich Prikhodko, Valery Alexandrovich Mikhailov
  • Patent number: 5679973
    Abstract: A lateral Hall element includes a substrate, a first-conductivity type active layer formed on the substrate, a first second-conductivity type semiconductor layer formed to surround the first-conductivity type active layer and formed to a depth to reach the substrate, a pair of first first-conductivity type semiconductor layers of high impurity concentration selectively formed with a preset distance apart from each other on the surface of the first-conductivity type active layer, current supply electrodes respectively formed on the pair of first first-conductivity type semiconductor layers, a pair of second first-conductivity type semiconductor layers of high impurity concentration formed with a preset distance apart from each other on the surface of the first-conductivity type active layer in position different from the first first-conductivity type semiconductor layers, sensor electrodes respectively formed on the pair of second first-conductivity type semiconductor layers, and a plurality of second second-c
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: October 21, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Mochizuki, Kanae Fujii, Hideyuki Funaki
  • Patent number: 5654566
    Abstract: A new hybrid magnetic spin injected-FET structure can be used as a memory element for the nonvolatile storage of digital information, as well as in other environments, including for example logic applications for performing digital combinational tasks, or a magnetic field sensor. The hybrid FET uses ferromagnetic materials for the source and drain, and like a conventional FET, has two operating states determined by a gate voltage, "off" and "on". The ferromagnetic layers of the hybrid FET are fabricated to permit the device to have two stable magnetization states, parallel and antiparallel. In the "on" state the spin injected FET has two settable, stable resistance states determined by the relative orientation of the magnetizations of the ferromagnetic source and drain.
    Type: Grant
    Filed: May 6, 1996
    Date of Patent: August 5, 1997
    Inventor: Mark B. Johnson
  • Patent number: 5652445
    Abstract: A modified Hall Effect device can be used as a memory element for the nonvolatile storage of digital information. The novel device includes a ferromagnetic layer that covers a portion of a Hall plate and is electrically isolated from the Hall plate. The ferromagnetic layer on the Hall plate can be changed by an externally applied field, and permits the device to have two stable magnetization states (positive and negative) along an anisotropy axis, which can correspond to two different data values (0 or 1) when the device is used as a memory element. In another embodiment of the invention, the Hall plate is integrated with a conduction channel of a FET, and the ferromagnetic layer is incorporated in proximity to, or as part of the gate over the conducting channel. This device can be described as a "ferromagnetic gated FET.
    Type: Grant
    Filed: May 6, 1996
    Date of Patent: July 29, 1997
    Inventor: Mark B. Johnson
  • Patent number: 5629549
    Abstract: A new magnetic spin transistor is provided. This spin transistor can be used as a memory element or logic gate, such as an OR, AND, NOT, NOR and NAND gate. The state of the magnetic spin transistor logic gate is set inductively. This new magnetic spin transistor/gate can be operated with current gain. Furthermore, inductive coupling permits the linking of multiple spin transistors and spin transistor gates to perform combinational tasks. A half adder embodiment is specifically described, and other logic gates and combinations of half adders can be constructed to perform arithmetic functions as part of a microprocessor.
    Type: Grant
    Filed: April 21, 1995
    Date of Patent: May 13, 1997
    Inventor: Mark B. Johnson
  • Patent number: 5627398
    Abstract: The Hall-effect sensor HS' of the invention incorporated in a CMOS integrated circuit IC' is formed with a well 2' as the sensor active layer on a substrate 1'. Heavily doped regions 31', . . . , 34', in the well 2' are connected with sensor metal contacts 41', . . . , 44'. The upper plane S' of the substrate 1' is covered by a field oxide layer 5' the thickness thereof being between 0.8 .mu.m. and 1.0 .mu.m. Over the layer 5' in the region 50' surrounding the sensor contacts 41', . . . , 44', a polysilicon layer 6' is provided to block the disturbing influence of ions migrating in the field oxide layer 5'.
    Type: Grant
    Filed: February 2, 1994
    Date of Patent: May 6, 1997
    Assignee: Iskra Stevci--Industrija Merilne in Upravljalne Tehnike Kranj, D.O.O.
    Inventors: Silvo Zlebir, Andrej Belic
  • Patent number: 5572058
    Abstract: A vertical Hall element is formed within the epitaxial layer of a semiconductor and isolated from other components by a P type isolation diffusion. A position defining diffusion is used to accurately locate a plurality of openings within the position defining diffusion where contact diffusions are made. The position defining diffusion is made simultaneously with the base diffusion for transistors within the integrated circuit and the contact diffusions are made simultaneously with the emitter diffusion of transistors within the integrated circuit. Five contact diffusions are provided on the upper surface of the epitaxial layer and generally aligned within the region defined as the Hall element by the isolation diffusions. The center contact is used to provide electrical current flowing through the Hall effect element. Electrical current is split and flows to the two end contact diffusions.
    Type: Grant
    Filed: July 17, 1995
    Date of Patent: November 5, 1996
    Assignee: Honeywell Inc.
    Inventor: James R. Biard
  • Patent number: 5551586
    Abstract: A method of manufacturing a magneto-electric conversion device having a large rate of change of magnetic resistance and which is easy to position with respect to a magnetized surface, and a moving subject displacement detector using a magneto-electric conversion device manufactured by that method. A magnet which rotates together with the rotation of a drive gear is magnetized in alternately differing north and south poles, arranged in an equal sized section from a center portion thereof. An IC chip is positioned opposite to and at a distance from the magnetized surface of the magnet. Magneto-electric conversion devices are located on the IC chip. These magneto-electric conversion devices are formed by repeated alternate depositions, onto a surface of a single-crystal silicon substrate, of magnetic cobalt films having a thickness of several to several tens of angstroms and non-magnetic copper films having a thickness of several to several tens of angstroms.
    Type: Grant
    Filed: August 24, 1994
    Date of Patent: September 3, 1996
    Assignee: Nippondenso Co., Ltd.
    Inventors: Hirofumi Uenoyama, Kenichi Ao, Yasutoshi Suzuki, Yoshimi Yoshino, Motofumi Suzuki
  • Patent number: 5548151
    Abstract: In a Hall element, a semiconductor layer is surrounded by a first trench filled with an insulator. A first current supply portion of an n+-type semiconductor is disposed adjacent the semiconductor layer and the first trench. Second current supply portions are also disposed adjacent the semiconductor layer and the first trench and symmetrical with respect to the first current supply portion. Sensor portions of an n+-type semiconductor are disposed adjacent the semiconductor layer and the first trench at about the center between the first and second current supply portions, respectively. A magnetic flux perpendicular to the upper surface of the semiconductor layer can be detected by the foregoing arrangement.
    Type: Grant
    Filed: February 7, 1995
    Date of Patent: August 20, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Funaki, Hiroshi Mochizuki, Ryoji Maruyama, Kanae Fujii
  • Patent number: 5530345
    Abstract: For detecting the position of a magnetic element having a field component zeroing in at least one point in space, typically in a plane, a plurality of elementary Hall-effect sensors are integrated side by side and aligned in a direction perpendicular to the zeroing field component and to the current flowing through the elementary sensors. The elementary sensor generating a zero output voltage therefore indicates the zero position of the field component and consequently the position of the magnetic element with respect to the position sensor, so that The outputs of the elementary sensors provide a quantized numeric code indicating the position of the magnetic element.
    Type: Grant
    Filed: September 30, 1993
    Date of Patent: June 25, 1996
    Assignee: SGS-Thomson Microelectronics S.r.L.
    Inventors: Bruno Murari, Sandro Storti, Flavio Villa
  • Patent number: 5514899
    Abstract: A magnetometer or magnetic field sensor includes semiconductor material deposited laterally on an insulating substrate. The semiconductor material is alternating regions of n- and p-type silicon provided with two cathodes, an anode and a triggering node. Upon application of a triggering pulse to a switch on the sensor, a carrier domain is formed. In the presence of a magnetic field this carrier domain is deflected to one side thus causing an imbalance in the current collected at the two cathodes.
    Type: Grant
    Filed: May 11, 1994
    Date of Patent: May 7, 1996
    Assignees: Hong Kong University of Science and Technology, R and D Corporation Limited
    Inventors: Jack Lau, Christopher C. T. Nguyen, Ping Ko, Philip C. Chan
  • Patent number: 5502325
    Abstract: A magnetoresistor is monolithically integrated with an active circuit by growing a thin film magnetoresistor on a semiconductor substrate after the substrate has been doped and annealed for the active devices. The magnetoresistor is grown through a window in a mask, with the mask and magnetoresistor materials selected such that the magnetoresistor is substantially non-adherent to the mask. InSb is preferred for the magnetoresistor, Si.sub.3 N.sub.4 for the mask and GaAs for the substrate. The non-adherence allows the mask to be substantially thinner than the magnetoresistor without impairing the removal of the mask after the magnetoresistor has been established.
    Type: Grant
    Filed: May 30, 1995
    Date of Patent: March 26, 1996
    Assignee: Hughes Aircraft Company
    Inventors: Marko Sokolich, Hiroyuki Yamasaki, Huai-Tung Yang
  • Patent number: 5488250
    Abstract: A semiconductor structure is disclosed in which two regions of semiconductor material positioned adjacent to each other have different electron mobilities. By application of a magnetic field to the device, a Hall voltage is created across the boundary region between the regions of semiconductor material to modify their resistance. By detecting the change in resistance, the device can function as a memory cell, a programmable logic device, a head for hard disk drives, a measurement tool for measuring magnetic fields, or other apparatus.
    Type: Grant
    Filed: June 1, 1994
    Date of Patent: January 30, 1996
    Assignee: Falke Hennig
    Inventor: Falke Hennig
  • Patent number: 5471084
    Abstract: This invention relates to a magnetoresistive element used for a magnetic sensor, etc. A ferromagnetic magnetoresistive element thin film is formed so as to be electrically connected to and so as to overlap the upper end portion of an aluminum wiring metal on a substrate. Through using a vacuum heat treatment with a temperature between 350.degree. and 450.degree. C., a Ni--Al-based alloy is formed at the overlapping portion. Therefore, even when a surface protection film of silicon nitride is subsequently formed by plasma CVD on the substrate, the alloy prevents the nitriding of the upper end portion of the aluminum wiring metal. Accordingly, the surface can be protected from moisture by the silicon nitride film without increasing the contact resistance between the magnetoresistive element thin film and the wiring metal. Instead of the Ni--Al-based alloy, other conductive metals such as TiW, TiN, Ti, Zr, or the like may be used.
    Type: Grant
    Filed: July 30, 1993
    Date of Patent: November 28, 1995
    Assignee: Nippondenso Co., Ltd.
    Inventors: Yasutoshi Suzuki, Kenichi Ao, Hirofumi Uenoyama, Hiroki Noguchi, Koji Eguchi, Ichiro Ito, Yoshimi Yoshino
  • Patent number: 5446307
    Abstract: A pyramid shaped etch is made in an n or p type silicon substrate, or any symmetric etch with slanted edges, with p or n type implants in the slanted edges of the etch to form a PN junction. On this structure, an emitter and two collectors are formed by further implanting n+ regions in the PN junction region. To complete the device, ohmic contacts are formed to establish a base region. In operation, an appropriate bias is applied to the emitter through to the base and collectors. By so biasing the device, the device operates as a standard bipolar transistor. The currents of both the minority and majority carriers in the base region will respond to the component of the magnetic field perpendicular to the face of the slanted etch. As a result, there will be a difference in the currents in the collectors. These currents can then be simply calibrated to measure the magnetic field component.
    Type: Grant
    Filed: November 4, 1994
    Date of Patent: August 29, 1995
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Robert A. Lux, James F. Harvey, Charles D. Mulford, Jr., Louis C. Poli
  • Patent number: 5416353
    Abstract: A magnetoresistance effect element is prepared by successively forming one upon the other a first magnetic layer, a P- or N-type semiconductor layer, a second magnetic layer, and a magnetization fixing layer in this order on an insulating substrate. A Schottky junction is formed between the first magnetic layer and the semiconductor layer and between the semiconductor layer and the second magnetic layer. The relative angle between the magnetization direction within the first magnetic layer and the magnetization direction within the second magnetic layer is changed depending on the intensity of the magnetic field, leading to a change in the tunnel conductance.
    Type: Grant
    Filed: September 10, 1993
    Date of Patent: May 16, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuzo Kamiguchi, Atsuhito Sawabe, Masashi Sahashi, Hitoshi Iwasaki
  • Patent number: 5401999
    Abstract: Generally, and in one form of the invention, a semi-insulating semiconductor substrate 10 is provided having a first surface. An HBT subcollector region 12 of a first conductivity type is implanted in the substrate 10 at the first surface. A PIN diode region 14 of the first conductivity type is then implanted in the substrate 10 at the first surface and spaced from the HBT subcollector region 12. Next, an i-layer 16 is grown over the first surface. Next, an HBT base/PIN diode layer 22 of a second conductivity type is selectively grown on the i-layer 16 over the HBT subcollector region 12 and the PIN diode region 14. Then, an HBT emitter layer 24/26/28 of the first conductivity type is selectively grown over the HBT base/PIN diode layer 22, the HBT emitter layer 24/26/28 having a wider energy bandgap than the HBT base/PIN diode layer 22.
    Type: Grant
    Filed: February 10, 1993
    Date of Patent: March 28, 1995
    Assignee: Texas Instruments Incorporated
    Inventor: Burhan Bayraktaroglu
  • Patent number: 5332722
    Abstract: A novel nonvolatile memory element or cell comprising a memory means consisting of at least one superconducting ring (21, 22) and a detector means consisting of a MOSFET. The superconducting ring and the MOSFET are arranged in such a manner that a magnetic flux created by the superconducting ring (21, 22) passes through a channel zone of the MOSFET. Information is held in the superconducting ring in a form of permanent current and is detected electrically as variation in the conductivity of the channel zone of the MOSFET.
    Type: Grant
    Filed: March 8, 1993
    Date of Patent: July 26, 1994
    Assignee: Sumitomo Electric Industries, LTD
    Inventor: Mitsuka Fujihira
  • Patent number: 5324977
    Abstract: A hybrid integrated circuit device has a magnetic sensor formed directly on a substrate by photolithography. Alternatively, a flip chip type magnetic sensor is mounted on a substrate by fusion. The magnetic sensor can be mounted on the substrate with high positional precision.
    Type: Grant
    Filed: November 18, 1992
    Date of Patent: June 28, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Ziro Honda, Masato Imanaka
  • Patent number: 5323050
    Abstract: A collector arrangement for a magnetotransistor (10, 25, 30) and a method for making the magnetotransistor (10, 25, 30). A portion of a semiconductor substrate (11) is doped to form a base region (13). The base region is doped to form an emitter region (16, 26, 36) and a collector region (17, 27, 37) such that the collector region (17, 27, 37) surrounds and is spaced apart from the emitter region (16, 26, 36). Collector contacts (C.sub.1 -C.sub.8 and C.sub.5 '-C.sub.8 ', C.sub.13 -C.sub.16) are symmetrically formed in the collector region (17, 27, 37). In a three-dimensional magnetotransistor (10, 25) the collector contacts include split-collector contacts (C.sub.5 -C.sub.8 and C.sub.5 '-C.sub.8 ').
    Type: Grant
    Filed: June 1, 1993
    Date of Patent: June 21, 1994
    Assignee: Motorola, Inc.
    Inventor: Ljubisa Ristic
  • Patent number: 5262666
    Abstract: A semiconductor device including a substrate, a semiconductor element formed on the substrate, a terminal formed on the substrate and electrically connected to the semiconductor element, and a protective resistor formed on the substrate and electrically connected between the semiconductor element and the terminal. The resistor is composed of a ferromagnetic magnetoresistive material including Ni alloy. The device may be extended to detect magnetism by adding a magnetoresistive element composed of a ferromagnetic magnetoresistive material including the same Ni alloy as for the protective resistor and deposited at the same time. The device is superior in an anti-noise characteristic and is integrated. Furthermore, the device for detecting magnetism is formed with a lower cost.
    Type: Grant
    Filed: February 10, 1992
    Date of Patent: November 16, 1993
    Assignee: Nippondenso Co., Ltd.
    Inventors: Yoshimi Yoshino, Hideto Morimoto, Kenichi Ao
  • Patent number: 5208477
    Abstract: A FET device for sensing a magnetic field, the FET device comprising: a semiconductor material having a source at a first position therein and receiving means at a second position therein for receiving charge carriers; bias voltage means for providing a bias voltage between the source and the receiving means to produce a movement of charge carriers between the source and the receiving means; a channel layer disposed within the semiconductor material between the source and the receiving means through which the charge carriers move as a function of the bias voltage and the magnetic field being sensed; a resistive gate disposed between the source and the receiving means and above the channel layer; a first resistive gate contact disposed in a first preselected position with respect to the source; a second resistive gate contact disposed in a second preselected position with respect to the receiving means; a resistive gate voltage means for providing a resistive gate bias voltage between the first and second resi
    Type: Grant
    Filed: December 31, 1990
    Date of Patent: May 4, 1993
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Francis J. Kub
  • Patent number: 5179429
    Abstract: A magnetic field sensor is provided by a lateral bipolar transistor having a base region formed of a first conductivity type, an emitter region formed of a second conductivity type disposed in the base region for emitting charge carriers, and a collector region of the second conductivity type disposed in the base region for receiving charge carriers from the emitter region. A first and second metallic contact are connected to the collector region for splitting the collector current into first and second collector contact currents. In the presence of a magnetic field, a number of the charge carriers are deflected toward the first or the second metallic contact, depending on the orientation of the magnetic field, causing an imbalance in the first and second collector contact currents. The noise at the metallic contacts is the same as the noise of a single collector transistor which effectively correlates the noise with itself and cancels any distortion associated with the noise.
    Type: Grant
    Filed: March 30, 1992
    Date of Patent: January 12, 1993
    Assignee: Motorola, Inc.
    Inventor: Ljubisa Ristic
  • Patent number: 4832867
    Abstract: Lubricating oil composition which comprises: lubricating base oil,(A) at least one organophosphorus compound represented by the general formula (I), (II), (III), (IV), (V), (VI), (VII) or (VIII)and(B) at least one organomolybdenum compound selected from the group consisting of molybdenum oxysulfide alkylphosphorodithioates and molybdenum oxysulfide alkyldithiocarbamates.The lubricating oil composition is excellent in antiwear properties, anti-seizure properties, and corrosion resistance, and is suitable for gear oils, and bearing oils, also for internal combustion engine oils and automatic transmission fluids, and further for hydraulic fluids, metal working fluids.
    Type: Grant
    Filed: October 11, 1988
    Date of Patent: May 23, 1989
    Assignee: Idemitsu Kosan Co., Ltd.
    Inventors: Hiromichi Seiki, Hideo Igarashi