Abstract: A ferromagnetic thin-film based magnetic field detection system having a substrate supporting a magnetic field sensor in a channel with a first electrical conductor supported on the substrate positioned at least in part along the channel gap and in direct contact with at least some surface of the magnetic field sensor ands a second electrical conductor supported on the substrate positioned at least in part along the channel gap in a region thereof adjacent to, but separated from, the magnetic field sensor.

Abstract: The invention relates to a semiconductor component (100) comprising a semiconductor chip (10) configured as a wafer level package, a magnetic field sensor (11) being integrated into said semiconductor chip.

Abstract: A Hall device of the present invention includes a cross-shaped magnetometric sensing surface, a pair of power terminal portions and a pair of output terminal portions. The surface is formed of a rectangular and mutually opposed extensions provided on each side of the rectangular. The pair of power terminal portions is provided on a pair of the opposed extensions at the surface. The pair of output terminal portions is provided on another pair of the opposed extensions at the surface. Slits extending in each opposed direction completely split the power portions and the output portions and in partway split each extension at the surface, and each of the slits is provided with a separation layer of an insulator. An outline formed of the surface, the power portions and the output portions is quadrature-symmetrical with the center. The Hall device of this structure is highly sensitive to a magnetic field.

Abstract: A semiconductor structure includes a substrate; an isolation structure in the substrate, wherein the isolation structure defines a region therein; a first semiconductor region having at least a portion in the region defined by the isolation structure, wherein the first semiconductor region is of a first conductivity type; a second semiconductor region on the first semiconductor region, wherein the second semiconductor region is of a second conductivity type opposite the first conductivity type; and a third semiconductor region of the first conductivity type on the second semiconductor region, wherein the third semiconductor region has at least a portion higher than a top surface of the isolation structure.

Abstract: An optical semiconductor device 1a includes a lead frame 4 having an aperture 7, a submount 8 disposed on one surface of the lead frame 4 to close the aperture 7, a semiconductor optical element 3 which has an optical portion 6 and which is mounted on a surface of the submount 8 opposite to a surface on a side of the aperture 7 with the optical portion 6 facing the aperture 7 through the submount 8, a molding portion 10 made of a non-transparent molding resin which exposes at least a region including the aperture 7 on the other surface side of the lead frame 4 and which encapsulates the lead frame 4, the semiconductor optical element 3 and the submount 8, and a lens 9 disposed on the other surface of the lead frame 4 to close the aperture 7.

Abstract: In a magnetic detection device for obtaining an output from between a variable resistance element using the magnetoresistance effect and a reference resistance element, a balance between resistance values in the device can be easily adjusted in a wide range. A voltage is applied to a resistance adjusting unit, a reference resistance element, and a variable resistance element, which are serially connected, and is also applied to another variable resistance element, another reference resistance element, and another resistance adjusting unit, which are serially connected. When subjected to a magnetic field of a predetermined size, resistance values of the variable resistance elements change, and as a result, the potentials of output terminals change. Each of the resistance adjusting units includes serially connected parallel portions each including a plurality of parallel connected resistance elements.

Abstract: An arrangement of magnetic liners for the bit lines or word lines of an MRAM device that reduces or eliminates stray magnetic fields at the ends of the magnetic liners, thereby reducing the occurrence of offset fields over portions of the MRAM device due to the magnetic liners is described. The orientation of magnetization of adjacent magnetic liners is alternated, causing the end poles of the magnetic liners to cancel each other. The shapes of the ends of the magnetic liners are alternated to vary their switching fields. Methods are described that use this ability to vary the switching fields to alternate the orientation of magnetization of the magnetic liners.

Abstract: A Hall sensor on a semiconductor substrate includes a Hall plate in the semiconductor substrate, where the Hall plate includes a first zone having a first conduction type. The semiconductor substrate also include a second zone having a second conduction type. A space-charge zone in the semiconductor substrate separates the first zone and the second zone, first contacts supply a control current to the first zone, and second contacts supply a compensation current to the second zone.

Abstract: A method for generating an offset field for a magnetic random access memory (MRAM) device includes forming a first pinned layer integrally with a wordline, and forming a second pinned layer integrally with a bitline. An MRAM cell is disposed between the wordline and the bitline, the MRAM cell including a reference layer, an antiparallel free layer and a tunnel barrier therebetween. The first pinned layer is formed with an internal magnetization in a manner so as to create a first external field generally perpendicular to a long axis of the wordline, and the second pinned layer is formed with an internal magnetization in a manner so as to create a second external field generally perpendicular to a long axis of the bitline.

Abstract: A memory cell structure. A first conductive line is cladded by at least two first ferromagnetic layers respectively having a first easy axis and a second easy axis, a nano oxide layer located between the first ferromagnetic layers, and a first pinned ferromagnetic layer. The first and second easy axes are 90 degree twisted-coupled with the first easy axis parallel to the length of the first conductive line and the second easy axis perpendicular to the length of the first conductive line. A storage device is adjacent to the first conductive line, receiving a magnetic field generated from a current flowing through the first conductive line.

Abstract: A spin-current switchable magnetic memory element (and method of fabricating the memory element) includes a plurality of magnetic layers having a perpendicular magnetic anisotropy component, at least one of the plurality of magnetic layers including an alloy of a rare-earth metal and a transition metal, and at least one barrier layer formed adjacent to at least one of the plurality of magnetic layers.

Abstract: A pin junction element (10) includes a ferromagnetic p-type semiconductor layer (11) and a n-type semiconductor layer (12) which are connected via an insulating layer (13), and which shows a tunneling magnetic resistance according to the magnetization of the ferromagnetic p-type semiconductor layer (11) and the magnetization of the ferromagnetic n-type semiconductor layer (12). In this pin junction element (10), an empty layer is formed with an applied bias, thereby generating tunnel current via an empty layer. As a result, it is possible to generate tunnel current even when adopting a thicker insulating layer than that of the conventional tunnel magnetic resistance element.

Abstract: A compensation signal, which derives the mechanical stress, which acts on an integrated semiconductor circuit, from two partial compensation signals, which are generated by semiconductor elements with different stress characteristics, can be determined in more detail when the temperature dependence of a ratio of the partial compensation signals is also considered, wherein particularly a deviation of the ratio of the partial compensation signal to an ideal ratio is considered. Thereby, the rise in accuracy of the stress determination results from determining a deviation of the partial compensation signals, on which the stress determination is based, from a nominal behavior in a stress-free state, so that the deviation of the nominal behavior, which can be based, for example, on a variation of the process parameters in a production process of a semiconductor circuit, can also be considered, in addition to the known temperature behavior.

Abstract: Provided are a multi-purpose magnetic film structure using a spin charge, a method of manufacturing the same, a semiconductor device having the same, and a method of operating the semiconductor memory device. The multi-purpose magnetic film structure includes a lower magnetic film, a tunneling film formed on the lower magnetic film, and an upper magnetic film formed on the tunneling film, wherein the lower and upper magnetic films are ferromagnetic films forming an electrochemical potential difference therebetween when the lower and upper magnetic films have opposite magnetization directions.

Abstract: A magnetic random access memory according to an aspect of the present invention comprises a first magnetic layer in which a magnetization state is fixed, a second magnetic layer which has a shape different from that of the first magnetic layer and in which a magnetization state varies in accordance with write data, a non-magnetic layer which is arranged between the first magnetic layer and the second magnetic layer, and a third magnetic layer which surrounds the second magnetic layer.

Abstract: The invention generally relates to the field of spintronics, a branch of electronics using the magnetic spin properties of electrons. More particularly, the invention relates to the field of spin-valve transistors which can be used in numerous fields of electronics. The invention aims to propose an original arrangement for producing high-level and high-contrast collector currents simultaneously. The inventive spintronics transistor comprises a semiconductor emitter, a base fanning a spin valve and a metallic collector separated from the base by an insulating deposit. The emitter/base interface constitutes a Schottky barrier and the base/collector interface constitutes a tunnel-effect barrier.

Abstract: A magnetic memory with improved writing margin is provided, which includes a magnetic tunnel junction device and an adjustment layer. The magnetic tunnel junction device includes an anti-ferromagnetic layer, a pinned layer, a tunnel barrier layer, and a free layer formed sequentially. The adjustment layer is formed on one side of the magnetic tunnel junction device and contacts the free layer. The thickness of the adjustment layer is smaller than 20 nm and it employs Ru or Ru-base materials. The magnetic memory with improved writing margin may improve the switching uniformity and reduce the switching field of the free layer. Therefore, the current necessary for the write word line is reduced.

Abstract: Provided are new compositions of ruthenates in the pervoskite and layered pervoskite family, wherein the ruthenate compositions exhibit large magnetoresistance (MR) and electric-pulse-induced resistance (EPIR) switching effects, the latter observable at room temperature. This is the first time large MR and EPIR effects have been shown together in ruthenate compositions. Further provided are methods for synthesizing the class of ruthenates that exhibits such properties, as well as methods of use therefor in electromagnetic devices, thin films, sensors, semiconductors, insulators and the like.

Abstract: A magnetic random access memory with lower switching field is provided. The memory includes a first antiferromagnetic layer, a pinned layer formed on the first antiferromagnetic layer, a tunnel barrier layer formed on the pinned layer, a ferromagnetic free layer formed on the tunnel barrier layer, and a multi-layered metal layer. The multi-layered metal layer is formed by at least one metal layer, where the direction of the anisotropy axis of the antiferromagnetic layer and the ferromagnetic layer and that of the ferromagnetic free layer are arranged orthogonally. The provided memory has the advantage of lowering the switching field of the ferromagnetic layer, and further lowering the writing current.

Abstract: A vertical Hall effect apparatus, including methods thereof. A substrate layer can be provided upon which an epitaxial layer is formed. The epitaxial layer is surrounded vertically by one or more isolation layers. Additionally, an oxide layer can be formed above the epitaxial layer. A plurality of Hall effect elements can be formed within the epitaxial layer(s) and below the oxide layer, wherein the Hall effect elements sense the components of an arbitrary magnetic field in the plane of the wafer and perpendicular to the current flow in the hall element. A plurality of field plates can be formed above the oxide layer to control the inherited offset due to geometry control and processing of the vertical Hall effect apparatus, while preventing the formation of an output voltage of the vertical Hall effect apparatus at zero magnetic fields thereof.

Abstract: Semiconductor devices containing a MOSFET and an on-chip current sensor in the form of a magnetic resistive element are described. The magnetic resistive element (MRE) is proximate the MOSFET in the semiconductor device. The current flowing through the MOSFET generates a magnetic field that is detected by the MRE. The MRE comprises a metal film that is placed proximate the MOSFET during the normal fabrication processes, thereby adding little to the manufacturing complexity or cost. Using the MRE adds an accurate, effective, and cheap method to measure currents in MOSFET devices.

Abstract: A ultrathin magnetoelectric transducer and its manufacturing method are provided which enable the quality of mounting to be inspected nondestructively, and can reduce a footprint. The magnetoelectric transducer has a substrate composed of a nonmagnetic substrate, and includes bottom surface connecting electrodes whose leads have a first thickness, and side electrodes which are exposed by dicing and have the first thickness. A more sensitive Hall element has a high-permeability magnetic substrate as the substrate, and includes the bottom surface connecting electrodes whose leads have the first thickness, and the side electrodes exposed by the dicing and having the first thickness. The bottom surface connecting electrodes of the leads with the first thickness are formed across the internal electrodes of adjacent magnetoelectric transducers with maintaining the first thickness. The side electrodes with the first thickness are formed by cutting the center between the adjacent magnetoelectric transducers.

Abstract: Embodiments of the invention provide a polarization rotator. The polarization rotator may be integrated with a waveguide on a substrate, and may include a ferromagnetic semiconductor layer on the substrate, a first doped layer on the ferromagnetic semiconductor layer, and a second doped layer on the first doped layer.

Abstract: Devices including conductometric porous silicon gas sensors, methods of fabricating conductometric porous silicon gas sensors, methods of selecting a device, methods of detecting a concentration of a gas, and methods of analyzing data.

Abstract: A method for generating an offset field for a magnetic random access memory (MRAM) device includes forming a first pinned layer integrally with a wordline, and forming a second pinned layer integrally with a bitline. An MRAM cell is disposed between the wordline and the bitline, the MRAM cell including a reference layer, an antiparallel free layer and a tunnel barrier therebetween. The first pinned layer is formed with an internal magnetization in a manner so as to create a first external field generally perpendicular to a long axis of the wordline, and the second pinned layer is formed with an internal magnetization in a manner so as to create a second external field generally perpendicular to a long axis of the bitline.

Abstract: A method of forming a magneto-resistive memory element includes forming a groove in a layer of insulating material. A liner is formed conformably within the groove and the groove is filled with copper and then planarized. The electrically conductive material is provided an upper surface that is recessed relative to the upper surface of the layer of insulating material. A cap, which can be conductive (e.g., Ta) or resistive (e.g., TiAIN), is disposed over the electrically conductive material and within the groove. A surface of the cap that faces away from the electrically conductive material, is formed with an elevation substantially equal to that of the edge of the liner, or the cap can extend over the liner edge. At least one layer of magneto-resistive material is disposed over a portion of the cap. Advantageously, the cap can protect the copper line from harmful etch processes required for etching a MRAM stack, while keeping the structure planar after CMP.

Abstract: A spin valve transistor includes an emitter, a collector, a base between the emitter and the collector, a spin valve which includes a free layer structure, a self-pinned antiparallel (AP) pinned layer structure and a nonmagnetic spacer layer between the free layer structure and the AP pinned layer structure wherein the base includes at least the free layer structure.

Abstract: A memory device includes a first surface having memory chips disposed thereon, the memory chips defining an exterior face of the memory device, and a second surface opposite the exterior face. A magnetically permeable shield layer extends over at least one of the exterior face and the second surface of the memory device.

Abstract: Problems in reliability and cross-talk of MRAM, which are intrinsically ascribable to the structure thereof, are solved at the same time.

Abstract: A self aligned Hall sensor system and method are disclosed. A substrate can be provided. A Hall element and a plurality of contacts can then be formed upon the substrate wherein contacts are located in reference to one another. A field plate formed from polysilicon can then be formed upon the Hall element, wherein the field plate functions as a self-aligning mask for the plurality of contacts such that when the field plate is biased, a number of mobile carriers present at a surface of the field plate are minimized throughout the surface and up to and including the plurality of contacts, thereby minimizing asymmetry and offsets associated with the Hall element.

Abstract: A method of making a magnetic tunnel junction device is disclosed. The magnetic tunnel junction device includes a magnetic tunnel junction stack and an electrically non-conductive spacer in contact with a portion of the magnetic tunnel junction stack. The spacer electrically insulates a portion of the magnetic tunnel junction stack from an electrically conductive material used for a via that is in contact with the magnetic tunnel junction stack and a top conductor. The spacer can also prevent an electrical short between a bottom conductor and the top conductor. The spacer can prevent electrical shorts when the magnetic tunnel junction stack and a self-aligned via are not aligned with each other.

Abstract: A magnetic field sensor includes a transistor device having a base region, an emitter region, and a collector region. A barrier region disposed between the emitter region and the collector region to hamper charge carriers injected into the base region from the emitter region from reaching at least a portion of the collector region. The magnetic field sensor further includes a first voltage source to bias the collector region with respect to the base region to form a space-charge layer associated with the collector region.

Abstract: Spin-based microelectronic devices can be realized by utilizing spin-polarized ferromagnetic materials positioned near, or embedded in, a semiconductor channel of a microelectronic device. Applying an electric field across the channel can cause carriers flowing through the channel to deviate toward one of the ferromagnetic materials, such that the spin of the carriers tends to align with the spin polarization of the respective material. Such a process allows for the controlled spin-polarization of carriers in a semiconductor channel, and hence the development of spin-based microelectronics, without having to inject spin-polarized carriers from a ferromagnet into a semiconductor channel. Such a process avoids the Schottky barrier problem plaguing existing approaches to spin-based microelectronics, while allowing the devices to be based on silicon substrates that are well-known and used in the industry.

Abstract: Problems in reliability and cross-talk of MRAM, which are intrinsically ascribable to the structure thereof, are solved at the same time.

Abstract: A radiation-emitting and/or radiation-receiving semiconductor component, in which a radiation-emitting and/or radiation-receiving semiconductor chip is secured on a chip carrier part of a lead frame. The chip carrier part forms a trough in the region in which the semiconductor chip is secured wherein the inner surface of the trough is designed in such a way that it constitutes a reflector for the radiation emitted and/or received by the semiconductor chip.

Abstract: A sensing apparatus having a sensor formed in a monolithic semiconductor substrate and oriented orthogonally to a signal conditioner is provided. The sensor generates a sensing signal in response to a predetermined physical stimulus. A signal conditioner electrically connected and responsive to the sensor conditions the sensing signal. The sensor and signal conditioner are formed on wafer surfaces of a single semiconductor substrate cut from a semiconductor wafer. The substrate is separated, one portion having the sensor formed on therein and the other having formed therein the signal conditioner. The portions are oriented and rejoined to form a monolithic semiconductor substrate. The resulting monolithic substrate has, then, a sensor and signal conditioner formed therein and angled relative to each other at a predetermined angle.

Abstract: A noise-proof, integrated semiconductor current detector is disclosed which has formed in a semiconductor substrate a Hall generator for providing a Hall voltage in proportion to the strength of a magnetic field applied, a control current supply circuit for delivering a control current to the Hall generator, and a Hall voltage output circuit for putting out the Hall voltage for detection or measurement. The Hall generator, control current supply circuit, and Hall voltage output circuit are all exposed at one of the pair of opposite major surfaces of the semiconductor substrate. A current-path conductor is attached to this one major surface of the substrate via insulating layers for carrying a current to be detected.

Abstract: The present invention seeks to reduce the amount of current required for a write operation by using a process for forming the read conductor within a recessed write conductor, the write conductor itself formed within a trench of an insulating layer. The present invention protects the MTJ from the voltages created by the write conductor by isolating the write conductor and enabling the reduction of current necessary to write a bit of information.

Abstract: A spin transistor (10) comprises a spin injector (50) formed of a ferromagnetic material and constituting the emitter (20) of a three-terminal device, a spin filter (70) also formed of a ferromagnetic material and constituting a collector (40), and a semiconductor base (30) region. A tunnelling barrier (60) is formed of an insulating metal oxide such as aluminium oxide between the emitter (20) and the base (30). The tunnelling barrier (60) reduces the degree of spin depolarization as carriers are injected into the base (30), and permits selection of spin injection energy. In preferred embodiments, a second tunnelling barrier (80) may be formed between the base (30) and the collector (40). A method of manufacture is also provided.

Abstract: Elements of a sensor system are encapsulated into a single package. The sensor elements are covered with a flexible gel coat and then inserted into a molding tool cavity. Each element may be individually coated with a gel blob, or all elements may by coated with a single gel blob. One or more retractable pins are incorporated into the molding tool and in their normal position are each in contact with the gel. A molding compound is injected into the cavity so as to encapsulate the device and gel coat. When the pins are extracted and the device ejected from the molding cavity, one or more passageways in the molding are left defined by the pins. The passageways expose the flexible gel covering the device elements to the atmosphere. For pressure sensitive elements, the gel, being flexible, transfers the local air pressure to the pressure sensitive element. For optical elements, the exposed gel is preferably removed to allow for the passage of radiation to and from the device elements.

Abstract: Methods and apparatus are provided for reducing the overall radiation hardness of a semiconductor chip. A radiation detector and a failure memory are provided. A disable signal or signals is produced by the failure memory. The disable signal is a required input to a user logic function, such as an off chip driver, an off chip receiver, a clock, or a static random access memory. When the radiation detector detects radiation, that detection is stored in the failure memory. The disable signal, when active, causes some or all of the user function to be inoperative. This invention is particularly important when the semiconductor chip is produced in a silicon on insulator (SOI) Complementary Metal Oxide Semiconductor (CMOS) process, which is naturally radiation resistant.

Abstract: A circuit for generating an output signal, which depends on a physical useful quantity includes means for detecting the physical useful quantity, wherein the means for detecting is arranged to generate an output signal, which depends on the physical useful quantity, a control signal for the means for detecting and, with an unchanged control signal, on an external control quantity. The circuit further includes sensor means for detecting the external disturbing quantity and for providing a sensor signal, which depends on the external disturbing quantity and means for processing the sensor signal to influence the control signal dependent on the sensor signal such that the influence of the external disturbing quantity on the output signal is reduced.

Abstract: A magnetic sensor device formed using SOI CMOS techniques includes a substrate, a silicon oxide layer and in some cases a plurality of gated regions. A first terminal is located between two innermost gated regions and supplies a supply voltage. A second and a third terminal, each of which is located between two adjacent gated regions other than the two innermost gated regions, output positive and negative Hall voltages. By appropriately controlling a bias voltage to the gated regions, small changes in a magnetic field induces larger currents in channel regions under the gated regions, which, in turn, results in detectable Hall voltages.

Abstract: A digital magnetic memory cell device for read and/or write operations has a soft-magnetic read and/or write layer system formed of at least one soft-magnetic read and/or write layer, and a hard-magnetic reference layer system. The two systems are separated by a barrier layer. The soft-magnetic read and/or write layer is an amorphous layer with an induced or inducible uniaxial anisotropy.

Abstract: In a magnetic random access memory for generating an inductive magnetic flux by passing current into write wirings disposed closely to MTJ elements, whose resistance values varying depending on the magnetization array state of two magnetic layers of MTJ elements including two magnetic layers that hold a non-magnetic layer correspond to the stored information of “0”/“1”, and writing information by varying the magnetization direction of a free layer of the MTJ elements, the shape of the MTJ elements is warped so as to coincide substantially with the magnetic field curve generated from the write wirings.

Abstract: Ferromagnetic semiconductor-based compositions, systems and methods that enable studies of the dynamics and magnetoresistance of individual magnetic domain walls, and which provide enhanced magnetic switching effects relative to metallic ferromagnets. Aspects of the present invention are enabled by recent studies of the Giant Planar Hall effect (GPHE), and in particular GPHE in (Ga,Mn)As—based devices. The GPHE generally originates from macro- and micromagnetic phenomena involving single domain reversals. The GPHE-induced resistance change in multiterminal, micron-scale structures patterned from (Ga,Mn)As can be as large as about 100?, four orders of magnitude greater than analogous effects previously observed in metallic ferromagnets. Accordingly, recent data provide sufficient resolution to enable real-time observations of the nucleation and field-induced propagation of individual magnetic domain walls within such monocrystalline devices.

Abstract: The invention includes an opto-electronic device with a device region having a bottom surface and a top surface, and a top emitting/illumination window, an isolation region, wherein the isolation region electrically isolates the device region, a superstrate having a bottom surface and a top surface, wherein the bottom surface is positioned upon the top surface of the device region, a micro-optical device positioned upon the top surface of the superstrate. The invention also includes a method of fabricating an opto-electronic device having the steps of forming a device region with a top surface and a bottom surface upon a substrate, forming an isolation region, wherein the isolation region surrounds the device region, forming a superstrate upon the top surface of the device region, integrating a micro-optical device on the top surface of the device region, and bonding an integrated circuit to the bottom surface of the device region.

Abstract: A magnetic memory array comprises a plurality of magnetic memory cells, a magnetic shielding disposed adjacent to at least one of the magnetic memory cells to reduce magnetic interference with respect to another of the magnetic memory cells, and an insulator disposed as to separate at least a portion of the magnetic shielding from the at least one magnetic memory cell. The magnetic shielding may be a magnetic shield layer, patterned magnetic shield materials, and/or magnetic particles embedded in the insulator.

Abstract: A device for detecting a magnetic field, e.g., a magnetic field meter and an ammeter are described, the device having a first lateral magnetotransistor and a second lateral magnetotransistor, and in which the first and the second lateral magnetotransistors are complementary.

Abstract: A spin valve transistor, magnetic reproducing head including a spin valve transistor and a magnetic information storage system having the spin valve transistor. The spin valve transistor has a collector, a base formed on the collector, a tunnel barrier layer formed on the base and an emitter formed on the tunnel barrier layer. In one embodiment, the collector may have a first semiconductor layer of first composition and a second semiconductor layer of a different composition epitaxially grown. The base of the first spin valve transistor may be formed on the second semiconductor layer and have a magnetization pinned layer having a magnetization substantially fixed in an applied magnetic field, a nonmagnetic layer and a magnetization free layer having a magnetization free to rotate under the applied magnetic field. The emitter of a spin valve transistor of a second embodiment may include a semiconductor layer containing an oxide of transitional metal and contacting the tunnel barrier layer.