With Optical Shield Or Mask Means Patents (Class 257/435)
  • Patent number: 10403781
    Abstract: A hot carrier photodetector has been developed that absorbs approximately 80% of broadband infrared radiation by using a planar nanoscale back metal contact to silicon. Based on the principles of the hot carriers generation in ultrathin metal films, silicon-based CMOS image sensors are developed which operate in the IR diapason. The device uses absorption in an ultrathin metallic nanostructure to generate therein a non-equilibrium electron distribution which subsequently is injected into the silicon material via a Schottky contact at the Si body, thus generating a photoresponse to an incident IR radiation. A pixeled array including interconnected hot carriers metallic nanostructured cell(s) and traditional RGB elements is envisioned to enable RGB-IR imaging from a single silicon based wafer.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: September 3, 2019
    Assignee: University of Maryland, College Park
    Inventor: Jeremy Nathan Munday
  • Patent number: 10379323
    Abstract: The present technology relates to, for example, a lens attached substrate including a substrate which has a through-hole formed therein and a light shielding film formed on a side wall of the through-hole and a lens resin portion which is formed inside the through-hole of the substrate. The present technology can be applied to, for example, a lens attached substrate, a layered lens structure, a camera module, a manufacturing apparatus, a manufacturing method, an electronic device, a computer, a program, a storage medium, a system, and the like.
    Type: Grant
    Filed: July 15, 2016
    Date of Patent: August 13, 2019
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Yusuke Moriya, Masanori Iwasaki, Takashi Oinoue, Yoshiya Hagimoto, Hiroyasu Matsugai, Hiroyuki Itou, Suguru Saito, Keiji Ohshima, Nobutoshi Fujii, Hiroshi Tazawa, Toshiaki Shiraiwa, Minoru Ishida
  • Patent number: 10347672
    Abstract: An image sensor of reduced chip size includes a semiconductor substrate having an active pixel region in which a plurality of active pixels are disposed and a power delivery region in which a pad is disposed. A plurality of first transparent electrode layers is disposed over the semiconductor substrate, respectively corresponding to the plurality of active pixels. A second transparent electrode layer is integrally formed across the active pixels. An organic photoelectric layer is disposed between the plurality of first transparent electrode layers and the second transparent electrode layer. An interconnection layer is located at a level that is the same as or higher than an upper surface of the pad with respect to an upper main surface of the semiconductor substrate. The interconnection layer extends from the pad to the second transparent electrode layer, and includes a connector electrically connecting the pad and the second transparent electrode layer.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: July 9, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gwi-Deok Ryan Lee, Kwang-Min Lee, Beom-Suk Lee, Tae-Yon Lee
  • Patent number: 10276616
    Abstract: An image sensor device is provided. The image sensor device includes a semiconductor substrate having a first light-sensing region and a second light-sensing region adjacent to the first light-sensing region. The image sensor device includes an isolation structure in the semiconductor substrate and surrounding the first light-sensing region and the second light-sensing region. The image sensor device includes a reflective grid over the isolation structure and surrounding the first light-sensing region and the second light-sensing region. The image sensor device includes a first color filter over the first light-sensing region and extending into a first trench of the reflective grid. The image sensor device includes a second color filter over the second light-sensing region and extending into the first trench to be in direct contact with the first color filter in the first trench.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: April 30, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kun-Huei Lin, Yin-Chieh Huang, Yun-Wei Cheng, Yi-Hsing Chu, Cheng-Yuan Li, Chun-Hao Chou
  • Patent number: 10269848
    Abstract: A system and method for image sensing is disclosed. An embodiment comprises a substrate with a pixel region and a logic region. A first resist protect oxide (RPO) is formed over the pixel region, but not over the logic region. Silicide contacts are formed on the top of active devices formed in the pixel region, but not on the surface of the substrate in the pixel region, and silicide contacts are formed both on the top of active devices and on the surface of the substrate in the logic region. A second RPO is formed over the pixel region and the logic region, and a contact etch stop layer is formed over the second RPO. These layers help to reflect light back to the image sensor when light impinges the sensor from the backside of the substrate, and also helps prevent damage that occurs from overetching.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yin-Kai Liao, Han-Chi Liu, Yuan-Hung Liu, Dun-Nian Yaung, Jen-Cheng Liu
  • Patent number: 10263024
    Abstract: The present technology relates to an imaging element, an electronic device, and a manufacturing method that make it possible to prevent color mixing in a pixel adjacent to a phase difference detection pixel and to make the light receiving sensitivity high or more. An anti-reflection film is formed only on the side wall of a light blocking unit that blocks part of the incident light on a photo diode of phase difference detection pixels for detecting the phase difference out of a plurality of pixels. Thereby, the light reflected at the side wall of the light blocking unit does not enter a photo diode of an adjacent pixel, and therefore color mixing is prevented. Furthermore, since the anti-reflection film is not formed on an interlayer layer, the light receiving sensitivity of the light that directly enters the photo diode is not reduced. The present technology can be applied to imaging elements.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: April 16, 2019
    Assignee: Sony Corporation
    Inventor: Masashi Nakata
  • Patent number: 10249675
    Abstract: An image sensor comprises a semiconductor material having a front side and a back side opposite the front side; a dielectric layer disposed on the front side of the semiconductor material; a poly layer disposed on the dielectric layer; an interlayer dielectric material covering both the poly layer and the dielectric layer; an inter-metal layer disposed on the interlayer dielectric material, wherein a metal interconnect is disposed in the inter-metal layer; and a contact pad trench extending from the back side of the semiconductor material into the semiconductor material, wherein the contact pad trench comprises a contact pad disposed in the contact pad trench, wherein the contact pad and the metal interconnect are coupled with a plurality of contact plugs; and at least an air gap isolates the contact pad and side walls of the contact pad trench.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: April 2, 2019
    Assignee: OmniVision Technolgies, Inc.
    Inventors: Qin Wang, Gang Chen
  • Patent number: 10249670
    Abstract: The present disclosure relates to a solid-state imaging device that can reduce crosstalk interference, and to an electronic apparatus. In the upper chip, VSLs, VSLs, and control lines are stacked in this order from the bottom. That is, in the stacked solid-state imaging device, the control lines are laid out in the uppermost layer of the upper chip. In this structure, the influence of a lower chip on the two sets of VSLs can be shielded by the control lines. The present disclosure can be applied to CMOS solid-state imaging devices to be used in electronic apparatuses, such as a camera apparatus.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: April 2, 2019
    Assignee: Sony Corporation
    Inventor: Hiroaki Seko
  • Patent number: 10241033
    Abstract: A spectroscopic sensor that applies lights in a wavelength band containing plural wavelengths to an object and spectroscopically separates reflected lights or transmitted lights from the object using plural light band-pass filters that transmit the respective specific wavelengths and plural photosensor parts to which corresponding transmitted lights are input based on output results of independent photosensors. The spectroscopic sensor may be integrated in a semiconductor device or module by integration using a semiconductor process and downsizing may be realized.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: March 26, 2019
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Akira Uematsu, Yoichi Sato, Akira Komatsu, Kunihiko Yano
  • Patent number: 10229941
    Abstract: A solid-state imaging element including: a plurality of unit pixels each having a photoelectric conversion part, a transfer part that transfers a charge generated by the photoelectric conversion part to a predetermined region, and a draining part that drains a charge in the predetermined region; a light shielding film being formed under an interconnect layer in the unit pixels and shield, from light, substantially the whole surface of the plurality of unit pixels except a light receiving part of the photoelectric conversion part; and a voltage controller controlling a voltage applied to the light shielding film. The voltage controller sets the voltage applied to the light shielding film to a first voltage in charge draining by the draining part and sets the voltage applied to the light shielding film to a second voltage higher than the first voltage in charge transfer by the transfer part.
    Type: Grant
    Filed: June 10, 2014
    Date of Patent: March 12, 2019
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yusuke Oike, Takashi Machida
  • Patent number: 10204956
    Abstract: A semiconductor structure includes a semiconductive substrate includes a first side and a second side opposite to the first side, a radiation sensing device disposed in the semiconductive substrate, an interlayer dielectric (ILD) disposed over the first side of the semiconductive substrate, and a conductive pad disposed in the semiconductive substrate and the ILD, wherein a thickness of the conductive pad is less than a sum of a thickness of the semiconductive substrate and a thickness of the ILD.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: February 12, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chia-Yu Wei, Chin-Hsun Hsiao, Yi-Hsing Chu, Yen-Liang Lin, Yung-Lung Hsu, Hsin-Chi Chen
  • Patent number: 10197716
    Abstract: An optical filter, a sensor device including the optical filter, and a method of fabricating the optical filter are provided. The optical filter includes one or more dielectric layers and one or more metal layers stacked in alternation. The metal layers are intrinsically protected by the dielectric layers. In particular, the metal layers have tapered edges that are protectively covered by one or more of the dielectric layers.
    Type: Grant
    Filed: June 18, 2014
    Date of Patent: February 5, 2019
    Assignee: VIAVI Solutions Inc.
    Inventors: Georg J. Ockenfuss, Tim Gustafson, Jeffrey James Kuna, Markus Bilger, Richard A Bradley
  • Patent number: 10128285
    Abstract: The present disclosure relates to an imaging element, an electronic device, and an information processing device capable of more easily providing a wider variety of photoelectric conversion outputs.
    Type: Grant
    Filed: January 23, 2017
    Date of Patent: November 13, 2018
    Assignee: Sony Corporation
    Inventors: Susumu Ooki, Masashi Nakata
  • Patent number: 10043842
    Abstract: An imaging device includes a pixel circuit region that includes a plurality of pixel circuits arranged in an array therein and a plurality of light guide portions. The imaging device also includes a peripheral circuit region that is positioned at a periphery of the pixel circuit region and includes a peripheral circuit. The imaging device also includes an intermediate region that is positioned between the pixel circuit region and the peripheral circuit region, forms a boundary with the pixel circuit region and the peripheral circuit region, and includes a plurality of dummy light guide portions and a plurality of contacts through which a reference potential of the plurality of pixel circuits is supplied.
    Type: Grant
    Filed: October 3, 2014
    Date of Patent: August 7, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Aiko Kato, Shingo Kitamura, Takehiro Toyoda, Hiroaki Naruse
  • Patent number: 10027912
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. First and second chips are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and quantizing the sampled signals to obtain digital signals.
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: July 17, 2018
    Assignee: Sony Corporation
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Patent number: 9923006
    Abstract: A radiation tolerant optical detection element includes: a p-type base-body region; a gate insulating film provided on an upper surface of the base-body region; an n-type buried charge-generation region buried in an upper portion of the base-body region; an n-type charge-readout region buried in an upper portion of the base-body region on the inner-contour side of the buried charge-generation region; an n-type reset-drain region buried on the inner-contour side of the charge-readout region; a transparent electrode provided on the gate insulating film above the buried charge-generation region; and a reset-gate electrode provided on a portion of the gate insulating film between the charge-readout region and the reset-drain region.
    Type: Grant
    Filed: January 23, 2017
    Date of Patent: March 20, 2018
    Assignees: BROOKMAN TECHNOLOGY, INC., IKEGAMI TSUSHINKI CO., LTD., JAPAN ATOMIC ENERGY AGENCY
    Inventors: Takashi Watanabe, Tomohiro Kamiyanagi, Kunihiko Tsuchiya, Tomoaki Takeuchi
  • Patent number: 9875971
    Abstract: Magnetic random access memory (MRAM) packages with magnetic shield protections and methods of forming thereof are presented. Package contact traces are formed on the first major surface of the package substrate and package balls are formed on the second major surface of the package substrate. A die having active and inactive surfaces is provided on the first major surface of the package substrate. The die includes a magnetic storage element, such as an array of magnetic tunnel junctions (MTJs), formed in the die, die microbumps formed on the active surface. The package includes a top magnetic shield layer formed on the inactive surface of the die. The package may also include a first bottom magnetic shield in the form of magnetic shield traces disposed below the package contact traces. The package may further include a second bottom magnetic shield in the form of magnetic permeable underfill dielectric material.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: January 23, 2018
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Bharat Bhushan, Juan Boon Tan, Wanbing Yi
  • Patent number: 9871070
    Abstract: A backside illuminated (BSI) image sensor for biased backside deep trench isolation (BDTI) and/or biased backside shielding is provided. A photodetector is arranged in a semiconductor substrate, laterally adjacent to a peripheral opening in the semiconductor substrate. An interconnect structure is arranged under the semiconductor substrate. A pad structure is arranged in the peripheral opening, and protrudes through a lower surface of the peripheral opening to the interconnect structure. A conductive layer is electrically coupled to the pad structure, and extends laterally towards the photodetector from over the pad structure. A method for manufacturing the BSI image sensor is also provided.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: January 16, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tzu-Hsuan Hsu, Ching-Chun Wang, Chien-Hsien Tseng, Chen-Jong Wang, Feng-Chi Hung, Wen-I Hsu
  • Patent number: 9838620
    Abstract: A sensor includes a plurality of image sensors, wherein each image sensor of the plurality of image sensors is configured to detect a first spectrum of light. The sensor further includes a depth sensing pixel bonded to each image sensor of the plurality of image sensors, wherein the depth sensing pixel is configured to detect a second spectrum of light different from the first spectrum.
    Type: Grant
    Filed: January 12, 2017
    Date of Patent: December 5, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Calvin Yi-Ping Chao, Kuo-Yu Chou, Chih-Min Liu
  • Patent number: 9825085
    Abstract: A semiconductor image sensor includes a substrate having a first side and a second side that is opposite the first side. An interconnect structure is disposed over the first side of the substrate. A plurality of radiation-sensing regions is located in the substrate. The radiation-sensing regions are configured to sense radiation that enters the substrate from the second side. A buffer layer is disposed over the second side of the substrate. A plurality of elements is disposed over the buffer layer. The elements and the buffer layer have different material compositions. A plurality of light-blocking structures is disposed over the plurality of elements, respectively. The radiation-sensing regions are respectively aligned with a plurality of openings defined by the light-blocking structures, the elements, and the buffer layer.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: November 21, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yun-Wei Cheng, Chen Chiu-Jung, Volume Chien, Kuo-Cheng Lee, Yung-Lung Hsu, Chen Hsin-Chi
  • Patent number: 9818735
    Abstract: A method of manufacturing a semiconductor device includes providing a first semiconductor chip comprising a first metallic structure, a first surface and a second surface opposite to the first surface; providing a second semiconductor chip comprising a second metallic structure; bonding the first semiconductor chip with the second semiconductor chip on the second surface; forming a first recessed portion including a first sidewall and a first bottom surface coplanar with a top surface of the first metallic structure; forming a second recessed portion including a second sidewall and a second bottom surface coplanar with a top surface of the second metallic structure; forming a dielectric layer over the first sidewall and the second sidewall; and forming a conductive material over the dielectric layer, the top surface of the first metallic structure and the top surface of the second metallic structure.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: November 14, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Cheng-Ying Ho, Wen-De Wang, Jen-Cheng Liu, Dun-Nian Yaung
  • Patent number: 9806096
    Abstract: An object of the present invention is to prevent the deterioration of a TFT (thin film transistor). The deterioration of the TFT by a BT test is prevented by forming a silicon oxide nitride film between the semiconductor layer of the TFT and a substrate, wherein the silicon oxide nitride film ranges from 0.3 to 1.6 in a ratio of the concentration of N to the concentration of Si.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: October 31, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masahiko Hayakawa, Mitsunori Sakama, Satoshi Toriumi
  • Patent number: 9786713
    Abstract: A solid-state image pickup apparatus includes an image pickup pixel and a focus detection pixel. The image pickup pixel includes a micro lens and a photoelectric conversion unit that receives light incident from the micro lens. The focus detection pixel includes the micro lens, the photoelectric conversion unit, and a light shielding unit that shields part of light incident on the photoelectric conversion unit. In the solid-state image pickup apparatus, the micro lens is uniformly formed in the image pickup pixel and the focus detection pixel, and the focus detection pixel further includes a high refractive index film formed under the micro lens.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: October 10, 2017
    Assignee: Sony Corporation
    Inventor: Osamu Oka
  • Patent number: 9768214
    Abstract: A device includes a substrate having a non-pixel region and a pixel region; sensor elements disposed in the pixel region; and a metal layer disposed over the substrate. The metal layer includes a metal shield disposed in the non-pixel region and first trenches over the respective sensor elements in the pixel region. The device further includes a dielectric layer disposed over the metal layer. The dielectric layer has second trenches over the respective sensor elements and third trenches over the metal shield. The first trenches are completely through the metal layer, and the second trenches are partially through the dielectric layer.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: September 19, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
    Inventors: Chun-Hao Chou, Yin-Chieh Huang, Kuo-Cheng Lee, Chi-Cherng Jeng, Hsin-Chi Chen
  • Patent number: 9754901
    Abstract: In one embodiment, a semiconductor device comprises: a bulk comprising a bulk material characterized by a potential designated as a ground, and a bulk thinning detector being a section of the bulk that includes one or more conducting materials. The bulk thinning detector is adapted to be connected to the ground when a part of the bulk material is underneath and contiguous with a portion of the one or more conducting materials in the section. The semiconductor device further comprises: one more electronic components in at least one active layer of the semiconductor device, the one or more electronic components and the bulk thinning detector being included in a circuit for detecting whether there is backside thinning of the semiconductor device by detecting whether at least one of: the bulk thinning detector is disconnected from the ground, or there is a change in resistance of the bulk thinning detector.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: September 5, 2017
    Assignee: Cisco Technology, Inc.
    Inventors: Elad Peer, Rami Sudai, Elena Sidorov
  • Patent number: 9721985
    Abstract: A solid state imaging device including a semiconductor layer comprising a plurality of photodiodes, a first antireflection film located over a first surface of the semiconductor layer, a second antireflection film located over the first antireflection film, a light shielding layer having side surfaces which are adjacent to at least one of first and the second antireflection film.
    Type: Grant
    Filed: February 7, 2017
    Date of Patent: August 1, 2017
    Assignee: Sony Corporation
    Inventors: Susumu Hiyama, Kazufumi Watanabe
  • Patent number: 9691800
    Abstract: An image sensor includes a substrate including photoelectric conversion elements for a plurality of unit pixels, which are two-dimensionally arranged in a pixel array; a light transmission member on the substrate; a grid structure in the light transmission member and having multiple layers; and a light collection member on the light transmission member, wherein the grid structure is tilted for respective chief ray angles of the plurality of unit pixels according to locations of the plurality of unit pixels in the pixel array.
    Type: Grant
    Filed: August 5, 2015
    Date of Patent: June 27, 2017
    Assignee: SK HYNIX Inc.
    Inventor: Yun-Hui Yang
  • Patent number: 9666632
    Abstract: A solid state imaging device including a semiconductor layer comprising a plurality of photodiodes, a first antireflection film located over a first surface of the semiconductor layer, a second antireflection film located over the first antireflection film, a light shielding layer having side surfaces which are adjacent to at least one of first and the second antireflection film.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: May 30, 2017
    Assignee: Sony Corporation
    Inventors: Susumu Hiyama, Kazufumi Watanabe
  • Patent number: 9620553
    Abstract: A semiconductor device includes a substrate, a semiconductor layer, light-sensing devices, a transparent dielectric layer and a grid shielding layer. The semiconductor layer overlies the substrate, and has a first surface and a second surface opposite to the first surface. The semiconductor layer includes microstructures disposed on the second surface of the semiconductor layer. The light-sensing devices are disposed on the first surface of the semiconductor layer. The transparent dielectric layer is disposed on the second surface of the semiconductor layer, and covers the microstructures. The grid shielding layer extends from the first surface of the semiconductor layer toward the second surface of the semiconductor layer, and surrounds each of the light-sensing devices to separate the light-sensing devices from each other, in which a depth of the grid shielding layer is greater than two-thirds of a thickness of the semiconductor layer.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: April 11, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien-Chang Huang, Hsing-Chih Lin, Chien-Nan Tu, Yu-Lung Yeh
  • Patent number: 9601539
    Abstract: A solid state imaging device including a semiconductor layer comprising a plurality of photodiodes, a first antireflection film located over a first surface of the semiconductor layer, a second antireflection film located over the first antireflection film, a light shielding layer having side surfaces which are adjacent to at least one of first and the second antireflection film.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: March 21, 2017
    Assignee: Sony Corporation
    Inventors: Susumu Hiyama, Kazufumi Watanabe
  • Patent number: 9559237
    Abstract: In one aspect, semiconductor structures are described herein. A semiconductor structure, in some implementations, comprises a first semiconductor layer having a first bandgap and a first lattice constant and a second semiconductor layer having a second bandgap and a second lattice constant. The second lattice constant is lower than the first lattice constant. Additionally, a transparent metamorphic buffer layer is disposed between the first semiconductor layer and the second semiconductor layer. The buffer layer has a constant or substantially constant bandgap and a varying lattice constant. The varying lattice constant is matched to the first lattice constant adjacent the first semiconductor layer and matched to the second lattice constant adjacent the second semiconductor layer. The buffer layer comprises a first portion comprising AlyGazIn(1-y-z)As and a second portion comprising GaxIn(1-x)P.
    Type: Grant
    Filed: April 10, 2013
    Date of Patent: January 31, 2017
    Assignee: THE BOEING COMPANY
    Inventors: Xing-Quan Liu, Christopher M. Fetzer, Daniel C. Law, Richard R. King
  • Patent number: 9523895
    Abstract: An embodiment of the invention relates to a TFT-LCD array substrate comprising a substrate, a gate line and a data line formed on the substrate, a pixel electrode and a thin film transistor formed in a pixel region defined by the gate line and the data line, wherein the thin film transistor comprises a gate electrode, a source electrode, and a transparent drain electrode, and the transparent drain electrode is electrically connected with the pixel electrode.
    Type: Grant
    Filed: April 14, 2014
    Date of Patent: December 20, 2016
    Assignees: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wei Li, Jeong Hun Rhee
  • Patent number: 9478581
    Abstract: A device includes a semiconductor substrate having a front side and a backside, a photo-sensitive device disposed on the front side of the semiconductor substrate, and a first and a second grid line parallel to each other. The first and the second grid lines are on the backside of, and overlying, the semiconductor substrate. The device further includes an adhesion layer, a metal oxide layer over the adhesion layer, and a high-refractive index layer over the metal layer. The adhesion layer, the metal oxide layer, and the high-refractive index layer are substantially conformal, and extend on top surfaces and sidewalls of the first and the second grid lines.
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: October 25, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shiu-Ko JangJian, Min Hao Hong, Ting-Chun Wang, Chung-Ren Sun
  • Patent number: 9442603
    Abstract: The present invention is directed to a touch panel. The touch panel includes an optical layer disposed on a bottom surface of at least one peripheral edge of a transparent substrate. A light shielding layer is disposed on at least a portion of a bottom surface of the optical layer. A touch sensing layer is disposed below the transparent substrate and the light shielding layer.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: September 13, 2016
    Assignee: Henghao Technology Co. Ltd.
    Inventors: Kuan-Yen Ma, Chien-Wen Lai
  • Patent number: 9425231
    Abstract: An image sensor includes: a first inter-layer dielectric layer formed over a front side of a substrate including photoelectric conversion regions; isolation structures each of which penetrates through the first inter-layer dielectric layer and has a portion buried in the substrate; first metal lines formed over the first inter-layer dielectric layer to correspond to the photoelectric conversion regions; and an optical filter and a light condenser formed over a back side of the substrate.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: August 23, 2016
    Assignee: SK Hynix Inc.
    Inventors: Yeoun-Soo Kim, Il-Ho Song
  • Patent number: 9425058
    Abstract: Methods of patterning a blanket layer (a target etch layer) on a substrate are described. The methods involve multiple patterning steps of a mask layer several layers above the target etch layer. The compound pattern, made from multiple patterning steps, is later transferred in one set of operations through the stack to save process steps.
    Type: Grant
    Filed: July 24, 2014
    Date of Patent: August 23, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Hun Sang Kim, Jinhan Choi, Shinichi Koseki
  • Patent number: 9425049
    Abstract: The present disclosure relates to a method for performing a self-aligned litho-etch (SALE) process. In some embodiments, the method is performed by forming a first cut layer over a substrate having a multi-layer hard mask with a first layer and an underlying second layer. A first plurality of openings, cut according to the first cut layer, are formed to expose the second layer at a first plurality of positions corresponding to a first plurality of shapes of a SALE design layer. A spacer material is deposited onto sidewalls of the multi-layer hard mask to form a second cut layer. A second plurality of openings, cut according to the second cut layer, are formed to expose the second layer at a second plurality of positions corresponding to a second plurality of shapes of the SALE design layer. The second layer is etched according to the first and second plurality of openings.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: August 23, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kuan-Wei Huang, Chia-Ying Lee, Ming-Chung Liang
  • Patent number: 9374511
    Abstract: A back-illuminated type solid-state image pickup unit in which a pad wiring line is provided on a light reception surface and which is capable of improving light reception characteristics in a photoelectric conversion section by having a thinner insulating film in a pixel region. The solid-state image pickup unit includes a sensor substrate having a pixel region in which photoelectric conversion sections are formed in an array, and a drive circuit is provided on a surface opposed to a light reception surface for the photoelectric conversion sections of the sensor substrate. A through hole via reaching the drive circuit from the light reception surface of the sensor substrate is provided in a peripheral region located outside the pixel region. A pad wiring line directly laminated on the through hole via is provided on the light reception surface in the peripheral region.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: June 21, 2016
    Assignee: Sony Corporation
    Inventor: Kentaro Akiyama
  • Patent number: 9366817
    Abstract: A method is provided to integrate all active and passive integrated optical devices on a silicon (Si)-based integrated circuit (IC). A Si-based substrate, instead of a Si-on-insulator (SOI) substrate, is used for integrating the devices. Therefore, cost is down and heat dissipation efficiency is enhanced. Besides, rapid melt growth (RMG) is used for solving problems on integrating the electric circuit and the optical devices. The present invention can be used to develop a proactive optical transceivers on a standard chip; or, to fully and compatibly integrate all devices on a circuit for an optical communication chip.
    Type: Grant
    Filed: June 19, 2014
    Date of Patent: June 14, 2016
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Ming-Chang Lee, Chih-Kuo Tseng
  • Patent number: 9357956
    Abstract: A spectroscopic sensor has plural angle limiting filters that limit incident angles of incident lights, plural light band-pass filters that transmit specific wavelengths, and plural photodiodes to which corresponding transmitted lights are input. The spectroscopic sensor is a semiconductor device in which the angle limiting filters, the light band-pass filters, and the photodiodes are integrated, and, assuming that the surface on which impurity regions for the photodiodes are formed is a front surface of a semiconductor substrate, holes for receiving lights are formed in the impurity regions from the rear surface side.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: June 7, 2016
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Akira Uematsu, Noriyuki Nakamura, Akira Komatsu, Kunihiko Yano
  • Patent number: 9337225
    Abstract: A backside illumination semiconductor image sensing device includes a semiconductor substrate. The semiconductor substrate includes a radiation sensitive diode and a peripheral region. The peripheral region is proximal to a sidewall of the backside illumination semiconductor image sensing device. The backside illumination semiconductor image sensing device further includes a first anti reflective coating (ARC) on a backside of the semiconductor substrate and a dielectric layer on the first anti reflective coating. Additionally, a radiation shielding layer is disposed on the dielectric layer. Moreover, the backside illumination semiconductor image sensing device has a photon blocking layer on the sidewall of the backside illumination semiconductor image sensing device. The at least a portion of a sidewall of the radiation shielding layer is not covered by the photon blocking layer and the photon blocking layer is configured to block photons penetrating into the semiconductor substrate.
    Type: Grant
    Filed: September 13, 2013
    Date of Patent: May 10, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Hung-Wen Hsu, Jung-I Lin, Ching-Chung Su, Jiech-Fun Lu, Yeur-Luen Tu, Chia-Shiung Tsai
  • Patent number: 9306091
    Abstract: A light receiving device includes an optical substrate disposed over a light receiving surface. In the optical substrate, a first optical multilayer film is formed on an incident surface, a second optical multilayer film is formed on a surface opposite the incident surface, and a third optical multilayer film is formed on the light receiving surface. Light of two wavelength regions separated from each other is transmitted, and light of wavelength regions other than the two wavelength regions is blocked. The two wavelength regions include a first wavelength region on the short wavelength side and a second wavelength region on the long wavelength side. At least a predetermined proportion of light of the second wavelength region is transmitted, and the transmittance of light of the first wavelength region is limited within a predetermined range less than the predetermined proportion.
    Type: Grant
    Filed: October 27, 2014
    Date of Patent: April 5, 2016
    Assignee: ALPS ELECTRIC CO., LTD.
    Inventors: Motoki Hirayama, Hironori Namba
  • Patent number: 9293489
    Abstract: An image sensor includes a semiconductor substrate, a storage node region in the semiconductor substrate, an insulating portion on the semiconductor substrate, a via contact extending through the insulating portion, a photo-electric converter in the semiconductor substrate and spaced apart from the storage node region, an organic photo-electric layer on the insulating portion, and a buffer interposed between and electrically connecting the via contact and the storage node region.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: March 22, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myungwon Lee, Sangchul Sul, Hirosige Goto, Sae-Young Kim, Kang-Su Lee, Gwideokryan Lee, Masaru Ishii
  • Patent number: 9263493
    Abstract: Provided is an image pickup element, including: condenser lenses made of a resin containing fine metal particles; photoelectric conversion elements formed in a silicon substrate and each configured to photoelectrically convert incident light that enter from an outside through corresponding one of the condenser lenses; and a protective film made of a silicon compound, the protective film being formed between the condenser lenses and the silicon substrate.
    Type: Grant
    Filed: July 24, 2014
    Date of Patent: February 16, 2016
    Assignee: SONY CORPORATION
    Inventors: Sintaro Nakajiki, Yukihiro Sayama, Yoshinori Toumiya, Tadayuki Dofuku, Toyomi Jinwaki
  • Patent number: 9257282
    Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A dielectric layer is formed over a substrate. An interlayer is formed over the dielectric layer. A first photoresist layer with a first opening is formed over the interlayer and a second photoresist layer having a second opening is formed over the first photoresist layer. Spacers are formed along sidewalls of the first opening and the second opening. A first trench is formed in the interlayer by using the spacer along the first opening as an etch mask. A second trench is formed in the interlayer by using the spacer along the second opening as an etch mask. The first trench and the second trench are extended down into the dielectric layer as a lower portion and an upper portion, respectively, of a dielectric trench.
    Type: Grant
    Filed: May 2, 2014
    Date of Patent: February 9, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Tsung Shih, Tsung-Min Huang, Chung-Ju Lee, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9252173
    Abstract: A solid-state imaging device includes a light sensing unit generating a signal charge by performing a photoelectric conversion of an incident light; a conductive material in the vicinity of the light sensing unit; a first light-shielding film formed to cover at least a portion of the conductive material; and a second light-shielding film formed on a part of or all of a surface of the first light-shielding film.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: February 2, 2016
    Assignee: Sony Corporation
    Inventor: Yoshiaki Kitano
  • Patent number: 9202833
    Abstract: An imaging system may include a camera module with an image sensor having an array of image sensor pixels. The image sensor may include a substrate having an array of photodiodes, an array of microlenses formed over the array of photodiodes, and an array of color filter elements interposed between the array of microlenses and the array of photodiodes. A grid of baffles may be formed over the array of image pixels and may be configured to block stray light from striking the image pixels. The baffles may extend above the microlens array and may be tilted at an angle with respect to the optical axis of the image sensor. The angle at which each baffle is tilted may be proportional to the chief ray angle of an associated microlens. Baffles may be formed from a light-blocking material such as metal, photoresist, carbon, graphite, or other suitable material.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: December 1, 2015
    Assignee: Semiconductor Components Industries, LLC
    Inventor: Jeffrey Mackey
  • Patent number: 9167184
    Abstract: A solid-state image taking device including a pixel section and a scan driving section wherein on each pixel column included in the pixel area determined in advance to serve as a pixel column having the unit pixels laid out in the scan direction, the opto-electric conversion section and the electric-charge holding section are laid out alternately and repeatedly, and on each of the pixel columns in the pixel area determined in advance, two the electric-charge holding sections of two adjacent ones of the unit pixels are laid out disproportionately toward one side of the scan direction with respect to the optical-path limiting section or the opto-electric conversion section.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: October 20, 2015
    Assignee: SONY CORPORATION
    Inventor: Takashi Machida
  • Patent number: 9153707
    Abstract: An embodiment of the invention provides a chip package which includes: a semiconductor substrate having a first surface and a second surface; a device region disposed in the semiconductor substrate; a dielectric layer disposed on the first surface of the semiconductor substrate; a conducting pad structure disposed in the dielectric layer and electrically connected to the device region, a carrier substrate disposed on the dielectric layer; and a conducting structure disposed in a bottom surface of the carrier substrate and electrically contacting with the conducting pad structure.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: October 6, 2015
    Assignee: XINTEC INC.
    Inventors: Yen-Shih Ho, Ying-Nan Wen, Tsang-Yu Liu
  • Patent number: 9136409
    Abstract: An optical device includes a first region and an isolating layer which are each provided in a semiconductor substrate. The first region configures a photoelectric converter and includes at least an impurity of a first conductivity type. The isolating layer is configured to inhibit passage of electrons. The isolating layer includes a second region which is below the first region and which includes an impurity of a second conductivity type, a third region which surrounds the first region in plan-view thereof and which includes an impurity of the second conductivity type, and a fourth region which surrounds the second region in plan-view thereof and which is connected to the third region. The fourth region is greater in width than a connecting part of the third region which connects the third region to the fourth region.
    Type: Grant
    Filed: November 6, 2013
    Date of Patent: September 15, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Keishi Tachikawa