Antireflection Coating Patents (Class 257/437)
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Patent number: 12107035Abstract: A method of manufacturing a semiconductor device having a semiconductor die within an extended substrate and a bottom substrate may include bonding a bottom surface of a semiconductor die to a top surface of a bottom substrate, forming an adhering member to a top surface of the semiconductor die, bonding an extended substrate to the semiconductor die and to the top surface of the bottom substrate utilizing the adhering member and a conductive bump on a bottom surface of the extended substrate and a conductive bump on the bottom substrate. The semiconductor die and the conductive bumps may be encapsulated utilizing a mold member. The conductive bump on the bottom surface of the extended substrate may be electrically connected to a terminal on the top surface of the extended substrate. The adhering member may include a laminate film, a non-conductive film adhesive, or a thermal hardening liquid adhesive.Type: GrantFiled: August 29, 2022Date of Patent: October 1, 2024Assignee: Amkor Technology Singapore Holdings Pte. Ltd.Inventors: Jae Yun Kim, Gi Tae Lim, Woon Kab Jung, Ju Hoon Yoon, Dong Joo Park, Byong Woo Cho, Gyu Wan Han, Ji Young Chung, Jin Seong Kim, Do Hyun Na
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Patent number: 11522004Abstract: The present disclosure relates to an integrated chip. The integrated chip includes an image sensing element disposed within a substrate. The substrate has a plurality of protrusions disposed along a first side of the substrate over the image sensing element and a ridge disposed along the first side of the substrate. The ridge continuously extends around the plurality of protrusions.Type: GrantFiled: August 25, 2020Date of Patent: December 6, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ching-Chung Su, Hung-Wen Hsu, Jiech-Fun Lu, Shih-Pei Chou
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Patent number: 11513384Abstract: Provided is a black matrix structure including a plurality of crossed black matrix strips. A side surface of the black matrix strip has a roughness less than 2 ?m and is intersected with a reference plane. The reference plane being parallel to a plane defined by crossing of the plurality of black matrix strips.Type: GrantFiled: April 13, 2021Date of Patent: November 29, 2022Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.Inventors: Hong Liu, Jingyi Xu, Peng Liu, Yongqiang Zhang, Bo Li, Peirong Huo
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Patent number: 11476295Abstract: Provided is a method of fabricating an image sensor device. An exemplary includes forming a plurality of radiation-sensing regions in a substrate. The substrate has a front surface, a back surface, and a sidewall that extends from the front surface to the back surface. The exemplary method further includes forming an interconnect structure over the front surface of the substrate, removing a portion of the substrate to expose a metal interconnect layer of the interconnect structure, and forming a bonding pad on the interconnect structure in a manner so that the bonding pad is electrically coupled to the exposed metal interconnect layer and separated from the sidewall of the substrate.Type: GrantFiled: December 27, 2019Date of Patent: October 18, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shuang-Ji Tsai, Dun-Nian Yaung, Jen-Cheng Liu, Wen-De Wang, Hsiao-Hui Tseng
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Patent number: 11353628Abstract: The present invention relates to an anti-reflective film including: a hard coating layer; and a low refractive index layer including a binder resin, and hollow inorganic nanoparticles and solid inorganic nanoparticles which are dispersed in the binder resin, wherein in a graph of the measurement of the friction force with a TAC film measured by applying a load of 400 g to the surface, the maximum amplitude (A) is 0.1 or less based on the average friction force.Type: GrantFiled: March 30, 2018Date of Patent: June 7, 2022Assignee: LG CHEM, LTD.Inventors: Jin Seok Byun, Jae Young Kim, Yeong Rae Chang
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Patent number: 11127875Abstract: The invention relates to a method for manufacturing at least one passivated planar photodiode 1, comprising the following steps: producing a semiconductor detection portion 10; depositing a dielectric passivation layer 20; producing a peripheral portion 21 made from a doped semiconductor material; diffusion-annealing the doping elements from the peripheral portion 21 into the semiconductor detection portion 10, forming a doped peripheral region 14; producing a doped upper region 11, surrounded by the doped peripheral region 14.Type: GrantFiled: November 19, 2019Date of Patent: September 21, 2021Assignee: Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Abdelkader Aliane, Jean-Louis Ouvrier-Buffet, Luc Andre, Hacile Kaya
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Patent number: 11118266Abstract: The present invention relates to a method for depositing a protection film of a light-emitting element, the method comprising the steps of: depositing a first protection layer on a light-emitting element of a substrate by means of the atomic layer deposition method; and depositing at least one additional protection layer on the first protection layer by means of the plasma-enhanced chemical vapor deposition method.Type: GrantFiled: November 13, 2018Date of Patent: September 14, 2021Assignee: TES CO., LTDInventors: Hong-Jae Lee, Jong-Hwan Kim, Woo-Pil Shim, Woo-Jin Lee, Sung-Yean Yoon, Don-Hee Lee
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Patent number: 11049934Abstract: One illustrative transistor device disclosed herein includes a nanowire matrix comprising a plurality of nanowire structures that are arranged in at least one substantially horizontally oriented row and at least two substantially vertically oriented columns, the at least two substantially vertically oriented columns being laterally spaced apart from one another in a gate width direction of the transistor device, each of the plurality of nanowire structures comprising an outer perimeter. This illustrative embodiment of the transistor device further includes a gate structure that is positioned around the outer perimeter of all of the nanowire structures in the matrix, and a gate cap positioned above the gate structure.Type: GrantFiled: September 18, 2019Date of Patent: June 29, 2021Assignee: GLOBALFOUNDRIES U.S. INC.Inventors: Ali Razavieh, Julien Frougier, Bradley Morgenfeld
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Patent number: 10964835Abstract: A broad-spectral-bandwidth photodetector designed for use with all types of optical fibers used in different avionics networks and sensors and a process for fabricating such photodetectors. A Schottky barrier photodetector is provided that includes germanium, which has a broad spectral response to light in the ultraviolet to near-infrared range (220 to 1600 nm). The provision of a photodetector having a broad spectral response avoids the use of multiple different types of photodetectors and receivers in an avionics platform with different optical fiber networks and sensors.Type: GrantFiled: August 29, 2018Date of Patent: March 30, 2021Assignee: The Boeing CompanyInventor: Eric Y. Chan
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Patent number: 10916669Abstract: The technique introduced herein decouples the traditional relationship between bandwidth and responsivity, thereby providing a more flexible and wider photodetector design space. In certain examples of the technique introduced here, a photodetector device includes a first mirror, a second mirror, and a light absorption region positioned between the first and second reflective mirrors. For example, the first mirror can be a low-reflectivity mirror, and the second mirror can be a high-reflectivity mirror. The light absorption region is positioned to absorb incident light that is passed through the first mirror and reflected between the first and second mirrors. The first mirror can be configured to exhibit a reflectivity that causes an amount of light energy that escapes from the first mirror, after the light being reflected back by the second mirror, to be zero or near zero.Type: GrantFiled: July 3, 2019Date of Patent: February 9, 2021Assignee: ARTILUX, INC.Inventors: Shu-Lu Chen, Yun-Chung Na
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Patent number: 10879287Abstract: The present technology relates to a solid-state imaging device capable of inhibiting peeling of a fixed charge film while inhibiting dark current, a method of manufacturing the same, and an electronic device. A solid-state imaging device provided with a semiconductor substrate in which a plurality of photodiodes is formed, a groove portion formed in a depth direction from a light incident side for forming an element separating unit between adjacent photoelectric conversion elements on the semiconductor substrate, a first fixed charge film formed so as to cover a surface of a planar portion on the light incident side of the semiconductor substrate, and a second fixed charge film formed so as to cover an inner wall surface of the groove portion formed on the semiconductor substrate is provided. The present technology is applicable to a backside illumination CMOS image sensor, for example.Type: GrantFiled: September 17, 2019Date of Patent: December 29, 2020Assignee: SONY CORPORATIONInventor: Tadayuki Dofuku
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Patent number: 10804315Abstract: The present disclosure, in some embodiments, relates to method of forming an integrated chip. The method may be performed by forming an image sensing element within a substrate. A dry etching process is performed on the substrate to form a plurality of intermediate protrusions defined by the substrate. A wet etching process is performed on the plurality of intermediate protrusions to form a plurality of protrusions from the plurality of intermediate protrusions.Type: GrantFiled: November 25, 2019Date of Patent: October 13, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ching-Chung Su, Hung-Wen Hsu, Jiech-Fun Lu, Shih-Pei Chou
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Patent number: 10777596Abstract: An imaging apparatus includes a substrate including a photoelectric conversion portion; and a silicon nitride layer arranged to cover at least a portion of the photoelectric conversion portion. The silicon nitride layer contains chlorine. An N/Si composition ratio in the silicon nitride layer is not less than 1.00 and is less than 1.33.Type: GrantFiled: September 21, 2018Date of Patent: September 15, 2020Assignee: CANON KABUSHIKI KAISHAInventors: Katsunori Hirota, Keiichi Sasaki, Tsutomu Tange, Yoshiei Tanaka, Akira Ohtani
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Patent number: 10754249Abstract: In a first aspect, methods are provided that comprise: (a) applying a curable composition on a substrate; (b) applying a hardmask composition above the curable composition; (c) applying a photoresist composition layer above the hard mask composition, wherein one or more of the compositions are removed in an ash-free process. In a second aspect, methods are provided that comprise (a) applying an organic composition on a substrate; (b) applying a photoresist composition layer above the organic composition, wherein the organic composition comprises a material that produce an alkaline-soluble group upon thermal and/or radiation treatment. Related compositions also are provided.Type: GrantFiled: June 23, 2017Date of Patent: August 25, 2020Assignee: Rohm and Haas Electronic Materials LLCInventors: Anthony Zampini, Michael K. Gallagher, Owendi Ongayi
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Patent number: 10651290Abstract: A method for fabricating semiconductor device includes the steps of first forming a gate structure on a substrate, forming a contact etch stop layer (CESL) on the gate structure, forming an interlayer dielectric (ILD) layer around the gate structure, performing a curing process so that an oxygen concentration of the CESL is different from the oxygen concentration of the ILD layer, and then performing a replacement metal gate process (RMG) process to transform the gate structure into a metal gate.Type: GrantFiled: January 3, 2019Date of Patent: May 12, 2020Assignee: UNITED MICROELECTRONICS CORP.Inventors: Te-Chang Hsu, Chun-Chia Chen, Yao-Jhan Wang
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Patent number: 10529769Abstract: In various embodiments, image sensors and methods of making images sensors are disclosed. In an embodiment, an image sensor includes a first pixel region having a pixel electrode, an optically sensitive material of a first thickness, and a counterelectrode. The images sensor also includes a second pixel region comprising a pixel electrode, an optically sensitive material of a second thickness, and a counterelectrode. The first pixel region is configured to detect light in a first spectral band and the second pixel region is configured to detect light in a second spectral band. The first and second spectral bands include an overlapping spectral range. The second spectral band also includes a spectral range that is substantially undetectable by the first pixel region. Other image sensors and methods of making images sensors are also disclosed.Type: GrantFiled: April 15, 2018Date of Patent: January 7, 2020Assignee: INVISAGE TECHNOLOGIES, INC.Inventors: Jae Park, Emanuele Mandelli
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Patent number: 10510799Abstract: The present disclosure, in some embodiments, relates to an image sensor integrated chip. The image sensor integrated chip includes a substrate and an image sensing element disposed within the substrate. The substrate has sidewalls defining a plurality of protrusions over the image sensing element. A first one of the plurality of protrusions including a first sidewall having a first segment. A line that extends along the first segment intersects a second sidewall of the first one of the plurality of protrusions that opposes the first sidewall.Type: GrantFiled: May 23, 2019Date of Patent: December 17, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ching-Chung Su, Hung-Wen Hsu, Jiech-Fun Lu, Shih-Pei Chou
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Patent number: 10504941Abstract: The present invention provides an array substrate comprising a substrate, a metal conductive film layer, and an anti-reflective film layer located between the substrate and the metal conductive film layer, and a method for manufacturing the same, as well as a display device. The method comprises step S1: forming an anti-reflective film layer on a substrate by adjusting the reaction power and/or reactive gas flow during the formation of film by the chemical vapor deposition process; and step S2: forming a metal conductive film layer on the substrate finished in step S1. Through the preparation method of the array substrate, the anti-reflective film layer can have a sand-like granulation structure, such that light reflected from the metal conductive film layer can be blocked, thereby weakening or avoiding the light reflected from the surface of the metal conductive film layer, further improving the display effect of the array substrate.Type: GrantFiled: July 24, 2017Date of Patent: December 10, 2019Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.Inventors: Liangliang Li, Huibin Guo, Shoukun Wang, Yuchun Feng, Yao Liu
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Patent number: 10475828Abstract: An image sensor device structure is provided. The image sensor device structure includes a substrate, and the substrate is doped with a first conductivity type. The image sensor device structure includes a light-sensing region formed in the substrate, and the light-sensing region is doped with a second conductivity type that is different from the first conductivity type. The image sensor device structure further includes a doping region extended into the light-sensing region, and the doping region is doped with the first conductivity type. The image sensor device structure also includes a plurality of color filters formed on the doping region.Type: GrantFiled: January 11, 2018Date of Patent: November 12, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yen-Ting Chiang, Chun-Yuan Chen, Hsiao-Hui Tseng, Yu-Jen Wang, Shyh-Fann Ting, Wei-Chuang Wu, Jen-Cheng Liu, Dun-Nian Yaung
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Patent number: 10468445Abstract: This technology relates to an image sensor. The image sensor includes a substrate including a photoelectric transformation element, the substrate includes a first surface and a second surface faced to the first surface; first and second shielding layers overlapped to photoelectric transformation element and formed over the first and second surfaces, respectively; and a third shielding layer surrounding the photoelectric transformation element and contacted to the first and second shielding layers by penetrating the substrate.Type: GrantFiled: May 7, 2018Date of Patent: November 5, 2019Assignee: SK hynix Inc.Inventor: Yun-Hui Yang
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Patent number: 10468437Abstract: A photodiode includes an absorption layer. A cap layer is disposed on a surface of the absorption layer. A pixel diffusion area within the cap layer extends beyond the surface of the absorption layer and into the absorption layer to receive a charge generated from photons therefrom. A mesa trench is defined through the cap layer surrounding the pixel diffusion area, wherein the mesa trench defines a floor at the surface of the absorption layer and opposed sidewalls extending away from the surface of the absorption layer. An implant is aligned with the mesa trench and extends from the floor of the mesa trench through the absorption layer surrounding a portion of the absorption layer proximate the pixel diffusion area.Type: GrantFiled: March 26, 2018Date of Patent: November 5, 2019Assignee: Sensors Unlimited, Inc.Inventors: Wei Huang, Wei Zhang, Joshua Lund, Namwoong Paik
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Patent number: 10461050Abstract: An object of the present invention is to stabilize and strengthen the strength of a bonding part between a metal electrode on a semiconductor chip and metal wiring connected thereto using a simple structure. Provided is a semiconductor device including a metal layer 130 on a surface of a metal electrode 120 formed on a semiconductor chip 110, the metal layer 130 consisting of a metal or an alloy different from a constituent metal of the metal electrode 120, metal wiring 140 is connected to the metal layer 130 via a bonding part 150, wherein the constituent metal of the metal layer 130 is a metal or an alloy different from the constituent metal of the metal electrode 120, and the bonding part 150 has an alloy region harder than the metal wiring 140.Type: GrantFiled: October 19, 2017Date of Patent: October 29, 2019Assignee: FUJI ELECTRIC CO., LTD.Inventors: Hidekazu Tanisawa, Shinji Sato, Fumiki Kato, Hiroshi Sato, Kenichi Koui, Hiroki Takahashi, Yoshinori Murakami
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Patent number: 10411051Abstract: A coplanar electrode photodiode array and a manufacturing method thereof are disclosed. On a top side of a low resistance rate substrate, a high resistance epitaxial silicon wafer, a first conductive type heavily doped region and a second conductive type doped region are formed, which are a cathode and an anode of a photodiode respectively. The structure includes a trench structure formed between the anode and the cathode, the trench structure may be form by a gap, an insulating material, a conductive structure, a reflective material, and ion implantation, and also includes a first conductive type heavily doped region, an insulating isolation layer or a conductive structure with an insulating layer, and the like formed under the anode and the cathode.Type: GrantFiled: August 31, 2016Date of Patent: September 10, 2019Assignee: Nuctech Company LimitedInventors: Lan Zhang, Yuanjing Li, Yinong Liu, Haifan Hu, Jun Li
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Patent number: 10332916Abstract: A metal line includes a conductive layer containing aluminum (Al) or an aluminum alloy, a first capping layer on the conductive layer, the first capping layer containing titanium nitride (TiNx), and a second capping layer on the first capping layer, the second capping layer containing titanium (Ti).Type: GrantFiled: June 20, 2018Date of Patent: June 25, 2019Assignee: Samsung Display Co., Ltd.Inventors: Dong Min Lee, Sang Won Shin, Hyun Eok Shin
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Patent number: 10224450Abstract: A semiconductor device, silicon photomultiplier, and sensor are described. The disclosed semiconductor device is disclosed to include a substrate, a photosensitive area provided on the substrate, the photosensitive area corresponding to an area in which an electrical signal is generated in response to light impacting the photosensitive area, at least one trench substantially surrounding the photosensitive area, the at least one trench extending at least partially into the substrate, and a resistor confined by the at least one trench and in electrical communication with the active area such that the resistor is configured to carry electrical signals generated by the photosensitive area to a metal contact.Type: GrantFiled: June 27, 2017Date of Patent: March 5, 2019Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITEDInventors: Claudio Piemonte, Alberto Giacomo Gola, Giovanni Paternoster, Fabio Acerbi
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Patent number: 10211314Abstract: A method for fabricating semiconductor device includes the steps of first forming a gate structure on a substrate, forming a contact etch stop layer (CESL) on the gate structure, forming an interlayer dielectric (ILD) layer around the gate structure, performing a curing process so that an oxygen concentration of the CESL is different from the oxygen concentration of the ILD layer, and then performing a replacement metal gate process (RMG) process to transform the gate structure into a metal gate.Type: GrantFiled: October 22, 2017Date of Patent: February 19, 2019Assignee: UNITED MICROELECTRONICS CORP.Inventors: Te-Chang Hsu, Chun-Chia Chen, Yao-Jhan Wang
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Patent number: 10186346Abstract: A transparent conductive film 1 includes, in this order, a transparent substrate 2, a first optical adjustment layer 4, an inorganic layer 5, and a transparent conductive layer 6. The first optical adjustment layer 4 has refractive index nC lower than refractive index nA of the transparent substrate 2, and thickness TC of 10 nm or more and 35 nm or less. The inorganic layer 5 has refractive index nD that is lower than the absolute value |nC×1.13| of a value obtained by multiplying the refractive index nC of the first optical adjustment layer 4 by 1.13.Type: GrantFiled: March 11, 2015Date of Patent: January 22, 2019Assignee: NITTO DENKO CORPORATIONInventors: Daiki Kato, Rie Kawakami, Nozomi Fujino, Tomotake Nashiki
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Patent number: 10177189Abstract: A method of manufacturing a semiconductor structure includes receiving a substrate and an interlayer dielectric (ILD) over the substrate; bonding the substrate and the ILD over a carrier substrate; forming a recessed portion extended through the substrate and the ILD; disposing a conductive material into the recessed portion; and removing the carrier substrate, wherein the conductive material is in contact with the ILD and is separated from the substrate.Type: GrantFiled: July 13, 2017Date of Patent: January 8, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chia-Yu Wei, Chin-Hsun Hsiao, Yi-Hsing Chu, Yen-Liang Lin, Yung-Lung Hsu, Hsin-Chi Chen
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Patent number: 10032950Abstract: An avalanche photodiode, and related method of manufacture and method of use thereof, that includes a first contact layer; a multiplication layer, wherein the multiplication layer includes AlInAsSb; a charge, wherein the charge layer includes AlInAsSb; an absorption, wherein the absorption layer includes AlInAsSb; a blocking layer; and a second contact layer.Type: GrantFiled: February 22, 2017Date of Patent: July 24, 2018Assignee: University of Virginia Patent FoundationInventors: Joe C. Campbell, Min Ren, Madison Woodson, Yaojia Chen, Seth Bank, Scott Maddox
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Patent number: 9978801Abstract: In various embodiments, image sensors and methods of making images sensors are disclosed. In an embodiment, an image sensor includes a first pixel region having a pixel electrode, an optically sensitive material of a first thickness, and a counterelectrode. The images sensor also includes a second pixel region comprising a pixel electrode, an optically sensitive material of a second thickness, and a counterelectrode. The first pixel region is configured to detect light in a first spectral band and the second pixel region is configured to detect light in a second spectral band. The first and second spectral bands include an overlapping spectral range. The second spectral band also includes a spectral range that is substantially undetectable by the first pixel region. Other image sensors and methods of making images sensors are also disclosed.Type: GrantFiled: July 24, 2015Date of Patent: May 22, 2018Assignee: INVISAGE TECHNOLOGIES, INC.Inventors: Jae Park, Emanuele Mandelli
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Patent number: 9870938Abstract: A semiconductor element producing method is disclosed. In the method, a surface protective tape including a base layer and an adhesive layer (including an intermediate layer) is attached to the front surface of a wafer that has unevenness caused by a polyimide passivation. The wafer is placed on a stage, with the surface protective tape facing the stage. The surface protective tape is heated while being drawn to the stage to flatten the surface of the surface protective tape. A grinding process is performed on the rear surface of the wafer to reduce the thickness of the wafer. A rear surface element structure is formed on the rear surface of the wafer, and the wafer is diced into chips.Type: GrantFiled: October 9, 2014Date of Patent: January 16, 2018Assignee: FUJI ELECTRIC CO., LTD.Inventor: Akira Tamenori
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Patent number: 9836144Abstract: A touch panel according to the embodiment includes a substrate having a first surface and a second surface opposite to the first surface; an intermediate layer on the first surface of the substrate; and a transparent electrode on the intermediate layer. A touch panel according to another embodiment includes a substrate having a first surface and a second surface opposite to the first surface; a transparent electrode on the first surface of the substrate; and an anti-reflective layer on the transparent electrode.Type: GrantFiled: July 29, 2011Date of Patent: December 5, 2017Assignee: LG INNOTEK CO., LTD.Inventors: Keun Sik Lee, Byung Soo Kim, Sun Hwa Lee, Chung Won Seo
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Patent number: 9818747Abstract: A number of first hard mask portions are formed on a dielectric layer to vertically shadow a respective one of a number of underlying gate structures. A number of second hard mask filaments are formed adjacent to each side surface of each first hard mask portion. A width of each second hard mask filament is set to define an active area contact-to-gate structure spacing. A first passage is etched between facing exposed side surfaces of a given pair of neighboring second hard mask filaments and through a depth of the semiconductor wafer to an active area. A second passage is etched through a given first hard mask portion and through a depth of the semiconductor wafer to a top surface of the underlying gate structure. An electrically conductive material is deposited within both the first and second passages to respectively form an active area contact and a gate contact.Type: GrantFiled: March 8, 2016Date of Patent: November 14, 2017Assignee: Tela Innovations, Inc.Inventor: Michael C. Smayling
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Patent number: 9773829Abstract: A method of image sensor fabrication includes providing a semiconductor material, an insulation layer, and a logic layer, where the semiconductor material includes a plurality of photodiodes. A through-semiconductor-via is formed which extends from the semiconductor material, through the insulation layer, and into the logic layer. The through-semiconductor-via is capped with a capping layer. A metal pad is disposed in a first trench in the semiconductor material. Insulating material is deposited on the capping layer, and in the first trench in the semiconductor material. A resist is deposited in a second trench in the insulating material, and the second trench in the insulating material is aligned with the metal pad. The insulating material is removed to expose the capping layer, and a portion of the capping layer disposed proximate to the plurality of photodiodes is also removed. A metal grid is formed proximate to the plurality of photodiodes.Type: GrantFiled: February 3, 2016Date of Patent: September 26, 2017Assignee: OmniVision Technologies, Inc.Inventors: Yuanwei Zheng, Gang Chen, Duli Mao, Dyson Tai
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Patent number: 9748298Abstract: A backside illumination image sensor with an array of image sensor pixels is provided. Each pixel may include a photodiode, a storage diode, and associated circuitry formed in a front side of a semiconductor substrate. In accordance with an embodiment, a trench isolation structure may be formed directly over the storage diode but not over the photodiode from a back side of the substrate. The backside trench isolation structure may be filled with absorptive material and can optionally be biased to a ground or negative voltage level. A light shielding layer may also be formed over the backside trench isolation structure on the back side of the substrate. The light shielding layer may be formed from absorptive material or reflective material, and may also be biased to a ground or negative voltage level.Type: GrantFiled: June 30, 2015Date of Patent: August 29, 2017Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Victor Lenchenkov, Sergey Velichko
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Patent number: 9717418Abstract: A micro-camera catheter device is disclosed having at least one light source disposed on a distal end of a catheter. The light source is capable of propagating a predetermined wavelength of light with a wavelength greater than approximately 700 nanometers onto a target. The device further includes a lens system disposed on the distal end of the catheter, said lens system configured to receive light reflected from the target. The device further includes a non-linear optical media disposed about the lens system configured to reduce the wavelength of light reflected from the target. The device also includes a silicon-based solid state imaging device disposed behind the non-linear optical media configured to receive light from the non-linear optical media.Type: GrantFiled: June 22, 2015Date of Patent: August 1, 2017Assignee: Sarcos LCInventors: Stephen C. Jacobsen, David P. Marceau
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Patent number: 9673239Abstract: A system and method for forming pixels in an image sensor is provided. In an embodiment, a semiconductor device includes an image sensor including a first pixel region and a second pixel region in a substrate, the first pixel region being adjacent to the second pixel region. A first anti-reflection coating is over the first pixel region, the first anti-reflection coating reducing reflection for a first wavelength range of incident light. A second anti-reflection coating is over the second pixel region, the second anti-reflection coating reducing reflection for a second wavelength range of incident light that is different from the first wavelength range.Type: GrantFiled: January 15, 2016Date of Patent: June 6, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yen-Chang Chu, Yeur-Luen Tu, Cheng-Yuan Tsai
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Patent number: 9520432Abstract: Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.Type: GrantFiled: August 27, 2015Date of Patent: December 13, 2016Assignee: Sony CorporationInventor: Kiyoshi Hirata
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Patent number: 9520435Abstract: An image sensor including a semiconductor layer; a stack of insulating layers resting on the back side of the semiconductor layer; a conductive layer portion extending along part of the height of the stack and flush with the exposed surface of the stack; laterally-insulated conductive fingers extending through the semiconductor layer from its front side and penetrating into said layer portion; laterally-insulated conductive walls separating pixel areas, these walls extending through the semiconductor layer from its front side and having a lower height than the fingers; and an interconnection structure resting on the front side of the semiconductor layer and including vias in contact with the fingers.Type: GrantFiled: August 31, 2015Date of Patent: December 13, 2016Assignees: STMicroelectronics SA, STMicroelectronics (Crolles 2) SASInventors: Nayera Ahmed, Michel Marty
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Patent number: 9508774Abstract: There are provided a highly reliable semiconductor device capable of suppressing occurrence of cracks as well as securing flatness and a manufacturing method therefor. The semiconductor device includes: a semiconductor substrate; an element region; and a non-element region. The non-element region includes: a top-layer metal wiring in a top layer of metal wirings formed in the non-element region; a flattening film covering an upper surface of the top-layer metal wiring; and a protecting film formed over the flattening film. A removed part where the protecting film is removed is formed in at least part of the non-element region.Type: GrantFiled: November 18, 2013Date of Patent: November 29, 2016Assignee: Renesas Electronics CorporationInventor: Koji Iizuka
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Patent number: 9490289Abstract: An image sensing device includes a plurality of photoelectric conversion portions. The device further includes a semiconductor substrate having a first surface for receiving incident light and a second surface on an opposite side to the first surface, the photoelectric conversion portions being provided therein, a first non-metal region arranged on a second surface side and arranged at a position at least partially overlapping with the photoelectric conversion portions, a second non-metal region arranged to be in contact with a side surface of the first non-metal region, and a reflection layer arranged on an opposite side of the first non-metal region to the semiconductor substrate. A refractive index of the first non-metal region is higher than a refractive index of the second non-metal region.Type: GrantFiled: October 4, 2013Date of Patent: November 8, 2016Assignee: Canon Kabushiki KaishaInventor: Takehiko Soda
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Patent number: 9437700Abstract: A semiconductor device is provided with a silicon layer, an upper surface side aluminum layer containing silicon and an insulation film. The upper surface side aluminum layer contacts and is layered on a part of a surface of the silicon layer. The insulation film contacts and is layered on another part of the surface of the silicon layer. The insulation film is adjacent to and contacts the upper surface side aluminum layer. The insulation film includes an insulation film body and a plurality of first nodule segregated portions projecting from the insulation film body toward the upper surface side aluminum layer as seen along a vertical direction relative to the surface of the silicon layer. A corner is formed by a side surface of the insulation film body and a side surface of each of the first nodule segregated portions as seen along the vertical direction.Type: GrantFiled: March 6, 2015Date of Patent: September 6, 2016Assignees: KABUSHIKI KAISHA TOYOTA CHUO KENKYUSHO, TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Satoru Machida, Yusuke Yamashita, Koichi Nishikawa, Masaru Senoo, Jun Okawara, Yoshifumi Yasuda, Hiroshi Hosokawa, Yasuhiro Hirabayashi
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Patent number: 9406830Abstract: A semiconductor light-receiving device includes: a substrate; a p-type conductive layer, a light absorption layer having a smaller bandgap than that of incident light, a multiplication layer producing avalanche multiplication, and an n-type window layer laminated in that order on the substrate; an n-type conductive layer in a region of part of the n-type window layer; and a first p-type conductive region in a region of the n-type window layer that is not in contact with the n-type conductive layer, wherein the first p-type conductive region does not reach the multiplication layer and is not in contact with any electrode to which power is supplied from outside.Type: GrantFiled: October 30, 2015Date of Patent: August 2, 2016Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Ryota Takemura, Masaharu Nakaji, Kazuki Yamaji
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Patent number: 9385156Abstract: Some embodiments of the present disclosure provide a method of manufacturing a back side illuminated (BSI) image sensor. The method includes receiving a semiconductive substrate; forming a transistor coupled to a photosensitive element at a front side of the semiconductive substrate; forming a deep trench isolation (DTI) at a back side of the semiconductive substrate; forming a doped layer conformally over the DTI; performing a microwave anneal over the back side; forming a non-transparent material inside the DTI; and forming a color filter over the doped layer.Type: GrantFiled: November 26, 2014Date of Patent: July 5, 2016Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Tsung-Han Tsai, Yun-Wei Cheng, Kuo-Cheng Lee, Chun-Hao Chou, Yung-Lung Hsu
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Patent number: 9331110Abstract: A semiconductor device includes a gate electrode formed on a substrate with a gate insulating layer in between, an insulating layer of property and thickness that allow for a silicide block formed in a first region of the substrate so as to cover the gate electrode, a sidewall formed to at least partly include the insulating layer at a side of the gate electrode, a first impurity region formed by implantation of a first impurity in a peripheral region of the gate electrode formed in the first region of the substrate before the insulating layer is formed, a second impurity region formed by implantation of a second impurity in a peripheral region of the sidewall of the gate electrode formed in a second region of the substrate after the sidewall is formed, and a silicide layer formed on a surface of the second impurity region of the substrate.Type: GrantFiled: December 15, 2010Date of Patent: May 3, 2016Assignee: SONY CORPORATIONInventor: Keiji Tatani
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Patent number: 9281347Abstract: A display device integrated with a touch screen panel may include a display device and an anti-reflection layer. The display device may include a plurality pixels arranged therein. The anti-reflection layer may include a plurality of metal layers and a plurality of dielectric layers that are sequentially laminated on an upper surface of the display device. In the display device, one or more metal layers among the plurality of metal layers constituting the anti-reflection layer may be operated as sensing electrodes of the touch screen panel.Type: GrantFiled: October 22, 2014Date of Patent: March 8, 2016Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Chung-Sock Choi, Jin-Koo Kang, Soo-Youn Kim, Seung-Hun Kim, Hyun-Ho Kim, Seung-Yong Song, Cheol Jang, Sang-Hwan Cho, Sang-Hyun Park
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Patent number: 9159855Abstract: Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.Type: GrantFiled: June 19, 2014Date of Patent: October 13, 2015Assignee: SONY CORPORATIONInventor: Kiyoshi Hirata
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Patent number: 9142578Abstract: Provided is a semiconductor integrated circuit device having pixel regions in a photodiode array region and having, in each of the pixel regions, a waveguide holding hole having a substantially perpendicular sidewall above the photodiode and embedded with a silicon oxide-based sidewall insulating film reaching the bottom surface of the hole and two or more silicon nitride-based insulating films having a higher refractive index on the inner side of the hole. This structure makes it possible to prevent deterioration of pixel characteristics of an imaging device, such as CMOS sensor, which is rapidly decreasing in size.Type: GrantFiled: June 15, 2014Date of Patent: September 22, 2015Assignee: Renesas Electronics CorporationInventors: Kazuo Tomita, Takeshi Kawamura
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Patent number: 9087952Abstract: A method of forming an integrated photonic semiconductor structure having a photonic device and a CMOS device may include depositing a first silicon nitride layer having a first stress property over the photonic device, depositing an oxide layer having a stress property over the deposited first silicon nitride layer, and depositing a second silicon nitride layer having a second stress property over the oxide layer. The deposited first silicon nitride layer, the oxide layer, and the second silicon nitride layer encapsulate the photonic device.Type: GrantFiled: April 7, 2014Date of Patent: July 21, 2015Assignee: International Business Machines CorporationInventors: Solomon Assefa, Tymon Barwicz, Swetha Kamlapurkar, Marwan H. Khater, Steven M. Shank, Yurii A. Vlasov
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Patent number: 9088008Abstract: Provided is a display panel device including a pixel unit including a luminescent layer, and a lens that covers a luminescent region of the luminescent layer placed above the pixel unit and that transmits light emitted from the luminescent layer. The height between a luminescent face of the luminescent region and an apex of the lens is uniform along the straight line in the long axis direction of the luminescent region. Furthermore, at both end parts of the lens, a cross-section of the light emitting side corresponding to the long axis direction of the luminescent region has a shape of an elliptic arc having a predetermined curvature.Type: GrantFiled: March 26, 2012Date of Patent: July 21, 2015Assignee: JOLED INC.Inventors: Masahiro Kasano, Takashi Ohta