Antireflection Coating Patents (Class 257/437)
  • Publication number: 20020027258
    Abstract: A solid-state imaging device is able to prevent a sensitivity from being lowered and to suppress a smear caused as a pixel size is reduced and to provide an excellent image quality even though it is miniaturized and a manufacturing method thereof is proposed.
    Type: Application
    Filed: July 31, 2001
    Publication date: March 7, 2002
    Inventors: Dai Sugimoto, Takeshi Matsuda
  • Patent number: 6352922
    Abstract: A semiconductor device having a double layer type anti-reflective layer, which can reduce reflectivity in a photolithography process using, for example, an exposure light source of a 193 nm wavelength region and which can suppress intermixing at the boundary between an anti-reflective layer and a photoresist layer, and a fabrication method of the semiconductor device are disclosed. The semiconductor device includes an underlying layer having a high reflectivity formed on a semiconductor substrate, a double layer type anti-reflective layer formed of a nitride layer and a layer formed using only hydrocarbon-based gas on the underlying layer, and a photoresist layer formed on the double layer type anti-reflective layer. In the double layer type anti-reflective layer, the nitride layer and the layer formed using only hydrocarbon-based gas can be sequentially stacked. Also, it is possible that the layer formed using only hydrocarbon-based gas and the nitride layer are sequentially stacked.
    Type: Grant
    Filed: April 13, 2000
    Date of Patent: March 5, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Yong-beom Kim
  • Patent number: 6348720
    Abstract: A solid state image sensing device formed on a substrate includes a transfer electrode having a first layer of polychrystalline silicon and a second layer of silicon nitride. The silicon nitride layer has a higher refractive index than an interlayer insulation film formed of silicon oxide, which allows light of shorter wavelengths, such as blue light, to reach light receiving pixels beyond the transfer electrode. The image sensing device has an improved sensitivity to shorter wavelength light.
    Type: Grant
    Filed: November 9, 1998
    Date of Patent: February 19, 2002
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Yoshihiro Okada
  • Patent number: 6348721
    Abstract: The present invention provides methods of producing an anti-reflective layer on a semiconductor wafer/device and wafers/devices including that anti-reflective layer. The anti-reflective layer is produced by annealing layers of titanium and aluminum on a wafer/device to provide a roughened surface that significantly reduces reflectivity to improve the accuracy and definition provided by optical lithography processes.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: February 19, 2002
    Assignee: Micron Technology, Inc.
    Inventor: Allen McTeer
  • Publication number: 20020009829
    Abstract: The present invention comprises a method for preventing particle formation in a substrate overlying a DARC coating. The method comprises providing a semiconductor construct. A DARC coating is deposited on the construct with a plasma that comprises a silicon-based compound and N2O. The DARC coating is exposed to an atmosphere that effectively prevents a formation of defects in the substrate layer. The exposed DARC coating is overlayed with the substrate.
    Type: Application
    Filed: August 8, 2001
    Publication date: January 24, 2002
    Applicant: Micron Technology, Inc.
    Inventors: Zhiping Yin, Gurtej Singh Sandhu
  • Publication number: 20020003231
    Abstract: A light-producing device integrated with a power monitoring system include a light-producing device from which light is emitted in wavelengths that can range from approximately 700 nm to approximately 3 microns. A semi-transparent sensor is located such that at least a portion of the light emitted passes through the semi-transparent sensor and at least a portion of light is absorbed by the semi-transparent sensor. The semi-transparent sensor is configured to be semi-transparent at wavelengths that can range from 700 nm to 3 microns. The semi-transparent sensor may also be used with an external light source, for example with fiber-optic cables.
    Type: Application
    Filed: August 8, 2001
    Publication date: January 10, 2002
    Applicant: XEROX CORPORATION
    Inventors: Decai Sun, Eric Peeters, Christopher L. Chua, Francesco Lemmi, Patrick Y. Maeda, Scott Solberg
  • Patent number: 6316716
    Abstract: A solar cell includes a substrate carrier for current generating photoactive layers that include at least one front layer and one layer toward the substrate of different polarities, a front contact, at least one back contact and an integral protective diode which has a polarity opposite the solar cell integrated in and disposed on a front side of the solar cell and including at least one diode semiconductor layer. A tunnel diode extends between the photoactive layers and a region of the substrate toward the front, the tunnel diode being recessed adjacent the protective diode. The region of the substrate toward the front, or a layer toward the front applied to or formed by the front, together with a photoactive layer of corresponding polarity toward the front, make up the at least one diode semiconductor layer of the protective diode.
    Type: Grant
    Filed: May 9, 2000
    Date of Patent: November 13, 2001
    Assignee: Angewandte Solarenergie - Ase GmbH
    Inventor: Just Hilgrath
  • Publication number: 20010028095
    Abstract: In one aspect, the invention includes a semiconductor processing method comprising a) forming a metal silicide layer over a substrate; b) depositing a layer comprising silicon, nitrogen and oxygen over the metal silicide layer; and c) while the layer comprising silicon, nitrogen and oxygen is over the metal silicide layer, annealing the metal silicide layer.
    Type: Application
    Filed: May 30, 2001
    Publication date: October 11, 2001
    Inventors: Zhiping Yin, Ravi Iyer, Thomas R. Glass, Richard Holscher, Ardavan Niroomand, Linda K. Somerville, Gurtej S. Sandhu
  • Patent number: 6300650
    Abstract: A multilayer mirror includes a multilayer reflection structure formed of an alternate repetition of a first epitaxial layer of a first refractive index and a second epitaxial layer of a second refractive index larger than the first refractive index, wherein the second epitaxial layer includes a group III-V mixed crystal containing N as a group V element.
    Type: Grant
    Filed: March 5, 1999
    Date of Patent: October 9, 2001
    Assignee: Ricoh Company, Ltd.
    Inventor: Shunichi Sato
  • Patent number: 6297521
    Abstract: A substantially continuously graded composition silicon oxycarbide (SiOC) antireflective coating (ARC) or antireflective layer (ARL) is interposed between a photoresist layer and an underlying substrate. The ARC matches an optical impedance at the interface between the ARC and photoresist. The optical impedance decreases (absorptivity increases) substantially continuously, in the ARC in a direction away from the interface between the ARC and the photoresist. The ARC composition is graded from SiOC, at its interface with the photoresist, to SiC or Si, in a direction away from the photoresist. Reflections at the ARC-photoresist interface are substantially eliminated. Substantially all incident light, including ultraviolet (UV) and deep ultraviolet (DUV) light, is absorbed in the ARC. As a result, substantially no light reaches or is reflected from the underlying substrate. Photolithographic limitations such as swing effect and reflective notching are reduced.
    Type: Grant
    Filed: August 14, 1998
    Date of Patent: October 2, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Leonard Forbes, Kie Y. Ahn
  • Patent number: 6291886
    Abstract: In a semiconductor device, a wiring layer (data line 31DL), which has a TiNx film 31C serving as a reflection preventing film at its uppermost layer, is covered with a protection film 32, and a nitrogen composition ratio x of the TiNx film 31C is adjusted more than 0.8 and less than 1.1. Most preferably, the nitrogen composition ratio x is set to more than 1.01 and less than 1.1. A nonvolatile memory device is installed in the semiconductor device. A plasma CVD silicon oxide film is employed as the protection film 32.
    Type: Grant
    Filed: February 5, 1999
    Date of Patent: September 18, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahisa Sonoda, Hiroaki Tsunoda
  • Patent number: 6289030
    Abstract: A method of fabricating a semiconductor optical device is provided comprising the steps of depositing planar layers of semiconductor material to form a semiconductor wafer having an optically active region, etching through the optically active region to form a plurality of facets, and simultaneously coating at least one facet and an upper surface of the semiconductor wafer with a coating layer having a thickness and composition such that, during operation of the semiconductor device, the coating layer acts both as a facet coating and as a wafer surface coating. Where the coating layer comprises a dielectric, the layer acts both as an anti-reflection facet coating and as a passivating layer. Where the coating layer comprises a metal, the layer acts both as a high-reflectivity facet coating and as an electrical contacting layer. In a first embodiment the semiconductor device comprises a laser and in a second embodiment comprises a photodetector.
    Type: Grant
    Filed: January 28, 1998
    Date of Patent: September 11, 2001
    Assignee: Hewlett-Packard Company
    Inventor: Paul Marshall Charles
  • Patent number: 6288434
    Abstract: An anti-reflective layer is formed on the sidewalls of metal interconnects in an integrated circuit containing photodetector devices. After fabricating the photodetector devices, the metal interconnects are formed. An anti-reflective layer is formed over the interconnects and is directionally etched so that a portion of the anti-reflective layer remains covering the interconnect sidewalls, thereby reducing optical cross-talk in the photodetector devices due to sidewall reflection.
    Type: Grant
    Filed: May 14, 1999
    Date of Patent: September 11, 2001
    Assignee: Tower Semiconductor, Ltd.
    Inventor: Jeffrey M. Levy
  • Publication number: 20010019164
    Abstract: A method for fabricating a substantially smooth-surfaced anti-reflective coating on a semiconductor device structure including generating a plasma from an inert gas in a process chamber in which the anti-reflective coating is to be deposited. The anti-reflective coating may include silicon, oxygen and nitrogen, and is preferably of the general formula SixOyNz, where x equals 0.40 to 0.65, y equals 0.02 to 0.56 and z equals 0.05 to 0.33. Preferably, x+y+z equals one. The method may also include fabricating a silicon nitride layer over the anti-reflective coating. A semiconductor device which includes a silicon nitride layer over the anti-reflective coating has a density of less than about 40,000 particles or surface roughness features in the silicon nitride of about 120-150 nanometers dimension per eight inch wafer. Accordingly, a mask that is subsequently formed over the silicon nitride layer has a substantially uniform thickness and is substantially distortion-free.
    Type: Application
    Filed: March 28, 2001
    Publication date: September 6, 2001
    Inventor: Zhiping Yin
  • Publication number: 20010011737
    Abstract: An anti-reflective coating having a composite layer of silicon nitride and silicon dioxide may be formed over the entire photosensitive region of the photodetector to minimize the amount of reflection. The composite layer comprises a silicon nitride layer and a dielectric layer contiguous to the silicon nitride layer. The anti-reflective coating may be formed in a CMOS process for fabricating the PN junction in the photodiode and CMOS devices for amplifying the photodetector signal, where the polysilicon gate layer is used as a etch stop. The P+ or N+ material in the PN junction of the photodiode has a distributed design where two portions of the region are separated by a distance in the range of Xd to 2Xd, where Xd is the one-sided junction depletion width, to enhance the electric field and to reduce the distance traveled by the carriers for enhancing bandwidth. A heavily doped region of the opposite type may be added between the two portions to further enhance the electric field.
    Type: Application
    Filed: March 2, 2001
    Publication date: August 9, 2001
    Inventor: Koon Wing Tsang
  • Patent number: 6265751
    Abstract: A method and system for providing a semiconductor device is disclosed. The method and system include depositing an antireflective coating (ARC) layer. The ARC layer has a first thickness, as deposited, that is greater than a second, desired thickness of the ARC layer. The method and system further include condensing the ARC layer to the desired thickness. Consequently, the removal of the ARC layer during a photoresist strip is impeded.
    Type: Grant
    Filed: October 29, 1999
    Date of Patent: July 24, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Marina V. Plat, Robert B. Ogle
  • Patent number: 6262465
    Abstract: A semiconductor p-i-n photodiode having a substrate, an n layer coupled to the surface of said substrate, an i layer coupled to the surface of said n layer, and a carbon doped p layer coupled to the surface of said i layer.
    Type: Grant
    Filed: September 25, 1998
    Date of Patent: July 17, 2001
    Assignee: Picometrix, Inc.
    Inventors: Steven L. Williamson, Robert N. Sacks, Janis A. Valdmanis, Kadhair Al Hemyari
  • Patent number: 6262359
    Abstract: A process for fabricating a solar cell is described. The process includes: (1) providing a base layer, (2) fabricating an emitter layer of p-type conductivity on a same side as the non-illuminated surface of the base layer to provide a strongly doped p-type emitter layer and a p-n junction between the n-type base layer and the p-type emitter layer. The base layer of the present invention has n-type conductivity and is defined by an illuminated surface and a non-illuminated surface. The illuminated surface has light energy impinging thereon when the solar cell is exposed to the light energy and the non-illuminated surface is opposite the illuminated surface.
    Type: Grant
    Filed: October 7, 1999
    Date of Patent: July 17, 2001
    Assignee: Ebara Solar, Inc.
    Inventors: Daniel L. Meier, Hubert P. Davis, Ruth A. Garcia, Jalal Salami
  • Patent number: 6252157
    Abstract: An amorphous silicon-based thin film photovoltaic device having a glass substrate and a laminate structure formed on the glass substrate and consisting of a transparent electrode, a semiconductor layer containing an amorphous silicon-based semiconductor and a back electrode, in which the glass substrate has a transmittance of 88 to 90% for light having a wavelength of 700 nm and 84 to 87% for light having a wavelength of 800 nm.
    Type: Grant
    Filed: March 14, 2000
    Date of Patent: June 26, 2001
    Assignee: Kaneka Corporation
    Inventor: Hitoshi Nishio
  • Patent number: 6246098
    Abstract: An apparatus for reducing the reflection of photons off the surface of a semiconductor device under test. In one embodiment, the present invention includes a semiconductor device comprising an integrated circuit formed on the top side of a semiconductor substrate. An anti-reflective coating is disposed over the back side of the semiconductor substrate for reducing the reflection of photons at the silicon/air interface.
    Type: Grant
    Filed: December 31, 1996
    Date of Patent: June 12, 2001
    Assignee: Intel Corporation
    Inventor: Mario J. Paniccia
  • Patent number: 6235456
    Abstract: This invention provides methods for manufacturing anti-reflective barrier and/or polish-stop layers on semiconductors. The anti-reflective barrier and/or polish-stop layers permit more accurate photolithography during the manufacture of semiconductor devices. The barrier and/or polish-stop layers can comprise nitride and/or oxynitride films having non-stoichiometric ratios of silicon to nitrogen atoms within the film structure. The non-stoichiometry permits the films to be semi-transparent, decreasing transmission of electromagnetic radiation through the layers, thereby decreasing the reflection of the electromagnetic radiation back through the photoresist layers. By decreasing the reflection of the electromagnetic radiation through the photoresist materials, the effects of diffraction by mask edges and standing wave interference can be reduced, thereby permitting the more accurate, reproducible inscription of patterns onto semiconductor devices.
    Type: Grant
    Filed: December 9, 1998
    Date of Patent: May 22, 2001
    Assignee: Advanced Micros Devices, Inc.
    Inventor: Effiong E. Ibok
  • Patent number: 6229084
    Abstract: A space solar cell includes a back surface electrode formed on a back surface opposite to a light receiving surface of a semiconductor substrate, and a dielectric layer formed between the back surface electrode and the semiconductor substrate. In the space solar cell, a plurality of openings are formed in the dielectric layer for establishing an electrical connection between the back surface electrode and the semiconductor substrate, and a ratio of an area occupied by the openings relative to an area of the back surface is within a range from 0.25% to 30%.
    Type: Grant
    Filed: September 27, 1999
    Date of Patent: May 8, 2001
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Tomoji Katsu
  • Patent number: 6225671
    Abstract: A method of fabricating a substantially smooth-surfaced anti-reflective coating on a semiconductor device structure including generating a plasma from an inert gas in a process chamber in which the substantially smooth anti-reflective coating is to be deposited. The anti-reflective coating may be a dielectric anti-reflective coating (DARC) which includes silicon, oxygen and nitrogen, and is preferably of the general formula SixOyNz, where x equals 0.40 to 0.65, y equals 0.02 to 0.56 and z equals 0.05 to 0.33. Preferably, x+y+z equals one. The method may also include fabricating a silicon nitride layer over the anti-reflective coating. A semiconductor device which includes a silicon nitride layer over an anti-reflective coating that has been fabricated in accordance with the inventive method has a density of less than about 40,000 particles or surface roughness features in the silicon nitride of about 120-150 nanometers dimension per eight inch wafer.
    Type: Grant
    Filed: March 29, 2000
    Date of Patent: May 1, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Zhiping Yin
  • Patent number: 6222241
    Abstract: A method and system for providing a semiconductor device is disclosed. The method and system include depositing an antireflective coating (ARC) layer having antireflective properties. The method and system also include depositing a capping layer on the ARC layer. The capping layer reduces a susceptibility of the ARC layer to removal while allowing the ARC layer to substantially retain the antireflective properties.
    Type: Grant
    Filed: October 29, 1999
    Date of Patent: April 24, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Marina V. Plat
  • Patent number: 6221776
    Abstract: The present invention advantageously provides a method and apparatus in which a sacrificial anti-reflective coating is used as an etch stop layer to protect a material from being etched. The anti-reflective coating has a relatively high viscosity which allows it to pool in recess regions as it is spin-on deposited across a surface having elevational disparities. This feature of the anti-reflective coating may be taken advantage of when using the anti-reflective coating as an etch stop layer. That is, the anti-reflective coating may be spin-on deposited across a substrate and structures arranged upon the substrate to allow the anti-reflective coating to accumulate in the recess regions interposed between the structures. In this manner, a thicker layer of the anti-reflective coating is formed in the recessed region above the substrate than above the structures which comprises a first layer of material arranged upon a second layer of material.
    Type: Grant
    Filed: May 5, 1998
    Date of Patent: April 24, 2001
    Assignee: Cypress Semiconductor Corp.
    Inventor: Eugene C. Smith
  • Patent number: 6218719
    Abstract: An anti-reflective coating having a composite layer of silicon nitride and silicon dioxide may be formed over the entire photosensitive region of the photodetector to minimize the amount of reflection. The composite layer comprises a silicon nitride layer and a dielectric layer contiguous to the silicon nitride layer. The anti-reflective coating may be formed in a CMOS process for fabricating the PN junction in the photodiode and CMOS devices for amplifying the photodetector signal, where the polysilicon gate layer is used as a etch stop. The P+ or N+ material in the PN junction of the photodiode has a distributed design where two portions of the region are separated by a distance in the range of Xd to 2Xd, where Xd is the one-sided junction depletion width, to enhance the electric field and to reduce the distance traveled by the carriers for enhancing bandwidth. A heavily doped region of the opposite type may be added between the two portions to further enhance the electric field.
    Type: Grant
    Filed: January 19, 1999
    Date of Patent: April 17, 2001
    Assignee: Capella Microsystems, Inc.
    Inventor: Koon Wing Tsang
  • Patent number: 6215165
    Abstract: Leakage current may be reduced in trench isolated semiconductor devices by providing a buffer between the trench isolation and an active area. For example, with a trench isolated photodiode, a buffer of opposite conductivity type may be provided between the trench and the diffusion that forms the p-n junction of the photodiode.
    Type: Grant
    Filed: May 12, 1999
    Date of Patent: April 10, 2001
    Assignee: Intel Corporation
    Inventors: Kevin M. Connolly, Jung S. Kang, Berni W. Landau, James E. Breisch, Akira Kakizawa, Joseph W. Parks, Jr., Mark A. Beiley, Zong-Fu Li, Cory E. Weber, Shaofeng Yu
  • Patent number: 6194308
    Abstract: Titanium aluminum nitrogen (“Ti—Al—N”) is deposited onto a semiconductor substrate area to serve as an antireflective coating. For wiring line fabrication processes, the Ti—Al—N layer serves as a cap layer which prevents unwanted reflection of photolithography light (i.e., photons) during fabrication. For field emission display devices (FEDs), the Ti—Al—N layer prevents light originating at the display screen anode from penetrating transistor junctions that would hinder device operation. For the wiring line embodiment, an aluminum conductive layer and a titanium-aluminum underlayer are formed beneath the antireflective cap layer. The Ti—Al underlayer reduces the shrinkage which occurs in the aluminum conductive layer during heat treatment.
    Type: Grant
    Filed: October 19, 1999
    Date of Patent: February 27, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Everett A. McTeer, Russell C. Zahorik, Scott G. Meikle
  • Patent number: 6187687
    Abstract: A practical photolithographic process for use in manufacturing isolation structures in semiconductor substrates at the 0.18 &mgr;m scale uses an inorganic anti-reflective coating (ARC) layer, particularly silicon oxynitride, under a silicon nitride mask layer to minimize substrate reflectivity. The same ARC layer increases latitude in process conditions in photolithographic patterning of both a first mask layer and a second planarization mask level. The silicon oxynitride layer additionally reduces edge/corner stress in isolation structures, improving gate oxide integrity in the device of which the isolation structure forms a part. Furthermore, because silicon oxynitride and silicon nitride respond to the same process conditions, a silicon oxynitride ARC layer can be introduced without increasing process complexity.
    Type: Grant
    Filed: November 5, 1998
    Date of Patent: February 13, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Marina V. Plat, Ming-Yin Hao
  • Patent number: 6174644
    Abstract: An anti-reflective coating and method of forming the anti-reflective coating are described wherein the anti-reflective coating is part of a silicon nitride layer formed on a semiconductor integrated circuit substrate. The anti-reflective coating is formed under the photoresist layer for greater effectiveness but does not disrupt the process flow since the anti-reflective coating is part of the silicon nitride layer. A first silicon nitride layer is formed having an index of refraction of about 2.1. A second silicon nitride layer having an index of refraction of about 1.9 and a second thickness is formed on the first silicon nitride layer. A layer of photoresist is then formed on the second silicon nitride layer. The second thickness is chosen to be equal to the wavelength of the light used to expose the layer of photoresist divided by the quantity of 4 multiplied by 1.9. The second silicon nitride layer acts as an effective anti-reflective layer.
    Type: Grant
    Filed: July 1, 1999
    Date of Patent: January 16, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Meng-Shiun Shieh, Po-Chieh Cheng
  • Patent number: 6175141
    Abstract: The invention relates to an opto-electronic sensor component comprising the following: a first semiconducting layer of predetermined conductivity type and a second layer of different semiconductor or metal conductivity type; a transition region between the two layers; at least one surface region through which the electromagnetic radiation to be detected can pass into the transition region (radiation-side surface region); and an electrode for each layer to connect both layers to an electrical circuit. The electrodes of the two layers are mounted on a surface of the component opposite a radiation-side surface region. This simplifies connection of the sensor component to an electrical circuit mounted on a circuit board or the like.
    Type: Grant
    Filed: June 18, 1998
    Date of Patent: January 16, 2001
    Assignees: Dr. Johanne Heidenhain GmbH, Silicon Sensor GmbH
    Inventors: Hermann Hofbauer, Bernd Kriegel, Peter Speckbauer, Martin Ullrich, Ruport Dietl
  • Patent number: 6166318
    Abstract: A radiated energy to electrical energy conversion device and technology is provided where there is a single absorber layer of semiconductor material. The thickness of the absorber layer is much less than had been appreciated as being useful heretofore in the art. Between opposing faces the layer is about 1/2 or less of the carrier diffusion length of the semiconductor material which is about 0.02 to 0.5 micrometers. The thickness of the absorber layer is selected for maximum electrical signal extraction efficiency and may also be selected to accommodate diffusion length damage over time by external radiation.
    Type: Grant
    Filed: March 3, 1998
    Date of Patent: December 26, 2000
    Assignee: Interface Studies, Inc.
    Inventor: John Lawrence Freeouf
  • Patent number: 6162737
    Abstract: The present invention pertains to films comprising silicon and oxygen that are doped with carbon and the use of the films in integrated circuit technology, such as capacitor constructions, DRAM constructions, semiconductive material assemblies, etching processes, and methods for forming capacitors, DRAMs and semiconductive material assemblies.
    Type: Grant
    Filed: July 16, 1999
    Date of Patent: December 19, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Ronald A. Weimer, John T. Moore
  • Patent number: 6157042
    Abstract: An infrared detector array includes a plurality of detector pixel structures, each of which comprises a plurality of elongate quantum well infrared radiation absorbing photoconductor (QWIP) elements. The group of QWIP elements are spaced such that they comprise a diffraction grating for the received infrared radiation. Top and bottom longitudinal contacts are provided on opposite surfaces of the QWIP elongate elements to provide current flow transverse to the axis of the element to provide the required bias voltage. An optical cavity enhancement coating applied to the surface of the elements. The coating can be applied as to fill the space between the elements and extends above the top of the array if desired. The coating may be applied in multiple layers. An infrared radiation reflector is provided to form an optical cavity for receiving infrared radiation. A plurality of detector pixel structures are combined to form a focal plane array.
    Type: Grant
    Filed: November 3, 1998
    Date of Patent: December 5, 2000
    Assignee: Lockheed Martin Corporation
    Inventor: Mark A. Dodd
  • Patent number: 6147390
    Abstract: A semiconductor substrate has a sensor disposed in a surface layer on an entrance surface thereof for receiving incident light, and an intermediate-refractive-index film is disposed on the entire entrance surface of the semiconductor substrate either directly or with an insulating film interposed therebetween. The intermediate-refractive-index film has a refractive index lower than the semiconductor substrate and a low hydrogen permeability. A thin film is disposed on an entrance surface of the intermediate-refractive-index film and having refractive index lower than the intermediate-refractive-index film, the thin film being permeable to hydrogen. The intermediate-refractive-index film serves as a reflection-resistant film. Reflections of incident light applied through the thin film and the reflection-resistant film to the sensor of the semiconductor substrate are suppressed. The intermediate-refractive-index film has a hole defined therein for passage of hydrogen therethrough upon hydrogen alloying.
    Type: Grant
    Filed: March 31, 1998
    Date of Patent: November 14, 2000
    Assignee: NEC Corporation
    Inventors: Takashi Nakano, Kohichi Arai, Nobukazu Teranishi, Nobuhiko Mutoh
  • Patent number: 6144083
    Abstract: A method of fabricating a substantially smooth-surfaced anti-reflective coating on a semiconductor device structure including generating a plasma from an inert gas in a process chamber in which the substantially smooth anti-reflective coating is to be deposited. The anti-reflective coating may be a dielectric anti-reflective coating (DARC) which includes silicon, oxygen and nitrogen, and is preferably of the general formula Si.sub.x O.sub.y N.sub.z, where x equals 0.40 to 0.65, y equals 0.02 to 0.56 and z equals 0.05 to 0.33. Preferably, x+y+z equals one. The method may also include fabricating a silicon nitride layer over the anti-reflective coating. A semiconductor device which includes a silicon nitride layer over an anti-reflective coating that has been fabricated in accordance with the inventive method has a density of less than about 40,000 particles or surface roughness features in the silicon nitride of about 120-150 nanometers dimension per eight inch wafer.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: November 7, 2000
    Assignee: Micron Technology, Inc.
    Inventor: Zhiping Yin
  • Patent number: 6140570
    Abstract: A photovoltaic element having a specific transparent and electrically conductive layer on a back reflecting layer, said transparent and electrically conductive layer comprising a zinc oxide material and having a light incident side surface region with a cross section having a plurality of arcs arranged while in contacted with each other, said arcs having a radius of curvature in the range of 300 .ANG. to 6 .mu.m and an angle of elevation from the center of the curvature in the range of 30 to 155.degree., and said cross section containing regions comprising said plurality of arcs at a proportion of 80% or more, compared to the entire region of the cross section.
    Type: Grant
    Filed: October 28, 1998
    Date of Patent: October 31, 2000
    Assignee: Canon Kabushiki Kaisha
    Inventor: Toshimitsu Kariya
  • Patent number: 6133613
    Abstract: The present invention provides an anti-reflection film for lithographic application on tungsten-silicide containing substrate. In one embodiment of the present invention, a structure for improving lithography patterning in integrated circuit comprises a tungsten-silicide layer, a diaphanous layer located above the tungsten-silicide layer, an anti-reflection layer located above the diaphanous layer, and a photoresist layer located above the anti-reflection layer for patterning the integrated circuit pattern.
    Type: Grant
    Filed: February 3, 1998
    Date of Patent: October 17, 2000
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Liang-Gi Yao, John Chin-Hsiang Lin, Hua-Tai Lin
  • Patent number: 6133618
    Abstract: The present invention, in one embodiment provides for use in a semiconductor device having a metal or dielectric layer located over a substrate material, a method of forming an anti-reflective layer on the metal layer and a semiconductor device produced by that method. The method comprises the steps of forming a dielectric layer, such as an amorphous silicon, of a predetermined thickness on the metal layer or dielectric and forming a gradient of refractive indices through at least a portion of the predetermined thickness of the dielectric layer by an oxidation process to transform the dielectric layer into an anti-reflective layer having a radiation absorption region and a radiation transmission region. In advantageous embodiments, the dielectric layer may be a substantially amorphous, non-stacked silicon layer. Additionally, the thickness of the dielectric layer may range from about 4.5 nm to about 150 nm.
    Type: Grant
    Filed: August 14, 1997
    Date of Patent: October 17, 2000
    Assignee: Lucent Technologies Inc.
    Inventor: Kurt G. Steiner
  • Patent number: 6118160
    Abstract: The present invention includes NMOS devices on a NMOS device area and coded NMOS devices on a cell area. Isolation structures are formed between the NMOS devices and between the coded NMOS devices. N conductive type bit lines are formed under first isolation structures. A coding region is formed on the cell area between two coded NMOS devices and under a second isolation structure. Spacers are formed on the side walls of the NMOS devices and the coded NMOS devices and an anti-reflective coating layer is formed on the NMOS devices and the coded NMOS devices.
    Type: Grant
    Filed: June 1, 1998
    Date of Patent: September 12, 2000
    Assignee: Texas Instruments - Acer Incorporated
    Inventor: Shye-Lin Wu
  • Patent number: 6114737
    Abstract: There is disclosed a light-receiving device comprising an absorption layer formed of a semiconductor material which is capable of generating electric charges in response to an incident light, a plurality of light-detecting regions formed in the absorption layer, each outputting an electric signal in response to an incident light signal, and a depletion region formed between the adjacent light-detecting regions for collecting electric charges generated in a portion of the absorption layer between the adjacent light-detecting regions.
    Type: Grant
    Filed: November 28, 1994
    Date of Patent: September 5, 2000
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Ichiro Tonai
  • Patent number: 6096968
    Abstract: For the simple production of a back surface field it is proposed that a boron-containing diffusion source layer (2) be applied to the rear (RS) of a silicon wafer (1) and boron be driven into the wafer to a depth of about 1 to 5 .mu.m at 900 to 1200.degree. C. This is done in an oxygen-containing atmosphere so that an oxide layer (4) is formed on open silicon surfaces, obviating the need to mask the regions not to be doped. After the removal of the oxide and source layer, phosphorus diffusion takes place and the back contact (3) is produced. It contains aluminum and, during the burn-in process, provides good ohmic contact.
    Type: Grant
    Filed: December 16, 1998
    Date of Patent: August 1, 2000
    Assignee: Siemens Solar GmbH
    Inventors: Reinhold Schlosser, Adolf Munzer
  • Patent number: 6060732
    Abstract: In a solid state image sensor comprising a plurality of photoelectric conversion regions and a plurality of transfer regions which are formed in a principal surface of a semiconductor substrate, and a plurality of transfer electrodes formed above the transfer regions, a first insulating film, an antireflection film and a second insulating film are formed in the named order on the photoelectric conversion regions. The antireflection film has a refractive index larger than that of the second insulating film but smaller than that of the semiconductor substrate. The stacked film composed of the first insulating film, the antireflection film and the second insulating film, is formed, in the transfer regions, to extend over the transfer electrode which is formed a third insulating film formed on the semiconductor substrate.
    Type: Grant
    Filed: June 24, 1999
    Date of Patent: May 9, 2000
    Assignee: NEC Corporation
    Inventors: Ichiro Murakami, Yasutaka Nakashiba
  • Patent number: 6057587
    Abstract: A semiconductor devices includes an anti-reflective structure for use in patterning metal layers in semiconductor devices. The anti-reflective structure is made, at least in part, using indium tin oxide. The anti-reflective structure is especially useful for patterning the metal layers with light having a wavelength of 190-300 nm. The anti-reflective structure may be a single indium tin oxide layer or may include a titanium nitride layer formed over the metal layer and an indium tin oxide layer formed over the titanium nitride layer. For many applications, the anti-reflective structure, in the presence of a photoresist layer, has a reflectivity of about 3% or less for light having a wavelength of 190-300 nm.
    Type: Grant
    Filed: August 28, 1997
    Date of Patent: May 2, 2000
    Assignee: VLSI Technology, Inc.
    Inventors: Kouros Ghandehari, Samit Sengupta
  • Patent number: 6051884
    Abstract: The invention provides a method for producing wiring and contacts in an integrated circuit including the steps of forming insulated gate components on a semiconductor substrate; applying a photo-reducible dielectric layer to cover the substrate; etching holes and forming contacts; photo-reducing the dielectric to increase its conductivity; covering the resulting structure with an interconnect layer; etching the interconnect layer to define wiring in electrical contact with the contacts; and oxidizing the dielectric to reduce its conductivity.
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: April 18, 2000
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Constantin Papadas
  • Patent number: 6043547
    Abstract: An antireflection coating (116) for use in fabricating integrated circuits and electronic devices comprises a film of chromium oxide, CrO, or chromium suboxide, CrO.sub.x where x<1. An antireflection layer reduces the standing waves and topographic notching in a photoresist layer (118) when applied over a highly reflective layer (114). Highly reflective layers may be metals, such as aluminum or gold, silicides, or semiconductors, such as silicon. These coatings are preferably made by reactive sputtering of a chromium target with a partial pressure of oxygen in the sputtering chamber. The antireflection layer works primarily by absorptive, rather than wave matching, principles. This antireflection layer exhibits good adhesion and may be integrated into the device. Integrating the layer into the device may reduce stress in the underlying layers and improve device yields and reliability.
    Type: Grant
    Filed: June 6, 1997
    Date of Patent: March 28, 2000
    Assignee: Mosel Vitelic, Inc.
    Inventors: Liang-Choo Hsia, Thomas Chang
  • Patent number: 6040591
    Abstract: It is possible to provide a smaller-sized and higher resolution solid-state imaging device by making it possible to adjust a focal position without considerably changing a radius of curvature of a microlens formed on a photosensor portion and without increasing a thickness of a layer on the photosensor portion. A microlens (17) is formed at a corresponding position on a sensor portion (2). A layer (18) having low refractive index as compared with refractive index of the microlens (17). A solid-state imaging device (10) having an uppermost surface thereof formed as a substantially flat surface is arranged.
    Type: Grant
    Filed: March 24, 1998
    Date of Patent: March 21, 2000
    Assignee: Sony Corporation
    Inventor: Youichi Otsuka
  • Patent number: 6040613
    Abstract: Titanium aluminum nitrogen ("Ti--Al--N") is deposited onto a semiconductor substrate area to serve as an antireflective coating. For wiring line fabrication processes, the Ti--Al--N layer serves as a cap layer which prevents unwanted reflection of photolithography light (i.e., photons) during fabrication. For field emission display devices (FEDs), the Ti--Al--N layer prevents light originating at the display screen anode from penetrating transistor junctions that would hinder device operation. For the wiring line embodiment an aluminum conductive layer and a titanium-aluminum underlayer are formed beneath the antireflective cap layer. The Ti--Al underlayer reduces the shrinkage which occurs in the aluminum conductive layer during heat treatment.
    Type: Grant
    Filed: January 19, 1996
    Date of Patent: March 21, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Everett A. McTeer, Russell C. Zahorik, Scott G. Meikle
  • Patent number: 6034321
    Abstract: A dot-junction photovoltaic cell using high absorption semi-conductors increases photovoltaic conversion performance of direct band gap semi-conductors by utilizing dot-junction cell geometry. This geometry is applied to highly absorbing materials, including In.sub.x-1 Ga.sub.x As. The photovoltaic cell configured to be separated into a thin active region and a thick, inactive substrate, which serves as a mechanical support.
    Type: Grant
    Filed: March 24, 1998
    Date of Patent: March 7, 2000
    Assignee: Essential Research, Inc.
    Inventor: Phillip P. Jenkins
  • Patent number: 6020628
    Abstract: To hermetically seal an optically transparent ceramic or glass member to a metallic housing, an aperture with a diameter less than the diameter of the member is formed through the metallic housing. The member is then press-fit into the aperture, partially displacing metal from the walls of the aperture, forming an inner burr circumscribing the aperture. The walls of the aperture and the circumscribing burr are then coated with a second metal, preferably electroless nickel. The resultant seal maintains hermeticity following thermal cycling and is particularly suited for the manufacture of a hybrid electronic package having an optical or opto-electronic coupling.
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: February 1, 2000
    Assignee: Olin Corporation
    Inventors: Steven A. Tower, Brian Mravic