Light Sensor Elements Overlie Active Switching Elements In Integrated Circuit (e.g., Where The Sensor Elements Are Deposited On An Integrated Circuit) Patents (Class 257/444)
  • Patent number: 11715751
    Abstract: The present technology relates a solid-state imaging element, an electronic apparatus, and a semiconductor device each of which enables deterioration of electrical characteristics in a well region of a semiconductor element formed in a thinned semiconductor substrate to be restrained. A solid-state imaging element as a first aspect of the present technology is a solid-state imaging element constituted by laminating semiconductor substrates in three or more layers, in which of the laminated semiconductor substrates, at least one sheet of the semiconductor substrate is thinned, and an impurity region whose carrier type is the same as that of the thinned semiconductor substrate is formed between a well region and a thinned surface portion in the thinned semiconductor substrate. The present technology can, for example, be applied to a CMOS image sensor.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: August 1, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hidenobu Tsugawa, Tomoharu Ogita
  • Patent number: 11573336
    Abstract: A detector is for electromagnetic radiation. In an embodiment, the detector includes a first, pixelated electrode layer, a second electrode, and a first layer including at least one first perovskite, located between the first, pixelated electrode layer and the second electrode. An embodiment further relates to a method for manufacturing a corresponding detector.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: February 7, 2023
    Assignee: SIEMENS HEALTHCARE GMBH
    Inventors: Sarah Deumel, Sandro Francesco Tedde, Judith Elisabeth Huerdler
  • Patent number: 11551963
    Abstract: A semiconductor device package includes a substrate, a partition structure and a polymer film. The partition structure is disposed on the substrate and defines a space for accommodating a semiconductor device. The polymer film is adjacent to a side of the partition structure distal to the substrate. A first side surface of the polymer film substantially aligns with a first side surface of the partition structure.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: January 10, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wei Ling Ma, Ying-Chung Chen, Hsin-Ying Ho, Cheng-Ling Huang, Chang Chin Tsai
  • Patent number: 11019297
    Abstract: An image capturing device includes: a plurality of first pixels that have a plurality of color components, and that generate first signals by photoelectrically converting incident light; a plurality of second pixels that generate second signals by photoelectrically converting light that has passed through the first pixels; and a drive unit that reads out the first signals from the first pixels, and that reads out the second signals from the second pixels at timings that are different from timings of reading out the first signals.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: May 25, 2021
    Assignee: NIKON CORPORATION
    Inventor: Yuki Kita
  • Patent number: 10991732
    Abstract: A device includes a first element having rectification characteristics that allow electric current to flow from an upper electrode to a lower electrode, an n-channel thin film transistor, and a control electrode. The n-channel thin film transistor includes a semiconductor film, a gate electrode, a first signal electrode, and a second signal electrode. The control electrode faces the gate electrode with the semiconductor film interposed therebetween. The second signal electrode is connected with the lower electrode. The control electrode is connected with the lower electrode. At least a part of a first channel end on the first signal electrode side of the semiconductor film is located within a region of the control electrode, when viewed planarly. A second channel end on the second signal electrode side of the semiconductor film is distant from the control electrode, when viewed planarly.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: April 27, 2021
    Assignee: TIANMA JAPAN, LTD.
    Inventors: Hiroyuki Sekine, Shuhei Nara, Takayuki Ishino, Yusuke Yamamoto
  • Patent number: 10986300
    Abstract: An image capturing device includes: a plurality of first pixels that have a plurality of color components, and that generate first signals by photoelectrically converting incident light; a plurality of second pixels that generate second signals by photoelectrically converting light that has passed through the first pixels; and a drive unit that reads out the first signals from the first pixels, and that reads out the second signals from the second pixels at timings that are different from timings of reading out the first signals.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: April 20, 2021
    Assignee: NIKON CORPORATION
    Inventor: Yuki Kita
  • Patent number: 10971538
    Abstract: A semiconductor structure having: a silicon structure; and a plurality of laterally spaced PiN diodes formed in the silicon structure; and a surface of the silicon structure configured to reduce reverse bias leakage current through the PiN diodes. In one embodiment, a gate electrode structures is disposed on a surface of the silicon structure, the gate electrode structure having portions disposed between adjacent pairs of the diodes, the gate structure being biased to prevent leakage current through the diodes.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: April 6, 2021
    Assignee: Raytheon Company
    Inventors: John J. Drab, Justin Gordon Adams Wehner, Christian M. Boemler
  • Patent number: 10903291
    Abstract: The present application relates to a terminal and a display screen. A display screen includes a display area including at least two display regions. The at least two display regions includes a first display region and a second display region. A total thickness of metal layers of the first display region is less than a total thickness of metal layers of the second display region.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: January 26, 2021
    Inventors: Liwei Ding, Qi Shan, Yu Zhang, Fu Liao
  • Patent number: 10811449
    Abstract: Provided is a technique to prevent decreases in the detection accuracy caused by leakage current of photoelectric conversion elements that is caused by permeation of moisture. An active matrix substrate 1 includes a plurality of pixels, each of which includes: a photoelectric conversion element 12 that includes a pair of electrodes 14a, 14b and a semiconductor layer 15 interposed between the electrodes 14a, 14b; an inorganic film 105a that covers a part of a surface of one electrode 14b of the pair of electrodes, and a side surface of the photoelectric conversion element 12; a protection film 105b that has corrosion resistance against moisture, and covers a part of the inorganic film 105a that overlaps with the side surface of the photoelectric conversion element 12; and an organic film 106 that covers the inorganic film 105a and the protection film 105b.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: October 20, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Katsunori Misaki, Kunio Matsubara
  • Patent number: 10381381
    Abstract: A display may have an array of pixels with light-emitting diodes that emit light to form images. The display may have a substrate with thin-film transistor circuitry for supplying signals to the light-emitting diodes. Anodes may be formed on the thin-film transistor circuitry, emissive material may be formed on the anodes, and a cathode layer may overlap the anodes. During operation, currents may flow between the anodes and the cathode layer to illuminate the diodes. An array of electrical components such as an array of light sensors in an integrated circuit may be mounted under the substrate. An array of corresponding light transmitting windows may be formed in the display each of which may allow light to pass through the display to a corresponding one of the light sensors. Light transmitting windows may be formed by patterning the cathode layer and supplying the windows with antireflection layers.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: August 13, 2019
    Assignee: Apple Inc.
    Inventors: Minhyuk Choi, Bhadrinarayana Lalgudi Visweswaran, Cheng Chen, Chin-Wei Lin, Meng-Huan Ho, Rui Liu, Shih Chang Chang, Soojin Park, Sarfaraz Moh, Jungmin Lee, John Z. Zhong
  • Patent number: 10362250
    Abstract: A global shutter image sensor of a back-illuminated type includes a semiconductor substrate and pixels. Each pixel includes a photosensitive area, a storage area, a readout area and areas for transferring charges between these different areas. The image sensor includes, for each pixel, a protector extending at least partly into the substrate from the back of the substrate to ensure that the storage area is protected against back illumination.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: July 23, 2019
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Francois Guyader, Francois Roy
  • Patent number: 10347679
    Abstract: An imaging device includes a plurality of pixels two-dimensionally disposed. At least part of the plurality of pixels includes a first photoelectric conversion unit and a second photoelectric conversion unit provided in a semiconductor substrate and each including a first semiconductor region of a first conductivity type for accumulating a signal charge, a first isolation region provided in the semiconductor substrate between the first photoelectric conversion unit and the second photoelectric conversion unit and including a second semiconductor region forming a first potential barrier for the signal charge in the first semiconductor region, and a second isolation region provided in the semiconductor substrate between the first photoelectric conversion unit and the second photoelectric conversion units and including a trench isolation forming a second potential barrier higher than the first potential barrier for the signal charge in the first semiconductor region.
    Type: Grant
    Filed: May 8, 2017
    Date of Patent: July 9, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Taro Kato, Fumihiro Inui, Takehiko Soda, Akira Okita
  • Patent number: 10211246
    Abstract: The present disclosure relates to a solid-state imaging device, an electronic apparatus, and a manufacturing method that are designed to further increase conversion efficiency. A solid-state imaging device includes a pixel in which element separation is realized by a first trench element separation region having a trench structure in a region between an FD unit and an amplifying transistor among element separation elements separating the elements constituting the pixel from one another, and a second trench element separation region having a trench structure in a region other than the region between the FD unit and the amplifying transistor among the element separation regions separating the elements constituting the pixel from one another, and the first trench element separation region is deeper than the second trench element separation region. The present technology can be applied to CMOS image sensors, for example.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: February 19, 2019
    Assignee: Sony Corporation
    Inventor: Naoyuki Sato
  • Patent number: 10153315
    Abstract: A photosensitive imaging apparatus and a method of forming such an apparatus are disclosed. The apparatus includes: a first semiconductor substrate, including a photosensitive semiconductor layer including an array of photodetectors; and a second semiconductor substrate, stacked with the first semiconductor substrate and including a pixel-circuitry semiconductor layer including an array of in-pixel amplifier circuitries. Each in-pixel amplifier circuitry includes at least one first pixel MOS transistor. Each first pixel MOS transistor has an active region disposed between the gate layer thereof and the first semiconductor substrate. The photosensitive imaging apparatus allows an effective reduction in noises produced during light reception of the in-pixel amplifier circuitries and an increased light utilization of the photodetectors.
    Type: Grant
    Filed: April 22, 2016
    Date of Patent: December 11, 2018
    Assignee: SHANGHAI JADIC OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Jianhong Mao, Cheng Xu
  • Patent number: 10096788
    Abstract: A transistor device comprising: source and drain conductors connected by a semiconductor channel; and a gate conductor capacitively coupled to the semiconductor channel via a gate dielectric; wherein the gate conductor comprises at least one portion overlapping at least part of at least one of said source and drain conductors; and further comprising a patterned insulator interposed between at least part of said at least one of the source and drain conductors and said at least one overlapping portion of said gate conductor so as to reduce capacitive coupling between the said at least one of the source and drain conductors and the gate conductor by more than any reduction in capacitive coupling between the semiconductor channel and the gate conductor.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: October 9, 2018
    Assignee: FLEXENABLE LIMITED
    Inventor: Jan Jongman
  • Patent number: 9991303
    Abstract: An image sensor structure is provided. The image sensor device structure includes a substrate, and the substrate includes an array region and a peripheral region. The image sensor device structure includes an anti-reflection layer formed on the substrate and a buffer layer formed on the anti-reflection layer. The image sensor device structure includes a first etch stop layer formed on the buffer layer and a metal grid structure formed on the first etch stop layer. The image sensor device structure also includes a dielectric layer formed on the metal grid structure.
    Type: Grant
    Filed: March 16, 2015
    Date of Patent: June 5, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hung-Wen Hsu, Ching-Chung Su, Cheng-Hsien Chou, Jiech-Fun Lu, Shih-Pei Chou, Yeur-Luen Tu
  • Patent number: 9947814
    Abstract: A semiconductor optical sensor includes a plurality of sensing units and to senses an incident optical signal to generate an electrical signal. One of the sensing units includes a substrate, an optical sensing element, a lens and an optical shielding element. The optical sensing element, whose material is different from that of the substrate, converts the incident optical signal into the electrical signal. The lens, whose material includes the same as that of the substrate, guides the incident optical signal to the optical sensing element by changing the propagation path of the incident optical signal. The optical shielding element, which surrounds the optical sensing element, alters the propagation path or propagation distance of the incident optical signal after the incident optical signal passes through the lens such that the incident optical signal will not reach an optical sensing element of an adjacent sensing unit.
    Type: Grant
    Filed: November 3, 2015
    Date of Patent: April 17, 2018
    Assignee: ARTILUX INC.
    Inventor: Han-Din Liu
  • Patent number: 9917135
    Abstract: A method of manufacturing a solid-state image sensor is provided. The method comprises: depositing a gate electrode film above the semiconductor layer; etching the gate electrode film to form a first gate electrode patterned in a pixel region, leaving the gate electrode film in a peripheral region; depositing a first insulating film above the semiconductor layer after the forming the first gate electrode; removing the first insulating film formed in the peripheral region; etching the gate electrode film left in the peripheral region to form a second gate electrode patterned in the peripheral region after the removing the first insulating film; forming a second insulating film above the semiconductor layer after the forming the second gate electrode; and forming a side wall on side surface of the second gate electrode by etching the second insulating film.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: March 13, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Masashi Kusukawa
  • Patent number: 9812478
    Abstract: An aerogel-encapsulated image sensor includes a device die with an image sensor fabricated thereon and an aerogel layer that encapsulates the image sensor. A method for encapsulating image sensor pixel arrays of respective bare image sensors formed on a sensor array sheet may include injecting an uncured aerogel portion on each image sensor pixel array, and curing each uncured aerogel portion. The step of curing may include at least one of (a) super-critical drying, (b) surface-modification drying, and (c) pinhole drying an uncured aerogel portion. The method may further include singulating the sensor array sheet into a plurality of aerogel-encapsulated image sensors. A method for encapsulating image sensor pixel arrays of respective bare image sensors on a device wafer may include forming an aerogel layer on each bare image sensor. The step of forming may include at least one of spin-coating, dip-coating, and spray-coating the aerogel layer.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: November 7, 2017
    Assignee: OmniVision Technologies, Inc.
    Inventors: Chun-Sheng Fan, Wei-Feng Lin
  • Patent number: 9417338
    Abstract: A radiation image pickup apparatus includes an image pickup panel in which a plurality of image pickup substrates including photoelectric-conversion elements is fixed onto a base, a scintillator portion including a scintillator layer of alkali halide-based columnar crystal and overlaid on the image pickup panel, and a moisture-proof layer provided between the base and the scintillator layer, at least between the plurality of image pickup substrates. The water vapor permeability of the moisture-proof layer is 10 g/m2/day or less.
    Type: Grant
    Filed: November 27, 2013
    Date of Patent: August 16, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takamasa Ishii, Masato Inoue, Shinichi Takeda, Satoru Sawada, Taiki Takei, Kota Nishibe
  • Patent number: 9419035
    Abstract: An example image sensor includes first, second, and third micro-lenses. The first micro-lens is in a first color pixel and has a first curvature and a first height. The second micro-lens is in a second color pixel and has a second curvature and a second height. The third micro-lens is in a third color pixel and has a third curvature and a third height. The first curvature is the same as both the second curvature and the third curvature and the first height is greater than the second height and the second height is greater than the third height, such that light absorption depths for the first, second, and third color pixels are the same.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: August 16, 2016
    Assignee: OmniVision Technologies, Inc.
    Inventors: Fei Wu, Hongjun Li, Yin Qian, Hsin-Chih Tai, Howard E. Rhodes, Jizhang Shan
  • Patent number: 9276030
    Abstract: A focal plane array (FPA) comprising a photodiode array (PDA) and a read out integrated circuit (ROIC), wherein the FPA can include a plurality of conductive bumps that electrically couple PDA circuitry to ROIC circuitry. In an embodiment, an optically transparent lid can include a plurality traces electrically coupled to circuitry on the ROIC which can be used as a conductive path between the ROIC and external pads.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 1, 2016
    Assignee: SENSORS UNLIMITED, INC.
    Inventor: Peter E. Dixon
  • Patent number: 9234859
    Abstract: An integrated capacitive-type humidity sensor formed in a semiconductor chip integrating a sensing capacitor and a reference capacitor. Each of the sensing and reference capacitors have at least a first electrode and at least a second electrode, the first and second electrodes of each of the sensing and reference capacitors being arranged at distance and mutually insulated. A hygroscopic layer extends on the sensing and reference capacitors and a conductive shielding region extends on the reference capacitor but not on the sensing capacitor.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: January 12, 2016
    Assignees: STMicroelectronics S.r.l., STMicroelectronics (Crolles 2) SAS
    Inventors: Michele Vaiana, Daniele Casella, Giuseppe Bruno, Rosario Cariola, Benoit Gautheron
  • Patent number: 9233845
    Abstract: The invention comprises an optoelectronic platform with a carbon-based conduction layer and a layer of colloidal quantum dots on top as light absorbing material. Photoconductive gain on the order of 106 is possible, while maintaining de operating voltage low. The platform can be used as a transistor.
    Type: Grant
    Filed: August 1, 2012
    Date of Patent: January 12, 2016
    Assignee: Fundacio Institut De Ciencies Fotoniques
    Inventors: Konstantatos Gerasimos, Koppens Frank
  • Patent number: 9147769
    Abstract: A thin film transistor structure including a substrate, a gate, an oxide semiconductor layer, a gate insulation layer, a source, a drain, a silicon-containing light absorption layer and an insulation layer is provided. The gate insulation layer is disposed between the oxide semiconductor layer and the gate. The oxide semiconductor layer and the gate are stacked in a thickness direction. The source and the drain contact the oxide semiconductor layer. A portion of the oxide semiconductor layer without contacting the source and the drain defines a channel region located between the source and the drain. The oxide semiconductor layer is located between the substrate and the silicon-containing light absorption layer. The silicon-containing light absorption layer has a band gap smaller than 2.5 eV. The insulation layer is disposed between the oxide semiconductor layer and the silicon-containing light absorption layer, and in contact with the silicon-containing light absorption layer.
    Type: Grant
    Filed: August 12, 2013
    Date of Patent: September 29, 2015
    Assignee: E Ink Holdings Inc.
    Inventors: Cheng-Hang Hsu, Tzung-Wei Yu, Wei-Tsung Chen, Ted-Hong Shinn
  • Patent number: 9059360
    Abstract: A design structure embodied in a machine readable medium used in a design process includes a first dielectric layer disposed on an intermediary layer, a first conductive pad portion and a first interconnect portion disposed on the first dielectric layer, a second dielectric layer disposed on the first dielectric layer, a first capping layer disposed on the first interconnect portion and a portion of the first conductive pad portion, a second capping layer disposed on the first capping layer and a portion of the second dielectric layer, an n-type doped silicon layer disposed on the second capping layer and the first conductive pad portion, an intrinsic silicon layer disposed on the n-type doped silicon layer, and a p-type doped silicon layer disposed on the intrinsic silicon layer.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: June 16, 2015
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey P. Gambino, Robert K. Leidy, Richard J. Rassel
  • Patent number: 9053996
    Abstract: A solid-state imaging apparatus comprises a plurality of pixel units forming a pixel array, and a plurality of processing portions each corresponding to each column of the pixel array respectively, and each of the plurality of processing portions comprising a first front-side capacitor configured to hold a first signal having a noise component, a second front-side capacitor configured to hold a second signal having the noise component and a signal component, a first transfer portion configured to transfer the first signal from the first front-side capacitor to a first back-side capacitor, and a second transfer portion configured to transfer the second signal from the second front-side capacitor to a second back-side capacitor, wherein positions of the first and the second transfer portions are different from each other in a direction of the column.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: June 9, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masaaki Iwane, Yuichiro Yamashita, Akira Okita
  • Patent number: 9035411
    Abstract: Improvement of signal integrity, a size reduction of a device, and the like are realized. A semiconductor integrated circuit section 11 and an optical wiring section 21 are electrically connected to each other by a connection section 31 provided between a face of the semiconductor integrated circuit section 11 and a face of the optical wiring section 21 facing each other. An electrical wiring 23 is provided in an optical wiring section 21. The electrical wiring 23 of the optical wiring section 21 functions as a global wiring electrically connecting between a plurality of circuit blocks CB provided in the semiconductor integrated circuit section 11.
    Type: Grant
    Filed: October 2, 2009
    Date of Patent: May 19, 2015
    Assignees: SONY CORPORATION, NEC CORPORATION
    Inventors: Toshihide Ueno, Masao Kinoshita, Takanori Shimizu
  • Patent number: 9018723
    Abstract: The present disclosure is directed to an infrared sensor that includes a plurality of pairs of support structures positioned on the substrate, each pair including a first support structure adjacent to a second support structure. The sensor includes plurality of pixels, where each pixel is associated with one of the pairs of support structures. Each pixel includes a first infrared reflector layer on the substrate between the first and the second support structures, a membrane formed on the first and second support structures, a thermally conductive resistive layer on the membrane and positioned above the first infrared reflector layer, a second infrared reflector layer on the resistive layer, and an infrared absorption layer on the second infrared reflector layer.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: April 28, 2015
    Assignee: STMicroelectronics Pte Ltd
    Inventors: Olivier Le Neel, Ravi Shankar, Tien Choy Loh
  • Patent number: 9018724
    Abstract: A method and apparatus for constructing MEMS devices is provided which employs a low cost molded housing that simultaneously provides precise and accurate alignment, mechanical protection, electrical connections and structural integrity for mounting optical and MEMS components. The package includes a MEMS die mounting surface, an optical component mounting surface and an optical imaging window monolithically fabricated with the MEMS die mounting surface in a predetermined orientation for providing alignment between the MEMS die and optical components. A MEMS adaptor plate is provided to facilitate connections of a MEMS die to external components.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: April 28, 2015
    Assignee: AdvancedMEMS LLP
    Inventors: Albert Ting, Daniel T. McCormick, Michael Rattner
  • Patent number: 9006797
    Abstract: A micro-electro-mechanical system (MEMS), methods of forming the MEMS and design structures are provided. The method includes forming a coplanar waveguide (CPW) comprising a signal electrode and a pair of electrodes on a substrate. The method includes forming a first sacrificial material over the CPW, and a wiring layer over the first sacrificial material and above the CPW. The method includes forming a second sacrificial material layer over the wiring layer, and forming insulator material about the first sacrificial material and the second sacrificial material. The method includes forming at least one vent hole in the insulator material to expose portions of the second sacrificial material, and removing the first and second sacrificial material through the vent hole to form a cavity structure about the wiring layer and which exposes the signal line and pair of electrodes below the wiring layer. The vent hole is sealed with sealing material.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: April 14, 2015
    Assignee: International Business Machines Corporation
    Inventors: Hanyi Ding, Qizhi Liu, Anthony K. Stamper
  • Patent number: 9000343
    Abstract: The present invention relates to a solid-state imaging apparatus including a first substrate having a plurality of photoelectric conversion units and a second substrate having a plurality of readout circuits. The first substrate is provided with a plurality of first conductive patterns that are electrically separated from one another and the second substrate is provided with a plurality of second conductive patterns that are electrically separated from one another. The first conductive patterns each include a first partial pattern extending in a first direction. The second conductive patterns each include a partial pattern extending in a second direction different from the first direction. The first partial pattern has a length extending in the first direction longer than a length thereof in the second direction.
    Type: Grant
    Filed: June 23, 2011
    Date of Patent: April 7, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takeshi Ichikawa, Mineo Shimotsusa, Genzo Momma
  • Patent number: 9000541
    Abstract: A photoelectric conversion device includes circuit portions disposed on a substrate, a first electrode electrically connected to one of the circuit portions, an optically transparent second electrode opposing the first electrode, and a photoelectric conversion portion disposed between the first electrode and the second electrode. The photoelectric conversion portion has a multilayer structure including a light absorption layer made of a p-type compound semiconductor film having a chalcopyrite structure, an amorphous oxide semiconductor layer, and a window layer made of an n-type semiconductor film.
    Type: Grant
    Filed: February 7, 2012
    Date of Patent: April 7, 2015
    Assignee: Seiko Epson Corporation
    Inventors: Yasunori Hattori, Tomotaka Matsumoto, Tsukasa Eguchi
  • Patent number: 8994083
    Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein. and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: March 31, 2015
    Assignee: Sony Corporation
    Inventors: Ryoji Suzuki, Keiji Mabuchi, Tomonori Mori
  • Patent number: 8952335
    Abstract: Bias lines are provided for respective columns of pixels, and of a plurality of bias lines, bias lines provided at an interval of 10 mm are connected to a bias power source through a current detector. The remaining bias lines are connected directly to the bias power source without passing through the current detector. In each pixel, if electric charge is generated by a radiation detection element in accordance with the dose of irradiated radiation, a current flows in the bias line in accordance with the generated electric charge. The current detector detects the current flowing in the bias line, and a control unit detects, as the timing of starting irradiation of a radiation, when the detected current (current value) is equal to or greater than a threshold value, and starts radiographing of a radiological image.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: February 10, 2015
    Assignee: Fujifilm Corporation
    Inventor: Keiichiro Sato
  • Patent number: 8952476
    Abstract: According to one embodiment, a solid-state image pickup device includes a photoelectric converter, transfer, reset and amplifier transistors and a floating diffusion layer formed on a semiconductor substrate. The photoelectric converter coverts incident light to a signal charge. The transfer transistor transfers the signal charge converted by the photoelectric converter. The floating diffusion layer stores the signal charge transferred by the transfer transistor. The reset transistor resets the signal charge stored in the floating diffusion layer. The amplifier transistor amplifies the signal charge stored in the floating diffusion layer. Source and drain regions of the reset transistor, and its channel region are formed in an L-shape on the semiconductor substrate.
    Type: Grant
    Filed: February 6, 2013
    Date of Patent: February 10, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ai Shimomura, Takanori Yagami
  • Patent number: 8952474
    Abstract: Provided is a method of fabricating a backside illuminated image sensor that includes providing a device substrate having a frontside and a backside, where pixels are formed at the frontside and an interconnect structure is formed over pixels, forming a re-distribution layer (RDL) over the interconnect structure, bonding a first glass substrate to the RDL, thinning and processing the device substrate from the backside, bonding a second glass substrate to the backside, removing the first glass substrate, and reusing the first glass substrate for fabricating another backside-illuminated image sensor.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: February 10, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Chieh Huang, Dun-Nian Yaung, Chih-Jen Wu, Chen-Ming Huang
  • Patent number: 8937342
    Abstract: A CMOS image sensor includes an active pixel structure suitable for sensing light incident from outside and converting a sensed light into an electrical signal, and an optical block structure suitable for blocking a visible light and passing a UV light to check and evaluate an electrical characteristic of the active pixel area. The UV pass filter includes first and second insulation layers comprising an insulator, and a metal layer formed between the first and second insulation layers.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: January 20, 2015
    Assignees: SK Hynix Inc., Postech Academy-Industry Foundation
    Inventors: Do Hwan Kim, Su Hwan Lim, Hae Wook Han, Young Woong Do, Won Jun Lee
  • Patent number: 8933527
    Abstract: A device includes a plurality of isolation spacers, and a plurality of bottom electrodes, wherein adjacent ones of the plurality of bottom electrodes are insulated from each other by respective ones of the plurality of isolation spacers. A plurality of photoelectrical conversion regions overlaps the plurality of bottom electrodes, wherein adjacent ones of the plurality of photoelectrical conversion regions are insulated from each other by respective ones of the plurality of isolation spacers. A top electrode overlies the plurality of photoelectrical conversion regions and the plurality of isolation spacers.
    Type: Grant
    Filed: October 17, 2012
    Date of Patent: January 13, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Shin Chu, Cheng-Tao Lin, Meng-Hsun Wan, Szu-Ying Chen, Jen-Cheng Liu, Dun-Nian Yaung
  • Patent number: 8921901
    Abstract: A stacked wafer structure includes a CIS wafer, an ISP wafer, a lamination layer, a through silicon via and a pixel device. The CIS wafer bonds to the ISP wafer through the lamination layer. The pixel device is disposed on the CIS wafer. The through silicon via penetrates either the CIS wafer or the ISP wafer to connect devices in CIS wafer to the devices in ISP wafer electrically.
    Type: Grant
    Filed: June 10, 2013
    Date of Patent: December 30, 2014
    Assignee: United Microelectronics Corp.
    Inventor: Ching-Hung Kao
  • Patent number: 8901679
    Abstract: A micromechanical structure, in particular a sensor arrangement, includes at least one micromechanical functional layer, a CMOS substrate region arranged below the at least one micromechanical functional layer, and an arrangement of one or more contact elements. The CMOS substrate region has at least one configurable circuit arrangement. The arrangement of one or more contact elements is arranged between the at least one micromechanical functional layer and the CMOS substrate region and is electrically connected to the micromechanical functional layer and the circuit arrangement. The configurable circuit arrangement is designed in such a way that the one or more contact elements are configured to be selectively connected to electrical connection lines in the CMOS substrate region.
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: December 2, 2014
    Assignee: Robert Bosch GmbH
    Inventors: Johannes Classen, Mirko Hattass, Lars Tebje, Daniel Christoph Meisel
  • Patent number: 8883524
    Abstract: Methods and apparatus for a sensor are disclosed. An oxide layer is formed on a substrate, followed by a spacer layer and a buffer layer. A photoresist layer is formed on the buffer layer over a pixel region, with an opening exposing a first part of the buffer layer. A first etching is performed to remove the first part of the buffer layer to expose a first part of the spacer layer. A second etching is performed to remove the first part of the spacer layer, the remaining buffer layer, and partially remove a second part of the spacer layer so that the result spacer layer will have an end with a shape substantially similar to a triangle, a height of the end is in a substantially same range as a length of the end.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: November 11, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Tsung Kuo, Jiech-Fun Lu, Yeur-Luen Tu, Chia-Shiung Tsai
  • Patent number: 8885080
    Abstract: The present invention is applied to an image pickup device with a CMOS solid-state image pickup element, in which an analog-to-digital conversion circuit is disposed in a surface on an opposite side from an image pickup surface in a semiconductor chip 2.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: November 11, 2014
    Assignee: Sony Corporation
    Inventor: Seiji Kobayashi
  • Patent number: 8878325
    Abstract: A device includes an image sensor chip having formed therein an elevated photodiode, and a device chip underlying and bonded to the image sensor chip. The device chip has a read out circuit electrically connected to the elevated photodiode.
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: November 4, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Hsun Wan, Yi-Shin Chu, Szu-Ying Chen, Pao-Tung Chen, Jen-Cheng Liu, Dun-Nian Yaung
  • Patent number: 8878268
    Abstract: At least one exemplary embodiment is directed to a solid state image sensor including at least one antireflective layer and/or non rectangular shaped wiring layer cross section to reduce dark currents and 1/f noise.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: November 4, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toru Koizumi, Akira Okita, Tetsuya Itano, Sakae Hashimoto, Ryuichi Mishima
  • Patent number: 8872299
    Abstract: A semiconductor device capable of high-speed operation. The semiconductor device includes a first transistor, a second transistor, and a capacitor. One of a source and a drain of the first transistor is supplied with a first signal. One of a source and a drain of the second transistor is supplied with a first potential. A gate of the second transistor is supplied with a second signal. A first electrode of the capacitor is electrically connected to the other of the source and the drain of the first transistor. A second electrode of the capacitor is electrically connected to the other of the source and the drain of the second transistor. In a first period, the first signal is low and the second signal is high. In a second period, the first signal is high and the second signal is either low or high.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: October 28, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Atsushi Umezaki
  • Publication number: 20140306313
    Abstract: A semiconductor device includes: a first semiconductor chip; and a second semiconductor chip that is stacked on the first semiconductor chip. The first semiconductor chip includes a first wiring portion of which a side surface is exposed at a side portion of the first semiconductor chip. The second semiconductor chip includes a second wiring portion of which a side surface is exposed at a side portion of the second semiconductor chip. The respective side surfaces of the first wiring portion and the second wiring portion, which are exposed at the side portions of the first semiconductor chip and the second semiconductor chip, are covered by a conductive layer, and the first wiring portion and the second wiring portion are electrically connected to each other through the conductive layer.
    Type: Application
    Filed: June 26, 2014
    Publication date: October 16, 2014
    Inventors: Ikuo Yoshihara, Taku Umebayashi, Hiroshi Takahashi, Hironobu Yoshida
  • Patent number: 8853786
    Abstract: A semiconductor device includes a semiconductor switching element and a rectifier element. The semiconductor switching element includes a plurality of switching cells connected in parallel between a first and a second load terminal and is formed in a cell area of a first semiconductor layer. The rectifier element includes a plurality of rectifier cells connected in parallel between the first load terminal and an auxiliary terminal. The rectifier cells are formed in a second semiconductor layer parallel to the first semiconductor layer in a vertical projection of the cell area. The semiconductor device may integrate free-wheeling diodes for inductive loads and semiconductor switching elements for switching the inductive loads.
    Type: Grant
    Filed: July 2, 2013
    Date of Patent: October 7, 2014
    Assignee: Infineon Technologies AG
    Inventor: Christoph Kadow
  • Patent number: 8847296
    Abstract: A solid-state imaging device is a solid-state imaging device in which a first substrate formed on a first semiconductor wafer and a second substrate formed on a second semiconductor wafer are bonded via connect that electrically connects the substrates, wherein the first substrate includes photoelectric conversion units, the second substrate includes an output circuit that acquires a signal generated by the photoelectric conversion unit via the connector and outputs the signal, and dummy connectors that support the first and second bonded substrates are further arranged in a substrate region in which the connectors are not arranged in a substrate region of at least one of the first substrate and the second substrate.
    Type: Grant
    Filed: January 16, 2013
    Date of Patent: September 30, 2014
    Assignee: Olympus Corporation
    Inventors: Mitsuhiro Tsukimura, Naohiro Takazawa, Yoshiaki Takemoto, Hiroshi Kikuchi, Haruhisa Saito, Yoshitaka Tadaki, Yuichi Gomi
  • Patent number: 8816459
    Abstract: An image sensor having a wave guide includes a semiconductor substrate formed with a photodiode and a peripheral circuit region; an anti-reflective layer formed on the semiconductor substrate; an insulation layer formed on the anti-reflective layer; a wiring layer formed on the insulation layer and connected to the semiconductor substrate; at least one interlayer dielectric stacked on the wiring layer; and a wave guide connected to the insulation layer by passing through the interlayer dielectric and the wiring layer which are formed over the photodiode.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: August 26, 2014
    Assignee: Siliconfile Technologies Inc.
    Inventors: In-Gyun Jeon, Se-Jung Oh, Heui-Gyun Ahn, Jun-Ho Won