Light Sensor Elements Overlie Active Switching Elements In Integrated Circuit (e.g., Where The Sensor Elements Are Deposited On An Integrated Circuit) Patents (Class 257/444)
  • Patent number: 8436443
    Abstract: A backside illuminated image sensor is provided which includes a substrate having a front side and a backside, a sensor formed in the substrate at the front side, the sensor including at least a photodiode, and a depletion region formed in the substrate at the backside, a depth of the depletion region is less than 20% of a thickness of the substrate.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: May 7, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Hsuan Hsu, Han-Chi Liu, Ching-Chun Wang
  • Patent number: 8432011
    Abstract: An image sensor package that includes a handler assembly having a crystalline handler with a cavity formed into its first surface. The cavity has a stepped sidewall that defines at least one step surface extending inwardly inside the cavity. A plurality of conductive elements each extend from the step surface(s), through the crystalline handler and to its second surface. A sensor chip is disposed in the cavity and includes a substrate, a plurality of photo detectors formed at its front surface, and a plurality of contact pads formed at its front surface which are electrically coupled to the photo detectors. A plurality of wires each extend between and electrically connect one of the contact pads and one of the conductive elements. A substrate is disposed over the cavity and mounted to the crystalline handler. The substrate is optically transparent to at least one range of light wavelengths.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: April 30, 2013
    Assignee: Optiz, Inc.
    Inventor: Vage Oganesian
  • Patent number: 8426937
    Abstract: A light sensor includes a control electrode formed on a substrate and having two edges, and a semiconductor film formed opposite the control electrode with an insulating film interposed therebetween, and including a photoactive layer and electrode regions located in a pair on opposite sides of the photoactive layer. The photoactive layer is arranged in an area that overlaps the control electrode. At least one of the paired electrode regions overlaps proximal one of the edges of the control electrode, and on and along the proximal edge, the at least one electrode region has a length shorter than that of the photoactive layer in a direction along the proximal edge of the control electrode.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: April 23, 2013
    Assignee: Sony Corporation
    Inventors: Natsuki Otani, Tsutomu Tanaka
  • Patent number: 8426794
    Abstract: A photoelectric conversion device includes a photoelectric conversion unit which is arranged in a semiconductor substrate, a charge holding portion which is arranged in the semiconductor substrate and temporarily holds a charge generated by the photoelectric conversion unit, a first transfer electrode which is arranged at a position above the semiconductor substrate to transfer a charge generated by the photoelectric conversion unit to the charge holding portion, a charge-voltage converter which is arranged in the semiconductor substrate and converts a charge into a voltage, and a second transfer electrode which is arranged at a position above the semiconductor substrate to transfer a charge held by the charge holding portion to the charge-voltage converter, and the first transfer electrode is arranged to cover the charge holding portion, and not to overlap the second transfer electrode when viewed from a direction perpendicular to the upper surface of the semiconductor substrate.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: April 23, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventor: Masatsugu Itahashi
  • Patent number: 8410532
    Abstract: The present invention provides a solid-state imaging device comprising: a semiconductor substrate having a pixel region and a peripheral circuit region; a multilayer wiring layer including layers of wiring and an interlayer film interposed therebetween, and disposed above the semiconductor substrate to cover the pixel region and the peripheral circuit region except areas above the photoelectric conversion elements; a waveguide member filling the areas above the photoelectric conversion elements (waveguides) and covering the multilayer wiring layer at least within the pixel region; and an optical structure (composed of a color filter material and a lens material) disposed above the waveguide member within the pixel region, wherein a groove is formed by removing a portion of the waveguide member from an area within the pixel region that is in a border between the pixel region and the peripheral circuit region.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: April 2, 2013
    Assignee: Panasonic Corporaiton
    Inventors: Shoichiro Tsuji, Kazuhiro Yamashita
  • Patent number: 8389322
    Abstract: A theme is to prevent the generation of noise due to damage in a photodetecting portion in a mounting process in a photodiode array, a method of manufacturing the same, and a radiation detector. In a photodiode array, wherein a plurality of photodiodes (4) are formed in array form on a surface at a side of an n-type silicon substrate (3) onto which light to be detected is made incident and penetrating wirings (8), which pass through from the incidence surface side to the back surface side, are formed for the photodiodes (4), the photodiode array (1) is arranged with a transparent resin film (6), which covers the formed regions of the photodiodes (4) and transmits the light to be detected, provided at the incidence surface side.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: March 5, 2013
    Assignee: Hamamatsu Photonics K.K.
    Inventor: Katsumi Shibayama
  • Patent number: 8378339
    Abstract: A photoelectric conversion device comprising a transparent electrically conductive film, a photoelectric conversion film and an electrically conductive film in this order, wherein the photoelectric conversion film comprises a photoelectric conversion layer, and an electron blocking layer, wherein the electron blocking layer contains a compound represented by the specific formula.
    Type: Grant
    Filed: September 8, 2010
    Date of Patent: February 19, 2013
    Assignee: FUJIFILM Corporation
    Inventors: Kimiatsu Nomura, Eiji Fukuzaki, Tetsuro Mitsui
  • Patent number: 8378401
    Abstract: A solid state imaging apparatus includes: a plurality of photoelectric conversion cells each including a plurality of photoelectric sections arranged in an array of at least two rows and two columns; a plurality of floating diffusion sections each being connected to each of ones of the photoelectric sections which are included in the same row of each said photoelectric conversion cell via each of a plurality of transfer transistors, and being shared by said ones of the photoelectric sections; a plurality of read-out lines each being selectively connected to at least two of the transfer transistors; and a plurality of pixel amplifier transistors each detecting and outputting the potential of each said the floating diffusion section. Charges of the photoelectric conversion sections each being connected to one of the read-out lines and being read out by the transfer transistors are read out by different floating diffusion sections.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: February 19, 2013
    Assignee: Panasonic Corporation
    Inventors: Mitsuyoshi Mori, Takumi Yamaguchi, Takahiko Murata
  • Patent number: 8362527
    Abstract: Provision of a solid-state imaging device of a planarized structure with reduced dark currents, allowing for high sensitivities over a wide wavelength band ranging from visible wavelengths to near-infrared wavelengths, and a fabrication method of the same.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: January 29, 2013
    Assignee: Rohm Co., Ltd.
    Inventors: Osamu Matsushima, Kenichi Miyazaki
  • Patent number: 8361818
    Abstract: A method of forming an optical sensor includes the following steps. A substrate is provided, and a read-out device is formed on the substrate. a first electrode electrically connected to the read-out device is formed on the substrate. a photosensitive silicon-rich dielectric layer is formed on the first electrode, wherein the photosensitive silicon-rich dielectric layer comprises a plurality of nanocrystalline silicon crystals. A second electrode is formed on the photosensitive silicon-rich dielectric layer.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: January 29, 2013
    Assignee: AU Optronics Corp.
    Inventors: An-Thung Cho, Chia-Tien Peng, Kun-Chih Lin
  • Publication number: 20120319225
    Abstract: Embodiments of the present invention relate to photovoltaic cells. Specifically, the present invention relates to photovoltaic (PV) cells configurable for energy conversion and imaging. In a typical embodiment, each photovoltaic cell (PV) in the photovoltaic array is divided into a pixel-based array. Each photovoltaic cell is coupled to a set of switches and the photovoltaic cell is dynamically configured for energy conversion or imaging based on the settings of at least one of the switches.
    Type: Application
    Filed: June 14, 2011
    Publication date: December 20, 2012
    Inventor: Moon J. Kim
  • Patent number: 8324556
    Abstract: A radiation detector of this invention has an insulating, non-amine barrier layer disposed between exposed surfaces of a radiation sensitive semiconductor layer, a carrier selective high resistance film and a common electrode, and a curable synthetic resin film. This barrier layer can further inhibit a chemical reaction between the semiconductor layer and curable synthetic resin film, and can prevent an increase in dark current which flows through the semiconductor layer. Since no chemical reaction occurs between the barrier layer and semiconductor layer, the semiconductor layer will never be degraded. Further, with an auxiliary plate disposed on an upper surface of the curable synthetic resin film, it is possible to manufacture a radiation detector free from warpage and cracking due to temperature change.
    Type: Grant
    Filed: April 7, 2009
    Date of Patent: December 4, 2012
    Assignee: Shimadzu Corporation
    Inventor: Kenji Sato
  • Patent number: 8319237
    Abstract: An integrated optical receiver architecture may be used to couple light between a multi-mode fiber (MMF) and silicon chip which includes integration of a silicon de-multiplexer and a high-speed Ge photo-detector. The proposed architecture may be used for both parallel and wavelength division multiplexing (WDM) based optical links with a data rate of 25 Gb/s and beyond.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: November 27, 2012
    Assignee: Intel Corporation
    Inventor: Ansheng Liu
  • Patent number: 8314498
    Abstract: An integrated circuit for use, for example, in a backside illuminated imager device includes circuitry provided on a first side of a substrate, a first conductive pad connected to the circuitry and spaced from the first side of the substrate, a second conductive pad spaced from a second side of the substrate, an electrically conductive interconnect formed through the substrate to interconnect the first and second conductive pads, and a dielectric surrounding the second conductive pad and at least a portion of the interconnect. Methods of forming the integrated circuit are also described.
    Type: Grant
    Filed: September 10, 2010
    Date of Patent: November 20, 2012
    Assignee: Aptina Imaging Corporation
    Inventors: Kevin Hutto, Ross Dando, Swarnal Borthakur, Richard Mauritzson
  • Patent number: 8314469
    Abstract: An image sensor structure and a method for making the image sensor structure, for avoiding or mitigating lens shading effect. The image sensor structure includes a substrate, a sensor array disposed at the surface of the substrate, a dielectric layer covering the sensor array, wherein the dielectric layer includes a top surface having a dishing structure, an under layer filled into the dishing structure and having a refraction index greater than that of the dielectric layer, a filter array disposed on the under layer corresponding to the sensor array, and a microlens array disposed above the filter array. A top layer may be additionally disposed to cover the filter array and the microlens array is disposed on the top layer.
    Type: Grant
    Filed: September 4, 2009
    Date of Patent: November 20, 2012
    Assignee: United Microelectronics Corp.
    Inventor: Cheng-Hung Yu
  • Patent number: 8288780
    Abstract: An organic light emitting display device. The organic light emitting display device includes a substrate having a pixel region in which pixels are formed and a non-pixel region in which a light sensor is formed, an insulating film formed on the substrate, a first electrode formed on the insulating film and formed of a reflective material reflecting light, the first electrode being formed on the entire surface of the insulating film except for a region between the pixels and a region over the light sensor, a pixel defining film exposing a region of the first electrode and formed on the insulating film, an organic light emitting layer formed on the exposed region of the first electrode, and a second electrode formed on the organic light emitting layer. The first electrode is formed to have a greater area than that of the organic light emitting layer.
    Type: Grant
    Filed: October 28, 2009
    Date of Patent: October 16, 2012
    Assignee: Samsung Display Co., Ltd.
    Inventors: Nam-Choul Yang, Byoung-Deog Choi, Ki-Ju Im, Do-Youb Kim
  • Patent number: 8283745
    Abstract: Provided is a method of fabricating a backside illuminated image sensor that includes providing a device substrate having a frontside and a backside, where pixels are formed at the frontside and an interconnect structure is formed over pixels, forming a re-distribution layer (RDL) over the interconnect structure, bonding a first glass substrate to the RDL, thinning and processing the device substrate from the backside, bonding a second glass substrate to the backside, removing the first glass substrate, and reusing the first glass substrate for fabricating another backside-illuminated image sensor.
    Type: Grant
    Filed: November 6, 2009
    Date of Patent: October 9, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Chieh Huang, Dun-Nian Yaung, Chih-Jen Wu, Chen-Ming Huang
  • Patent number: 8278132
    Abstract: The present invention provides an image sensor and a fabricating method thereof capable of approaching higher quantum efficiency and reducing cost. The method comprises: providing a substrate; forming a pixel region on a top surface of the substrate; forming an interlayer insulating layer and at least a metal line on the pixel region; forming an isolation carrier layer having a hole array therein on the interlayer insulating layer; grinding a lower surface of the substrate to reduce the thickness of the substrate; placing a plurality of conductors into the hole array to form a plurality of bumps on the isolation carrier layer.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: October 2, 2012
    Assignee: Himax Imaging, Inc.
    Inventors: Chih-Min Liu, Fang-Ming Huang, Ping-Hung Yin, Kuo-Chan Huang, Chung-Wei Chang
  • Patent number: 8274033
    Abstract: Disclosed is a photoelectric converter. According to the present invention, a photoelectric converter comprises a plurality of substrates, which are located adjacent to each other and on which a plurality of photoelectric conversion devices are two-dimensionally arranged, either scan circuits or detection circuits, at least, that are arranged on two opposing sides of the photoelectric converter, whereby scanning directions either from the scan circuits or from the detection circuits, which are arranged on the two opposing sides, are capable of being set so as to be performed in like directions.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: September 25, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Isao Kobayashi, Noriyuki Kaifu, Shinichi Takeda, Kazuaki Tashiro, Tadao Endo, Toshio Kameshima
  • Patent number: 8274127
    Abstract: A photodiode array includes a substrate of a common read-out control circuit; and a plurality of photodiodes arrayed on the substrate and each including an absorption layer, and a pair of a first conductive-side electrode and a second conductive-side electrode. In this photodiode array, each of the photodiodes is isolated from adjacent photodiodes, the first conductive-side electrodes are provided on first conductivity-type regions and electrically connected in common across all the photodiodes, and the second conductive-side electrodes are provided on second conductivity-type regions and individually electrically connected to read-out electrodes of the read-out control circuit.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: September 25, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Youichi Nagai, Yasuhiro Iguchi
  • Patent number: 8258595
    Abstract: Provided are an image sensor and a method for manufacturing the same. The image sensor comprises a substrate, a bonding silicon, an interlayer dielectric, a first contact plug, a second contact plug, a second metal interconnection, and a color filter layer and a microlens. The substrate comprises a first metal interconnection. The bonding silicon is formed on the substrate, and comprises a plurality of impurity regions. The interlayer dielectric is formed on the bonding silicon. The first contact plug penetrates the bonding silicon and is electrically connected to the first metal interconnection. The second contact plug penetrates the interlayer dielectric and is connected to a surface of the bonding silicon. The second metal interconnection is formed on the interlayer dielectric, and is connected to the second contact plug. The color filter layer and a microlens are formed over the second metal interconnection.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: September 4, 2012
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Seoung Hyun Kim
  • Patent number: 8253178
    Abstract: An example complementary metal oxide semiconductor (CMOS) image sensor includes an epitaxial layer, an array of pixels, and a trench capacitor. The array of pixels are formed on a front side of the epitaxial layer in an pixel array area of the image sensor. The array of pixels includes one or more shallow trench isolation structures disposed between adjacent pixels for isolating the pixels in the pixel array area. The trench capacitor is formed on the front side of the epitaxial layer in a peripheral circuitry area of the image sensor.
    Type: Grant
    Filed: August 2, 2011
    Date of Patent: August 28, 2012
    Assignee: OmniVision Technologies, Inc.
    Inventors: Rongsheng Yang, Zhiqiang Lin
  • Patent number: 8242546
    Abstract: A pixel and a pixel array of an image sensor device of the present invention have small pixel sizes by resetting sensed charge using a diode built vertically above a substrate. The pixel and the pixel array also have low noise performance by using a JFET as a source follower transistor for sensing charge. The pixel includes a floating diffusion node configured to sense photo-generated charge, a reset diode configured to reset the floating diffusion node in response to a reset signal, and a junction field effect transistor configured to output a signal having an output voltage level corresponding to a charge level of the floating diffusion node.
    Type: Grant
    Filed: May 14, 2008
    Date of Patent: August 14, 2012
    Assignee: Intellectual Ventures II LLC
    Inventor: Jaroslav Hynecek
  • Patent number: 8237237
    Abstract: A solid-state imaging device includes a light-receiving portion, which serves as a pixel, and a waveguide, which is disposed at a location in accordance with the light-receiving portion and which includes a clad layer and a core layer embedded having a refractive index distribution in the wave-guiding direction.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: August 7, 2012
    Assignee: Sony Corporation
    Inventors: Hiromi Wano, Takamasa Tanikuni, Shinichi Yoshida
  • Patent number: 8232616
    Abstract: A solid state imaging device includes an array of pixels, each of the pixels includes: a pixel electrode; an organic layer; a counter electrode; a sealing layer; a color filter; and a readout circuit as defined herein, the photoelectric layer contains an organic p type semiconductor and an organic n type semiconductor, an ionization potential of the charge blocking layer and an electron affinity of the organic n type semiconductor in the photoelectric layer have a difference of at least 1 eV, and the solid-state imaging device further includes a transparent partition wall between adjacent color filters of adjacent pixels of the array of pixels, the partition wall being made from a transparent material having a lower refractive index than a material forming the color filters.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: July 31, 2012
    Assignee: Fujifilm Corporation
    Inventors: Yoshiki Maehara, Takashi Goto, Hideyuki Suzuki, Daigo Sawaki
  • Patent number: 8222709
    Abstract: A solid-state imaging device includes a pixel array area in which an unit pixel including a photoelectric conversion element converting optical signals to signal charges and a transfer gate transferring the signal charges which have been photoelectrically converted in the photoelectric conversion element is two-dimensionally arranged in a matrix form, a supply voltage control means for supplying plural first control voltages sequentially to a control electrode of the transfer gate, and a driving means for performing driving of reading out signal charges transferred by the transfer gate when the plural first control voltages are sequentially applied twice and more.
    Type: Grant
    Filed: October 23, 2006
    Date of Patent: July 17, 2012
    Assignee: Sony Corporation
    Inventors: Yusuke Oike, Atsushi Toda
  • Patent number: 8207589
    Abstract: A photoelectric conversion device includes: a first substrate of which end portions are cut off so as to slope or with a groove shape; a photodiode and an amplifier circuit over the first substrate; a first electrode electrically connected to the photodiode and provided over one end portion of the first substrate; a second electrode electrically connected to the amplifier circuit and provided over an another end portion of the first substrate; and a second substrate having third and fourth electrodes thereon. The first and second electrodes are attached to the third and fourth electrodes, respectively, with a conductive material provided not only at the surfaces of the first, second, third, and fourth electrodes facing each other but also at the side surfaces of the first and second electrodes to increase the adhesiveness between a photoelectric conversion device and a member on which the photoelectric conversion device is mounted.
    Type: Grant
    Filed: February 12, 2008
    Date of Patent: June 26, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Naoto Kusumoto, Kazuo Nishi, Yuusuke Sugawara
  • Patent number: 8207590
    Abstract: A method of fabricating a CMOS image sensor includes forming a substrate structure that includes a first substrate, a second substrate, and an index matching layer containing nitrogen and an oxide layer between the first and second substrates, and, forming at least one light-sensing device in the second substrate, and after forming the substrate structure, forming a metal interconnection structure on a first surface of the second substrate, the first surface facing away from the first substrate, such that the at least one light sensing device is between the metal interconnection structure and the index matching layer and the oxide layer, the metal interconnection structure being electrically connected to the at least one light-sensing device.
    Type: Grant
    Filed: June 29, 2009
    Date of Patent: June 26, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-Jun Park, Sang-Hee Kim
  • Patent number: 8203171
    Abstract: A graphene-based memristor includes a first electrode, a defective graphene layer adjacent the first electrode, a memristive material that includes a number of ions adjacent the defective graphene layer, a second electrode adjacent the memristive material, and a voltage source that generates an electric field between the first and the second electrodes. Under the influence of the electric field, ions in the memristive material form an ion conducting channel between the second electrode and the defective graphene layer.
    Type: Grant
    Filed: April 5, 2010
    Date of Patent: June 19, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Joshua Yang, Feng Miao, Wei Wu, Shih-Yuan Wang, R. Stanley Williams
  • Patent number: 8193601
    Abstract: A method of forming a sensor array. The method includes depositing a source/drain contact layer; depositing a semiconductor layer on the source/drain contact layer; and patterning the source/drain contact layer and the semiconductor layer substantially simultaneously, wherein the patterned semiconductor layer forms part of a sensor of the sensor array.
    Type: Grant
    Filed: January 22, 2010
    Date of Patent: June 5, 2012
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Sanjiv Sambandan, William S. Wong, Rene A. Lujan, Scott J. Limb
  • Patent number: 8183650
    Abstract: A micro electromechanical system (MEMS) spring element is disposed on a substrate, and includes a fixing portion and a moveable portion. The fixing portion is fixed on the substrate, and includes an insulating layer, a plurality of metal-fixing layers and a plurality of supporting-fixing layers. The insulating layer is disposed on the substrate. The metal-fixing layers are disposed above the insulating layer. The supporting-fixing layers are connected between the metal-fixing layers. The moveable portion has a first end and a second end. The first end is connected with the fixing portion, and the second end is suspended above the substrate. The moveable portion includes a plurality of metal layers and at least a supporting layer. The supporting layer is connected between the adjacent metal layers, and a hollow region is formed between the supporting layer and the adjacent metal layers.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: May 22, 2012
    Assignee: PixArt Imaging Inc.
    Inventors: Chuan-Wei Wang, Sheng-Ta Lee, Hsin-Hui Hsu
  • Patent number: 8173480
    Abstract: An image sensor and a method of manufacturing an image sensor. A method of manufacturing an image sensor may include forming an interconnection and/or an interlayer dielectric over a semiconductor substrate including circuitry connected to an interconnection. A method of manufacturing an image sensor may include forming a photodiode having a first doping layer and/or a second doping layer over an interlayer dielectric, and forming a via hole through a photodiode, which may expose a portion of a surface of an interconnection. A method of manufacturing an image sensor may include forming a barrier pattern over a via hole which may cover an exposed surface of a second doping layer, and a contact plug on and/or over a via hole, which may connect an interconnection and a first doping layer. An upper portion of a contact plug may be etched. An insulating layer may be formed over a contact plug.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: May 8, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventors: Ki-Jun Yun, Sang-Wook Ryu
  • Patent number: 8168932
    Abstract: A semiconductor image sensor module and a method for manufacturing thereof as well as a camera and a method for manufacturing thereof are provided in which a semiconductor image sensor chip and an image signal processing chip are connected with a minimum parasitic resistance and parasitic capacity and efficient heat dissipation of the image signal processing chip and shielding of light are simultaneously obtained.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: May 1, 2012
    Assignee: Sony Corporation
    Inventors: Ikuo Yoshihara, Masamitsu Yamanaka
  • Patent number: 8154097
    Abstract: An image sensor and a method of manufacturing the same are provided. The image sensor includes a substrate having a sensor array area and a peripheral circuit area a first insulating film structure formed on the peripheral circuit area and including a plurality of first multi-layer wiring lines and a second insulating film structure formed on the sensor array area and including a plurality of second multi-layer wiring lines. The uppermost-layer wiring line of the plurality of first multi-layer wiring lines is higher than that of the uppermost-layer wiring line of the plurality of second multi-layer wiring lines. The first insulating film structure includes an isotropic etch-stop layer, and the second insulating film structure does not include the isotropic etch-stop layer.
    Type: Grant
    Filed: November 7, 2008
    Date of Patent: April 10, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hong-Ki Kim, Duck-Hyung Lee, Hyun-Pil Noh
  • Patent number: 8154100
    Abstract: The present invention is to provide an electromagnetic wave detecting element that can suppress the trapping of charges in a semiconductor layer. Plural lower electrodes, which collect charges generated in the semiconductor layer, are each provided to cover at least a portion in a length direction and the entire region in a width direction of a scan line adjacent thereto, and the lower electrodes are disposed at positions at which the scan lines are provided.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: April 10, 2012
    Assignee: FUJIFILM Corporation
    Inventor: Yoshihiro Okada
  • Patent number: 8144227
    Abstract: The present invention is applied to an image pickup device with a CMOS solid-state image pickup element, in which an analog-to-digital conversion circuit is disposed in a surface on an opposite side from an image pickup surface in a semiconductor chip 2.
    Type: Grant
    Filed: August 17, 2005
    Date of Patent: March 27, 2012
    Assignee: Sony Corporation
    Inventor: Seiji Kobayashi
  • Patent number: 8143587
    Abstract: An intermediate layer is located between a recording photoconductive layer and an electrode, which is either one of a bias electrode and a reference electrode, and which is located on the side at positive electric potential with respect to a charge accumulating section at the time of readout of electric charges of the charge accumulating section. The intermediate layer is an a-Se layer containing, as a specific substance, at least one kind of substance selected from the group consisting of an alkali metal fluoride, an alkaline earth metal fluoride, an alkali metal oxide, an alkaline earth metal oxide, SiOx, and GeOx, where x represents a number satisfying 0.5?x?1.5, in a concentration falling within the range of 0.003 mol % to 0.03 mol %.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: March 27, 2012
    Assignee: Fujifilm Corporation
    Inventor: Shinji Imai
  • Publication number: 20120061786
    Abstract: An integrated circuit for use, for example, in a backside illuminated imager device includes circuitry provided on a first side of a substrate, a first conductive pad connected to the circuitry and spaced from the first side of the substrate, a second conductive pad spaced from a second side of the substrate, an electrically conductive interconnect formed through the substrate to interconnect the first and second conductive pads, and a dielectric surrounding the second conductive pad and at least a portion of the interconnect. Methods of forming the integrated circuit are also described.
    Type: Application
    Filed: September 10, 2010
    Publication date: March 15, 2012
    Inventors: Kevin Hutto, Ross Dando, Swarnal Borthakur, Richard Mauritzson
  • Patent number: 8129810
    Abstract: A vertically-integrated image sensor is proposed with the performance characteristics of single crystal silicon but with the area coverage and cost of arrays fabricated on glass. The image sensor can include a backplane array having readout elements implemented in silicon-on-glass, a frontplane array of photosensitive elements vertically integrated above the backplane, and an interconnect layer disposed between the backplane array and the image sensing array. Since large area silicon-on-glass backplanes are formed by tiling thin single-crystal silicon layers cleaved from a thick silicon wafer side-by-side on large area glass gaps between the tiled silicon backplane would normally result in gaps in the image captured by the array. Therefore, embodiments further propose that the pixel pitch in both horizontal and vertical directions of the frontplane be larger than the pixel pitch of the backplane, with the pixel pitch difference being sufficient that the frontplane bridges the gap between backplane tiles.
    Type: Grant
    Filed: June 19, 2009
    Date of Patent: March 6, 2012
    Assignee: Carestream Health, Inc.
    Inventor: Timothy J. Tredwell
  • Patent number: 8129811
    Abstract: Integrated circuits having complementary metal-oxide semiconductor (CMOS) and photonics circuitry and techniques for three-dimensional integration thereof are provided. In one aspect, a three-dimensional integrated circuit comprises a bottom device layer and a top device layer. The bottom device layer comprises a digital CMOS circuitry layer; and a first bonding oxide layer adjacent to the digital CMOS circuitry layer. The top device layer comprises a substrate; an analog CMOS and photonics circuitry layer formed in a silicon-on-insulator (SOI) layer adjacent to the substrate, the SOI layer having a buried oxide (BOX) with a thickness of greater than or equal to about one micrometer; and a second bonding oxide layer adjacent to a side of the analog CMOS and photonics circuitry layer opposite the substrate. The bottom device layer is bonded to the top device layer by an oxide-to-oxide bond between the first bonding oxide layer and the second bonding oxide layer.
    Type: Grant
    Filed: April 16, 2011
    Date of Patent: March 6, 2012
    Assignee: International Business Machines Corporation
    Inventors: Solomon Assefa, Kuan-Neng Chen, Steven J. Koester, Yuri A. Vlasov
  • Patent number: 8120131
    Abstract: An array of radiation sensors or detectors is integrated within a three-dimensional semiconductor IC. The sensor array is located relatively close to the device layer of a circuit (e.g., a microprocessor) to be protected from the adverse effects of the ionizing radiation particles. As such, the location where the radiation particles intersect the device layer can be calculated with coarse precision (e.g., to within 10 s of microns).
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: February 21, 2012
    Assignee: International Business Machines Corporation
    Inventors: Ethan H. Cannon, Michael J. Hauser, Timothy D. Sullivan
  • Patent number: 8120079
    Abstract: A method of fabricating multi-spectral photo-sensors including photo-diodes incorporating stacked epitaxial superlattices monolithically integrated with CMOS devices on a common semiconductor substrate.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: February 21, 2012
    Assignee: Quantum Semiconductor LLC
    Inventor: Carlos J. R. P. Augusto
  • Patent number: 8110884
    Abstract: A method of packaging imager devices and optics modules is disclosed which includes positioning an imager device and an optics module in each of a plurality of openings in a carrier body, introducing an encapsulant material into each of the openings in the carrier body and cutting the carrier body to singulate the plurality of imager devices and optics modules into individual units, each of which comprise an imager device and an optics module. A device is also disclosed which includes an imager device comprising a plurality of photosensitive elements and an optics module coupled to the imager device, the optics module comprising at least one lens that, when the optics module is coupled to the imager device, is positioned a fixed, non-adjustable distance from the plurality of photosensitive elements.
    Type: Grant
    Filed: December 18, 2007
    Date of Patent: February 7, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Todd Bolken, Scott Willmorth, Bradley Bitz
  • Patent number: 8110886
    Abstract: A semiconductor circuit in a semiconductor body and a wafer bonding method for connecting the semiconductor circuit to another substrate, in which a diode is realized in a laminar structure. The semiconductor circuit is connected to the terminals of the diode by means of feedthroughs that extend through the semiconductor body.
    Type: Grant
    Filed: May 23, 2006
    Date of Patent: February 7, 2012
    Assignee: austriamicrosystems AG
    Inventors: Gerald Meinhardt, Franz Schrank, Verena Vescoli
  • Patent number: 8106431
    Abstract: A solid state imaging apparatus includes: a plurality of photoelectric conversion cells each including a plurality of photoelectric sections arranged in an array of at least two rows and two columns; a plurality of floating diffusion sections each being connected to each of ones of the photoelectric sections which are included in the same row of each said photoelectric conversion cell via each of a plurality of transfer transistors, and being shared by said ones of the photoelectric sections; a plurality of read-out lines each being selectively connected to at least two of the transfer transistors; and a plurality of pixel amplifier transistors each detecting and outputting the potential of each said the floating diffusion section. Charges of the photoelectric conversion sections each being connected to one of the read-out lines and being read out by the transfer transistors are read out by different floating diffusion sections.
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: January 31, 2012
    Assignee: Panasonic Corporation
    Inventors: Mitsuyoshi Mori, Takumi Yamaguchi, Takahiko Murata
  • Patent number: 8080840
    Abstract: Disclosed are an image sensor and a method for manufacturing the same. The image sensor can include a readout circuitry on a first substrate; an interlayer dielectric layer including at least one metal and contact plug electrically connected to the readout circuitry; and an image sensing device formed on a second substrate, bonded to the interlayer dielectric layer, and provided with a first conductive type conduction layer and a second conductive type conduction layer. An uppermost contact plug in the interlayer dielectric layer has a wall structure extending from an uppermost metal in the interlayer dielectric layer. The top surface of the uppermost contact plug makes contact with the image sensing device and is connected to an image sensing device and an uppermost metal of an adjacent pixel.
    Type: Grant
    Filed: September 21, 2009
    Date of Patent: December 20, 2011
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Jong Man Kim
  • Patent number: 8067813
    Abstract: An integrated photosensitive device with a metal-insulator-semiconductor (MIS) photodiode constructed with one or more substantially continuous layers of semiconductor material and with a substantially continuous layer of dielectric material.
    Type: Grant
    Filed: March 16, 2007
    Date of Patent: November 29, 2011
    Assignee: Varian Medical Systems Technologies, Inc.
    Inventor: Michael Dean Wright
  • Patent number: 8044478
    Abstract: Provided is an image sensor. The image sensor can include a readout circuitry on a first substrate. An interlayer dielectric is formed on the first substrate, and comprises a lower line therein. A crystalline semiconductor layer is bonded to the interlayer dielectric. A photodiode can be formed in the crystalline semiconductor layer, and comprises a first impurity region and a second impurity region. A via hole can be formed passing through the crystalline semiconductor layer and the interlayer dielectric to expose the lower line. A plug is formed inside the first via hole to connect with only the lower line and the first impurity region. A device isolation region can be formed in the crystalline semiconductor layer to separate the photodiode according to unit pixel.
    Type: Grant
    Filed: September 5, 2008
    Date of Patent: October 25, 2011
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Joon Hwang
  • Patent number: 8035178
    Abstract: A plurality of pixel portions (12) are formed on a silicon substrate (11). A photoelectric converter portion (10) constituting each of the pixel portions (12) is electrically isolated by an element isolation portion (13) comprising an insulating film formed on the silicon substrate (11). The photoelectric converter portion (10) partitioned by the element isolation portion (13) is so formed that a crystal orientation of the sides in contact with the element isolation portion (13) corresponds to a <00-1> direction. This makes it possible to reduce dark current caused by stress in the vicinity of the interface of the element isolation portion (13) and maintain high sensitivity even if the pixel portions (12) are made smaller in size.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: October 11, 2011
    Assignee: Panasonic Corporation
    Inventors: Mitsuyoshi Mori, Yasuhiro Shimada, Takuma Katayama, Kenji Taniguchi, Masayuki Furuhashi
  • Patent number: 8035144
    Abstract: The invention relates to image sensors produced on a thinned silicon substrate. To limit the optical crosstalk between adjacent filters and, notably filters of different colors, the invention proposes positioning, between the adjacent filters of different colors (FR, FB, FV), a wall (20) of a material tending to reflect the light so that the light arriving obliquely on a determined filter corresponding to a first pixel does not tend to pass toward an adjacent filter or toward a photosensitive zone corresponding to an adjacent pixel but is returned by the wall to the first filter or the photosensitive zone corresponding to the first pixel. The wall is preferably made of a material with a high reflection coefficient such as aluminium and it is sunk depthwise into the thinned semiconductor layer (16), preferably in p+ diffusions formed in the layer if it is of p-type.
    Type: Grant
    Filed: September 19, 2007
    Date of Patent: October 11, 2011
    Assignee: E2V Semiconductors
    Inventor: Pierre Fereyre