Matrix Or Array (e.g., Single Line Arrays) Patents (Class 257/443)
  • Patent number: 11901392
    Abstract: There is provided a semiconductor device in which the inter-wiring capacitance of wiring lines provided in any layout is further reduced. A semiconductor device that includes a first inter-wiring insulating layer that is provided on a substrate and includes a recess on a side opposite to the substrate, a first wiring layer that is provided inside the recess in the first inter-wiring insulating layer, a sealing film that is provided along an uneven shape of the first wiring layer and the first inter-wiring insulating layer, a second inter-wiring insulating layer that is provided on the first inter-wiring insulating layer to cover the recess, and a gap that is provided between the second inter-wiring insulating layer and the first wiring layer and the first inter-wiring insulating layer. The second inter-wiring insulating layer has a planarized surface that is opposed to the recess.
    Type: Grant
    Filed: October 13, 2022
    Date of Patent: February 13, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Masaki Haneda
  • Patent number: 11889218
    Abstract: A solid state image sensor of the present disclosure includes: a first semiconductor substrate provided with at least a pixel array unit in which pixels that perform photoelectric conversion are arranged in a matrix form; and a second semiconductor substrate provided with at least a control circuit unit that drives the pixels. The first semiconductor substrate and the second semiconductor substrate are stacked, with first surfaces on which wiring layers are formed facing each other, the pixel array unit is composed of a plurality of divided array units, the control circuit unit is provided corresponding to each of the plurality of divided array units, and electrical connection is established in each of the divided array units, through an electrode located on each of the first surfaces of the first semiconductor substrate and the second semiconductor substrate, between the pixel array unit and the control circuit unit.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: January 30, 2024
    Assignee: Sony Corporation
    Inventors: Shunichi Sukegawa, Shunji Maeda, Junichi Ishibashi, Motoshige Okada
  • Patent number: 11889213
    Abstract: A sensor chip includes: a pixel array unit that has a rectangular-shaped area in which a plurality of sensor elements are arranged in an array pattern; and a global control circuit, in which driving elements simultaneously driving the sensor elements are arranged in one direction, and each of the driving elements is connected to a control line disposed for each one column of the sensor elements, that is arranged to have a longitudinal direction to be along a long side of the pixel array unit. For example, the present technology can be applied to ToF sensor.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: January 30, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Yohtaro Yasu, Katsuhiko Hanzawa
  • Patent number: 11876144
    Abstract: A photosensitive transistor is disclosed herein that includes: a semiconductor substrate of the first conductivity type as a collector layer; above it a less doped layer of the first conductivity type having regions of different thickness; a semiconductor base layer of the second conductivity type above at least parts of the regions of the less doped layer; and an emitter layer of the first conductivity type above at least parts of the base layer, but not above at least one part of the part of the base layer disposed above the thinner region of the less doped layer.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: January 16, 2024
    Assignee: Vishay Semiconductor GmbH
    Inventor: Manuel Schmidt
  • Patent number: 11870215
    Abstract: An electrical drive circuit may charge one or more inductive elements, where the electrical drive circuit includes the one or more inductive elements and a capacitive element in series between the one or more inductive elements and the optical load, and where the electrical drive circuit is connected to one or more sources. The electrical drive circuit may generate, after the charging and for a first time interval, a main electrical pulse. The electrical drive circuit may discharge, after the charging and for a second time interval, the one or more inductive elements to provide a compensation electrical pulse, where at least a portion of the second time interval overlaps with the first time interval. The electrical drive circuit may combine the main electrical pulse and the compensation electrical pulse into a combined electrical pulse. The electrical drive circuit may provide the combined electrical pulse to the optical load.
    Type: Grant
    Filed: June 25, 2020
    Date of Patent: January 9, 2024
    Assignee: Lumentum Operations LLC
    Inventors: Hao Huang, Mikhail Dolganov, Lijun Zhu
  • Patent number: 11862650
    Abstract: In some embodiments, an image sensor is provided. The image sensor includes a photodetector disposed in a semiconductor substrate. A wave guide filter having a substantially planar upper surface is disposed over the photodetector. The wave guide filter includes a light filter disposed in a light filter grid structure. The light filter includes a first material that is translucent and has a first refractive index. The light filter grid structure includes a second material that is translucent and has a second refractive index less than the first refractive index.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: January 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng Yu Huang, Chun-Hao Chuang, Chien-Hsien Tseng, Kazuaki Hashimoto, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Chien Yu, Ting-Cheng Chang, Wen-Hau Wu, Chih-Kung Chang
  • Patent number: 11812129
    Abstract: A sensor device includes a housing. The housing includes a front plate and a back plate, and a printed circuit board encased by the housing. The printed circuit board includes an image sensor, an image sensor processor, and conducting layers interposed between insulating layers. A conducting layer of the conducting layers includes power planes. One of the power planes is connected to a decoupling capacitor that carries power to the image sensor or the image sensor processor.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: November 7, 2023
    Assignee: Pony Al Inc.
    Inventors: Li Niu, Hanxiao Xie, Bin Han, Zaichang Zhao, Jordan Renovato Bravo
  • Patent number: 11798972
    Abstract: An imaging element according to an embodiment of the present disclosure includes: a first substrate, a second substrate, and a third substrate that are stacked in this order. The first substrate including a sensor pixel that performs photoelectric conversion and the second substrate including a readout circuit are electrically coupled to each other by a first through wiring line provided in an interlayer insulating film. The second substrate and the third substrate including a logic circuit are electrically coupled to each other by a junction between pad electrodes or a second through wiring line penetrating through a semiconductor substrate.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: October 24, 2023
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Keiichi Nakazawa, Yoshiaki Kitano, Hirofumi Yamashita, Minoru Ishida
  • Patent number: 11747195
    Abstract: In a light detection device, a circuit substrate includes a plurality of signal processing units which process a detection signal output from a corresponding pixel. Light-receiving regions of a plurality of avalanche photodiodes are two-dimensionally arranged for every pixel. In each of the signal processing units, a timing measurement unit measures timing at which light is incident on a corresponding pixel, based on the detection signal. An energy measurement unit measures energy of light incident on a corresponding pixel, based on the detection signal. A storage unit stores a measurement result in the timing measurement unit and the energy measurement unit. A light detection region where a plurality of the pixels are provided and a signal processing region where a plurality of the signal processing units are provided overlap each other at least at a part.
    Type: Grant
    Filed: February 15, 2021
    Date of Patent: September 5, 2023
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Tatsuya Hashi, Shinya Iwashina, Takashi Baba, Shigeyuki Nakamura
  • Patent number: 11749697
    Abstract: An image capturing device unit includes a multilayer substrate, an image capturing device mounted on one face of the multilayer substrate, and components mounted on the other face of the multilayer substrate. The multilayer substrate includes electrodes to electrically connect the image capturing device and the multilayer substrate, vias that electrically connect the electrodes and the components, first wiring electrically connected to the vias, second wiring on layers of the multilayer substrate, and a non-wired region that insulates the vias and the first wiring from the second wiring on each of the layers. The vias are located in the multilayer substrate so that, on a projection plane given when the multilayer substrate is viewed in a layering direction of the multilayer substrate, there is no area in which the non-wired region overlaps with a region where the image capturing device is arranged throughout the layers.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: September 5, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Kosuke Matsubara
  • Patent number: 11728437
    Abstract: A semiconductor device includes an oxide semiconductor layer including a crystalline region over an insulating surface, a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and a gate electrode layer over the gate insulating layer in a region overlapping with the crystalline region. The crystalline region includes a crystal whose c-axis is aligned in a direction substantially perpendicular to a surface of the oxide semiconductor layer.
    Type: Grant
    Filed: May 11, 2022
    Date of Patent: August 15, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 11721711
    Abstract: A disclosed photoelectric conversion device includes: a semiconductor layer in which a photoelectric converter is provided; a substrate arranged on one face side of the semiconductor layer; and an interconnection structure arranged between the semiconductor layer and the substrate. The interconnection structure includes a first insulating film made of a first insulating material and a second insulating film provided on the semiconductor layer side of the first insulating film and made of a second insulating material, the first insulating material permeates more hydrogen than the second insulating material, an insulating member made of the first insulating material is located between the first insulating film and the semiconductor layer, and the first insulating film and the insulating member are connected to each other via an opening provided in the second insulating film.
    Type: Grant
    Filed: May 20, 2020
    Date of Patent: August 8, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Takayasu Kanesada, Koji Hara
  • Patent number: 11711595
    Abstract: An imaging apparatus includes a plurality of imaging elements, at least one signal processing circuit, and a transfer path, in which each of the plurality of imaging elements includes a memory that is incorporated in the imaging element and stores image data obtained by imaging a subject, and a communication interface that is incorporated in the imaging element and outputs output image data based on the image data stored in the memory, the transfer path connects the plurality of imaging elements and a single signal processing circuit in series, and the communication interface of each of the plurality of imaging elements outputs the output image data to an imaging element in a rear stage or the signal processing circuit through the transfer path.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: July 25, 2023
    Assignee: FUJIFILM CORPORATION
    Inventors: Ryo Hasegawa, Tomoyuki Kawai, Makoto Kobayashi, Hitoshi Sakurabu, Kazufumi Sugawara
  • Patent number: 11705472
    Abstract: A biosensor is provided. The biosensor includes a substrate, a first photodiode, a second photodiode, an angle-sensitive filter, and an immobilization layer. The first photodiode and the second photodiode are disposed in the substrate and define a first pixel and a second pixel, respectively. The first pixel and the second pixel receive a light. The angle-sensitive filter is disposed on the substrate. The immobilization layer is disposed on the angle-sensitive filter.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: July 18, 2023
    Assignee: VISERA TECHNOLOGIES COMPANY LIMITED
    Inventors: Hsin-Yi Hsieh, Chin-Chuan Hsieh
  • Patent number: 11699716
    Abstract: An imaging device includes a first chip. The first chip includes a first pixel and a second pixel. The first pixel includes a first anode region and a first cathode region, and the second pixel includes a second anode region and a second cathode region. The first chip includes a first wiring layer. The first wiring layer includes a first anode electrode, a first anode via coupled to the first anode electrode and the first anode region, and a second anode via coupled to the first anode electrode and the second anode region.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: July 11, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kenji Kobayashi, Toshifumi Wakano, Yusuke Otake
  • Patent number: 11676983
    Abstract: A sensor includes a first chip, a dam structure and a cover. The first chip includes a substrate, a sensing area and a low-k material layer. The sensing area is located on the surface of the substrate. The low-k material layer is located in the substrate. The dam structure is located on the first chip. The dam structure covers the edge of the low-k material layer. The cover is located on the dam structure and covers the sensing area. A manufacturing method of a sensor is also provided.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: June 13, 2023
    Assignee: Powertech Technology Inc.
    Inventors: Chung-Chang Chang, Chang-Lun Lu, Ming-Hung Lin
  • Patent number: 11670731
    Abstract: Methods, systems, and devices are disclosed for low noise and high efficiency photoelectric amplification based on cycling excitation process (CEP). In some aspects, a device for amplifying signals of light-induced photocurrent includes an anode connected to a positive terminal of a voltage source; a disordered material layer coupled to the anode, wherein the disordered material layer is structured to have a thickness of 100 nm or less; and a cathode coupled to the disordered material layer and connected to a negative terminal of the voltage source, in which the device is operable to amplify photoexcited carriers based on photon absorption to produce an external quantum efficiency of the device that is at least 100%.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: June 6, 2023
    Assignee: The Regents of the Unversity of California
    Inventors: Yu-Hwa Lo, David Hall, Yu-Hsin Liu, Zihan Xu, Lujiang Yan
  • Patent number: 11631709
    Abstract: A solid-state image sensor is provided. The solid-state image sensor includes a plurality of photoelectric conversion elements. The solid-state image sensor also includes a first color filter layer disposed above the photoelectric conversion elements and having a plurality of first color filter segments. The solid-state image sensor further includes a second color filter layer disposed adjacent to the first color filter layer and having a plurality of second color filter segments. The solid-state image sensor includes a first grid structure disposed between the first color filter layer and the second color filter layer. The first grid structure has a first grid height. The solid-state image sensor also includes a second grid structure disposed between the first color filter segments and between the second color filter segments. The second grid structure has a second grid height that is lower than or equal to the first grid height.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: April 18, 2023
    Assignee: VISERA TECHNOLOGIES COMPANY LIMITED
    Inventors: Ching-Hua Li, Yu-Chi Chang, Cheng-Hsuan Lin, Han-Lin Wu
  • Patent number: 11630000
    Abstract: High speed and spectrally selective pyroelectric detectors with plasmonic structure and methods of making and using same are disclosed. According to an aspect, a pyroelectric detector includes an artificial optical absorber or plasmonic absorber comprising an ensemble of subwavelength conductive components forming a plasmonic structure configured to receive light and to generate thermal energy from the received light. Further, the pyroelectric detector includes a pyroelectric material configured to receive the generated thermal energy from the plasmonic structure and to generate an electrical signal representative of the received thermal energy. Further, the pyroelectric detector includes an electronic component configured to receive the electrical signal from the pyroelectric material for detection of the received light.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: April 18, 2023
    Assignee: Duke University
    Inventors: Maiken Mikkelsen, Jon Stewart
  • Patent number: 11624844
    Abstract: In a sensor substrate, a plurality of pixels are formed in a pixel region of a first surface of a flexible base material, and a terminal portion for electrically connecting a cable is provided in the terminal region of the first surface. A conversion layer is provided outside the terminal region of the base material and converts radiation into light. A reinforcing member is provided on a second surface of the base material to reinforce the strength of the base material. A stress neutral plane adjusting member is provided inside the terminal region and in at least a part, corresponding to the inside of the terminal region, of a cable electrically connected to the terminal portion.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: April 11, 2023
    Assignee: FUJIFILM CORPORATION
    Inventors: Shinichi Ushikura, Munetaka Kato, Tatsunori Tanimoto
  • Patent number: 11600645
    Abstract: An imaging device that can obtain imaging data corresponding to high-resolution images in a short period of time is provided. The imaging device includes a pixel including a photoelectric conversion element and n (n is an integer more than 2 inclusive) retention circuits. The photoelectric conversion element and the n retention circuits are stacked. One electrode of the photoelectric conversion element is electrically connected to the first to n-th retention circuits. The retention circuits include OS transistors with an extremely low off-state current feature, and can retain imaging data for a long time. In the first to n-th periods, the imaging device obtains the first to n-th imaging data and retains it in the first to n-th retention circuits. Then, the first to n-th imaging data retained in the first to n-th retention circuits are read out. The read imaging data is output outside the imaging data through AD conversion.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: March 7, 2023
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Seiichi Yoneda, Hidetomo Kobayashi, Takashi Nakagawa, Yusuke Negoro, Shunpei Yamazaki
  • Patent number: 11594651
    Abstract: A photovoltaic cell assembly suitable for use in a dense array concentrated photovoltaic cell module includes a plurality of photovoltaic cells mounted on a substrate and a by-pass diode associated with each cell to allow the cell to be by-passed in the electrical circuit in the event that the cell fails or has low illumination. The diodes are positioned in the shadows of the cells. The diodes provide direct pathways for heat and electricity from the cells to the substrate.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: February 28, 2023
    Assignee: RAYGEN RESOURCES PTY LTD
    Inventor: John Beavis Lasich
  • Patent number: 11553149
    Abstract: A solid-state imaging device includes a plurality of pixels, each of the plurality of pixels including a photoelectric converter. The photoelectric converter includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type provided under the first semiconductor region, and a third semiconductor region of the first conductivity type provided under the second semiconductor region. The second semiconductor region has a first end portion and a second end portion opposing to the first end portion. The third semiconductor region has a first region and a second region overlapping with the second semiconductor region in a plan view, and the first region and the second region are spaced apart from each other from a part of the first end portion to a part of the second end portion.
    Type: Grant
    Filed: August 5, 2020
    Date of Patent: January 10, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Mahito Shinohara
  • Patent number: 11550069
    Abstract: Detector modules, detectors and medical imaging devices are provided. One of the detector modules includes: a support and a plurality of detector sub-modules arranged on the support along an extension direction in which the support extends. Each of the detector sub-modules has a first area and a second area in the extension direction. A detecting device is disposed in the first area, and a functional module is disposed in the second area. The functional module is electrically connected to the detecting device for receiving an electrical signal from the detecting device. The plurality of detector sub-modules includes a first detector sub-module and a second detector sub-module that are arranged adjacent to each other in the extension direction, and the first area of the first detector sub-module at least partially overlaps with the second area of the second detector sub-module.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: January 10, 2023
    Assignee: Shanghai Neusoft Medical Technology Co., Ltd.
    Inventors: Jun Yu, Shuangxue Li, Yiguang Tan
  • Patent number: 11545513
    Abstract: In some embodiments, a method is provided. The method includes forming a plurality of trenches in a semiconductor substrate, where the trenches extend into the semiconductor substrate from a back-side of the semiconductor substrate. An epitaxial layer comprising a dopant is formed on lower surfaces of the trenches, sidewalls of the trenches, and the back-side of the semiconductor substrate, where the dopant has a first doping type. The dopant is driven into the semiconductor substrate to form a first doped region having the first doping type along the epitaxial layer, where the first doped region separates a second doped region having a second doping type opposite the first doping type from the sidewalls of the trenches and from the back-side of the semiconductor substrate. A dielectric layer is formed over the back-side of the semiconductor substrate, where the dielectric layer fill the trenches to form back-side deep trench isolation structures.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: January 3, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hung Cheng, Shyh-Fann Ting, Yen-Ting Chiang, Yeur-Luen Tu, Min-Ying Tsai
  • Patent number: 11538948
    Abstract: The present disclosure is directed to photovoltaic junctions and methods for producing the same. Embodiments of the disclosure may be incorporated in various devices for applications such as solar cells and light detectors and may demonstrate advantages compared to standard materials used for photovoltaic junctions such as silica. An example embodiment of the disclosure includes a photovoltaic junction, the junction including a light absorbing material, an electron acceptor for shuttling electrons, and a metallic contact. In general, embodiments of the disclosure as disclosed herein include photovoltaic junctions which provide absorption across one or more wavelengths in the range from about 200 nm to about 1000 nm, or from near IR (NIR) to ultra-violet (UV). Generally, these embodiments include a multi-layered light absorbing material that can be formed from quantum dots that are successively deposited on the surface of an electron acceptor (e.g., a semiconductor).
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: December 27, 2022
    Assignee: University of South Carolina
    Inventors: Mathew Kelley, Andrew B. Greytak, Mvs Chandrashekhar, Joshua Letton
  • Patent number: 11506800
    Abstract: Detector modules, detectors and medical imaging devices are provided. One of the detector modules includes: a support and a plurality of detector sub-modules arranged on the support along an extension direction in which the support extends. Each of the detector sub-modules has a first area and a second area in the extension direction. A detecting device is disposed in the first area, and a functional module is disposed in the second area. The functional module is electrically connected to the detecting device for receiving an electrical signal from the detecting device. The plurality of detector sub-modules includes a first detector sub-module and a second detector sub-module that are arranged adjacent to each other in the extension direction, and the first area of the first detector sub-module at least partially overlaps with the second area of the second detector sub-module.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: November 22, 2022
    Assignee: Shanghai Neusoft Medical Technology Co., Ltd.
    Inventors: Jun Yu, Shuangxue Li, Yiguang Tan
  • Patent number: 11489000
    Abstract: A method for producing an imager includes the following steps: a. attaching an imaging sensor to a first substrate; b. cutting out the first substrate a predefined distance around the attached imaging sensor; c. attaching a driver circuit board for driving the imaging sensor to the cut-out first substrate, close to the attached imaging sensor; d. connecting the driver circuit board for driving the imaging sensor to the attached imaging sensor in order to obtain a first tile; e. repeating the attaching, cutting-out, attaching, and connecting steps in order to obtain a second tile; f. butting together the obtained first tile and second tile by placing the cut-out first substrates in edge-to-edge contact; g. attaching the butted-together tiles to a main substrate; h. connecting the driver circuit boards of the imaging sensors of the butted-together first tile and second tile to a motherboard of the imager.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: November 1, 2022
    Assignee: TRIXELL
    Inventor: Yannick Janvier
  • Patent number: 11450695
    Abstract: A semiconductor substrate including a first main surface and a second main surface opposing each other is provided. The semiconductor substrate includes a first semiconductor region of a first conductivity type. The semiconductor substrate includes a plurality of planned regions where a plurality of second semiconductor regions of a second conductivity type forming pn junctions with the first semiconductor region are going to be formed, in a side of the second main surface. A textured region is formed on surfaces included in the plurality of planned regions, in the second main surface. The plurality of second semiconductor regions are formed in the plurality of planned regions after forming the textured region. The first main surface is a light incident surface of the semiconductor substrate.
    Type: Grant
    Filed: April 11, 2019
    Date of Patent: September 20, 2022
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Tomoya Taguchi, Yuki Yoshida, Katsumi Shibayama
  • Patent number: 11437323
    Abstract: A silicon interposer may include an on-chip DC blocking capacitor, comprising: a first electrical connection to couple to a supply voltage and to cathodes of a plurality of photodiodes formed in a two-dimensional photodiode array on a first substrate, and a second electrical connection to couple to ground and to ground inputs of a plurality of transimpedance amplifiers on a second substrate; wherein the on-chip DC blocking capacitor is configured to be shared among a plurality of receiver circuits comprising the plurality of photodiodes and the plurality of transimpedance amplifiers; and wherein the silicon interposer comprises a substrate separate from the first substrate and the second substrate.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: September 6, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Binhao Wang, Wayne Victor Sorin, Michael Renne Ty Tan
  • Patent number: 11425365
    Abstract: A photoelectric conversion device comprising: a first substrate that includes a pixel circuit including a photoelectric conversion element; a second substrate having a signal processing circuit that drives the pixel circuit or processes a signal from the pixel circuit; a connection part electrically connecting the first substrate and the second substrate; and an inspection circuit, wherein the inspection circuit is formed in one of the first and second substrates and is connected to a wire supplying a first potential and being provided in the one of the first and second substrates, and the inspection circuit is connected via the connection part to a wire supplying a second potential and being provided in the other of the first and second substrates.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: August 23, 2022
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ryunosuke Ishii, Akira Oseto, Tatsunori Kato, Takanori Watanabe, Nobuaki Kakinuma, Hiroaki Kobayashi, Katsuhito Sakurai
  • Patent number: 11411032
    Abstract: An imaging device comprises a sensor substrate including a pixel array that includes at least a first pixel. The first pixel includes an avalanche photodiode including a light receiving region, a cathode, and an anode. The first pixel includes a wiring layer electrically connected to the cathode and arranged in the sensor substrate such that the wiring layer is in a path of incident light that exits the light receiving region.
    Type: Grant
    Filed: May 1, 2020
    Date of Patent: August 9, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Akira Tanaka, Yusuke Otake, Toshifumi Wakano
  • Patent number: 11411029
    Abstract: An image sensing chip package structure includes a chip, an adhesive loop and a light-transmissible substrate member. The chip includes an image sensing region. The adhesive loop is connected to the chip, and has an inner peripheral surface that defines a plurality of protrusions which surround the image sensing region of the chip. The light-transmissible substrate member is connected to the adhesive loop oppositely of the chip to cover the image sensing region of the chip. Methods of manufacturing the image sensing chip package structures are also provided.
    Type: Grant
    Filed: June 4, 2020
    Date of Patent: August 9, 2022
    Assignee: TONG HSING ELECTRONIC INDUSTRIES, LTD.
    Inventor: Chia-Shuai Chang
  • Patent number: 11398516
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a first through substrate via (TSV) disposed within a semiconductor substrate. The semiconductor substrate has a front-side surface and a back-side surface respectively on opposite sides of the semiconductor substrate. The semiconductor substrate comprises a first doped channel region extending from the front-side surface to the back-side surface. The first TSV is defined at least by the first doped channel region. A conductive contact overlies the back-side surface of the semiconductor substrate and comprises a first conductive layer overlying the first TSV. The first conductive layer comprises a conductive material. An upper conductive layer underlies the conductive contact. An upper surface of the upper conductive layer is aligned with the back-side surface of the semiconductor substrate. The upper conductive layer comprises a silicide of the conductive material.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: July 26, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Ying Tsai, Cheng-Ta Wu, Yeur-Luen Tu
  • Patent number: 11362125
    Abstract: A stacked image sensor includes a first semiconductor die and a second semiconductor die. The first semiconductor die includes a pixel array of rows and columns of pixels, a first column interlayer-connection unit extending in the row direction and disposed adjacent the top or bottom of the pixel array and column routing wires extending in a diagonal direction and connecting the pixel columns and the first column interlayer-connection unit. The second semiconductor die is stacked with the first semiconductor die. The second semiconductor die includes a second column interlayer-connection unit extending in the row direction and disposed at a location corresponding to the first column interlayer-connection unit and connected to the first column interlayer-connection unit, and a column control circuit connected to the second column interlayer-connection unit.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: June 14, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hiroyuki Sugihara
  • Patent number: 11348958
    Abstract: The present disclosure provides an optical structure, including a substrate, a light detection region in the substrate, an isolation structure in the substrate, surrounding the light detection region, a color filter layer over the substrate, and a dielectric grid structure in the color filter layer, the dielectric grid structure overlapping with the light detection region.
    Type: Grant
    Filed: May 16, 2019
    Date of Patent: May 31, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yun-Hao Chen, Kuo-Yu Wu, Tse-Hua Lu
  • Patent number: 11342373
    Abstract: A method for manufacturing an image sensing device includes forming an interconnection layer over a front surface of a semiconductor substrate. A trench is formed to extend from a back surface of the semiconductor substrate. An etch stop layer is formed along the trench. A buffer layer is formed over the etch stop layer. An etch process is performed for etching the buffer layer. The buffer layer and the etch stop layer include different materials.
    Type: Grant
    Filed: April 8, 2020
    Date of Patent: May 24, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Chuang Wu, Ming-Tsong Wang, Feng-Chi Hung, Ching-Chun Wang, Jen-Cheng Liu, Dun-Nian Yaung
  • Patent number: 11276722
    Abstract: A method of manufacturing a solid-state image sensor, includes forming a first isolation region of a first conductivity type in a semiconductor layer having first and second surfaces, the forming the first isolation region including first implantation for implanting ions into the semiconductor layer through the first surface, forming charge accumulation regions of a second conductivity type in the semiconductor layer, performing first annealing, forming an interconnection on a side of the first surface of the semiconductor layer after the first annealing, and forming a second isolation region of the first conductivity type in the semiconductor layer, the forming the second isolation region including second implantation for implanting ions into the semiconductor layer through the second surface. The first and second isolation regions are arranged between the adjacent charge accumulation regions.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: March 15, 2022
    Assignee: Canon Kabushiki Kaisha
    Inventor: Mineo Shimotsusa
  • Patent number: 11255983
    Abstract: The semiconductor device comprises a substrate of semiconductor material having a main surface, an integrated circuit in the substrate, a photodetector element or array of photodetector elements arranged at or above the main surface, and at least one nanomaterial film arranged above the main surface. At least part of the nanomaterial film has a scintillating property. The method of production includes the use of a solvent to apply the nanomaterial film, in particular by inject printing, by silk-screen printing, by spin coating or by spray coating.
    Type: Grant
    Filed: April 19, 2018
    Date of Patent: February 22, 2022
    Assignee: AMS INTERNATIONAL AG
    Inventors: Jens Hofrichter, Guy Meynants, Josef Pertl, Thomas Troxler
  • Patent number: 11251220
    Abstract: A monolithic multi-metallic thermal expansion stabilizer (MTES) has a coefficient of thermal expansion (CTE) differential between a first surface and a second surface, and a transition region extending between for mitigating the CTE differential.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: February 15, 2022
    Assignee: Raytheon Company
    Inventor: Detlef Kramer
  • Patent number: 11226237
    Abstract: A temperature sensor module with an integrated lid structure for spurious IR-cancellation is disclosed. An improved temperature sensor module that allows detection of a maximum of the relevant IR-radiation from an object's surface of interest as well as generation of additional information about parasitic or spurious IR-radiation that distort the relevant thermal signal in order to enable a cancellation of interfering thermal signal portions is presented. The temperature sensor module includes a temperature sensing element, a sensor-interface control integrated circuit, whereas the temperature sensing element is coupled to the sensor-interface control IC, and a lid structure and a sensor packaging both defining a field of view of the temperature sensor module, wherein the lid structure is formed by a substrate comprising a second integrated temperature sensor connected to the sensor-interface control IC or an external connected processing unit.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: January 18, 2022
    Assignee: Integrated Device Technology, Inc.
    Inventors: Raik Richter, Marko Mailand
  • Patent number: 11217705
    Abstract: A semiconductor element capable of adjusting a barrier height ?Bn and performing zero-bias operation and impedance matching with an antenna for improving detection sensitivity of high-frequency RF electric signals, a method of manufacturing the same, and a semiconductor device having the same. In the semiconductor element, a concentration of InGaAs (n-type InGaAs layer) is intentionally set to be high over a range for preventing the “change of the barrier height caused by the bias” described above up to a deep degeneration range. An electron Fermi level (EF) increases from a band edge of InGaAs (n-type InGaAs layer) to a band edge of InP (InP depletion layer).
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: January 4, 2022
    Assignee: NTT ELECTRONICS CORPORATION
    Inventors: Makoto Shimizu, Hiroki Itoh, Tadao Ishibashi, Isamu Kotaka
  • Patent number: 11209363
    Abstract: An integrated circuit includes a photodetection region configured to receive incident photons. The photodetection region is configured to produce a plurality of charge carriers in response to the incident photons. The integrated circuit also includes at least one charge carrier storage region. The integrated circuit also includes a charge carrier segregation structure configured to selectively direct charge carriers of the plurality of charge carriers into the at least one charge carrier storage region based upon times at which the charge carriers are produced.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: December 28, 2021
    Assignee: Quantum-Si Incorporated
    Inventors: Jonathan M. Rothberg, Keith G. Fife, David M. Boisvert
  • Patent number: 11195870
    Abstract: A first conductive portion includes a first pad surrounded by a first insulator film in a plane perpendicular to a first direction, and a first via connected to the first pad so that the first via is positioned between the first pad and a first semiconductor layer in the first direction. A second conductive portion includes a second pad surrounded by a second insulator film in a plane perpendicular to the first direction, and a second via connected to the second pad so that the second via is positioned between the second pad and a second semiconductor layer in the first direction. The first and the second conductive portions are different in dimension.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: December 7, 2021
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tsutomu Tange, Takumi Ogino, Hiroaki Kobayashi
  • Patent number: 11183527
    Abstract: The inventive concepts provide a three-dimensional (3D) image sensor, based on structured light (SL), having a structure in which difficulty in a manufacturing process of a wiring layer is decreased and/or an area of a bottom pad of a capacitor is increased. The 3D image sensor includes: a pixel area including a photodiode in a semiconductor substrate and a gate group including a plurality of gates; a multiple wiring layer on an upper portion of the pixel area, the multiple wiring layer including at least two wiring layers; and a capacitor structure between a first wiring layer on a lowermost wiring layer of the multiple wiring layer and a second wiring layer on the first wiring layer, the capacitor structure including a bottom pad, a top pad, and a plurality of capacitors, wherein the bottom pad is connected to the first wiring layer.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: November 23, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gang Zhang, Shi Li Quan, Hyung-yong Kim, Seug-gab Park, In-gyu Baek, Kyung-rae Byun, Jin-yong Choi
  • Patent number: 11171263
    Abstract: The present disclosure provides a quantum dot and a manufacturing method for the same, and a luminescent material, a light-emitting element and a display device applying the quantum dot. The quantum dot includes a nano-crystal and a ligand. The nano-crystal is at least one selected from the group consisting of a XII-XV group compound semiconductor nano-crystal, a XII-XVI group compound semiconductor nano-crystal, a XIII-XV group compound semiconductor nano-crystal and a XIII-XVI group compound semiconductor nano-crystal. The ligand is disposed on a surface of the nano-crystal. The ligand contains 15%-70% of a fatty acid compound, 1%-35% of a phosphine compound, >0%-55% of a thiol compound, and 0%-10% of another ligand substance.
    Type: Grant
    Filed: November 12, 2019
    Date of Patent: November 9, 2021
    Assignee: CHIMEI CORPORATION
    Inventor: Keng-Chu Lin
  • Patent number: 11164902
    Abstract: A device including a semiconductive substrate having opposite first and second surfaces, a light-sensitive element in the semiconductive substrate, an isolation structure extending at least from the second surface of the semiconductive substrate to within the semiconductive substrate, and a color filter over the second surface of the semiconductive substrate. The isolation structure includes a dielectric fill and a first high-k dielectric layer wrapping around the dielectric fill.
    Type: Grant
    Filed: July 11, 2020
    Date of Patent: November 2, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yun-Wei Cheng, Chun-Wei Chia, Chun-Hao Chou, Kuo-Cheng Lee, Hsun-Ying Huang
  • Patent number: 11127771
    Abstract: Solid-state imaging devices, methods of producing a solid-state imaging device, and electronic apparatuses are provided. More particularly, a solid-state image device includes a silicon substrate, and at least a first photodiode formed in the silicon substrate. The device also includes an epitaxial layer with a first surface adjacent a surface of the silicon substrate, and a transfer transistor with a gate electrode that extends from the at least a first photodiode to a second surface of the epitaxial layer opposite the first surface. In further embodiments, a solid-state imaging device with a plurality of pixels formed in a second semiconductor substrate wherein the pixels are symmetrical with respect to a center point is provided. A floating diffusion is formed in an epitaxial layer, and a plurality of transfer gate electrodes that are each electrically connected to the floating diffusion by one of the transfer gate electrodes is provided.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: September 21, 2021
    Assignee: SONY CORPORATION
    Inventors: Yusuke Tanaka, Toshifumi Wakano, Keiji Tatani, Takashi Nagano, Hayato Iwamoto, Keiichi Nakazawa, Tomoyuki Hirano, Shinpei Yamaguchi, Shunsuke Maruyama
  • Patent number: 11114424
    Abstract: The present disclosure provides a display substrate, a method for preparing the same, and a display device. The display substrate includes: a base substrate; a display function layer located on the base substrate, a first groove arranged in the first surface, and a first connection sub-line located in the first groove and covering a bottom and each side wall of the first groove, the first connection sub-line being connected to a signal input terminal; an integrated circuit located on a second surface, a second groove arranged in the second surface, and a second connection sub-line located in the second groove, the second connection sub-line being connected to the first connection sub-line and a signal output terminal of the integrated circuit.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: September 7, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Dongni Liu, Minghua Xuan
  • Patent number: 11094725
    Abstract: Solid-state imaging devices, methods of producing a solid-state imaging device, and electronic apparatuses are provided. More particularly, a solid-state image device includes a silicon substrate, and at least a first photodiode formed in the silicon substrate. The device also includes an epitaxial layer with a first surface adjacent a surface of the silicon substrate, and a transfer transistor with a gate electrode that extends from the at least a first photodiode to a second surface of the epitaxial layer opposite the first surface. In further embodiments, a solid-state imaging device with a plurality of pixels formed in a second semiconductor substrate wherein the pixels are symmetrical with respect to a center point is provided. A floating diffusion is formed in an epitaxial layer, and a plurality of transfer gate electrodes that are each electrically connected to the floating diffusion by one of the transfer gate electrodes is provided.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: August 17, 2021
    Assignee: SONY CORPORATION
    Inventors: Yusuke Tanaka, Toshifumi Wakano, Keiji Tatani, Takashi Nagano, Hayato Iwamoto, Keiichi Nakazawa, Tomoyuki Hirano, Shinpei Yamaguchi, Shunsuke Maruyama