Abstract: High speed and spectrally selective pyroelectric detectors with plasmonic structure and methods of making and using same are disclosed. According to an aspect, a pyroelectric detector includes an artificial optical absorber or plasmonic absorber comprising an ensemble of subwavelength conductive components forming a plasmonic structure configured to receive light and to generate thermal energy from the received light. Further, the pyroelectric detector includes a pyroelectric material configured to receive the generated thermal energy from the plasmonic structure and to generate an electrical signal representative of the received thermal energy. Further, the pyroelectric detector includes an electronic component configured to receive the electrical signal from the pyroelectric material for detection of the received light.

Abstract: A solid-state image sensor is provided. The solid-state image sensor includes a plurality of photoelectric conversion elements. The solid-state image sensor also includes a first color filter layer disposed above the photoelectric conversion elements and having a plurality of first color filter segments. The solid-state image sensor further includes a second color filter layer disposed adjacent to the first color filter layer and having a plurality of second color filter segments. The solid-state image sensor includes a first grid structure disposed between the first color filter layer and the second color filter layer. The first grid structure has a first grid height. The solid-state image sensor also includes a second grid structure disposed between the first color filter segments and between the second color filter segments. The second grid structure has a second grid height that is lower than or equal to the first grid height.

Abstract: In a sensor substrate, a plurality of pixels are formed in a pixel region of a first surface of a flexible base material, and a terminal portion for electrically connecting a cable is provided in the terminal region of the first surface. A conversion layer is provided outside the terminal region of the base material and converts radiation into light. A reinforcing member is provided on a second surface of the base material to reinforce the strength of the base material. A stress neutral plane adjusting member is provided inside the terminal region and in at least a part, corresponding to the inside of the terminal region, of a cable electrically connected to the terminal portion.

Abstract: An imaging device that can obtain imaging data corresponding to high-resolution images in a short period of time is provided. The imaging device includes a pixel including a photoelectric conversion element and n (n is an integer more than 2 inclusive) retention circuits. The photoelectric conversion element and the n retention circuits are stacked. One electrode of the photoelectric conversion element is electrically connected to the first to n-th retention circuits. The retention circuits include OS transistors with an extremely low off-state current feature, and can retain imaging data for a long time. In the first to n-th periods, the imaging device obtains the first to n-th imaging data and retains it in the first to n-th retention circuits. Then, the first to n-th imaging data retained in the first to n-th retention circuits are read out. The read imaging data is output outside the imaging data through AD conversion.

Abstract: A photovoltaic cell assembly suitable for use in a dense array concentrated photovoltaic cell module includes a plurality of photovoltaic cells mounted on a substrate and a by-pass diode associated with each cell to allow the cell to be by-passed in the electrical circuit in the event that the cell fails or has low illumination. The diodes are positioned in the shadows of the cells. The diodes provide direct pathways for heat and electricity from the cells to the substrate.

Abstract: A solid-state imaging device includes a plurality of pixels, each of the plurality of pixels including a photoelectric converter. The photoelectric converter includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type provided under the first semiconductor region, and a third semiconductor region of the first conductivity type provided under the second semiconductor region. The second semiconductor region has a first end portion and a second end portion opposing to the first end portion. The third semiconductor region has a first region and a second region overlapping with the second semiconductor region in a plan view, and the first region and the second region are spaced apart from each other from a part of the first end portion to a part of the second end portion.

Abstract: Detector modules, detectors and medical imaging devices are provided. One of the detector modules includes: a support and a plurality of detector sub-modules arranged on the support along an extension direction in which the support extends. Each of the detector sub-modules has a first area and a second area in the extension direction. A detecting device is disposed in the first area, and a functional module is disposed in the second area. The functional module is electrically connected to the detecting device for receiving an electrical signal from the detecting device. The plurality of detector sub-modules includes a first detector sub-module and a second detector sub-module that are arranged adjacent to each other in the extension direction, and the first area of the first detector sub-module at least partially overlaps with the second area of the second detector sub-module.

Abstract: In some embodiments, a method is provided. The method includes forming a plurality of trenches in a semiconductor substrate, where the trenches extend into the semiconductor substrate from a back-side of the semiconductor substrate. An epitaxial layer comprising a dopant is formed on lower surfaces of the trenches, sidewalls of the trenches, and the back-side of the semiconductor substrate, where the dopant has a first doping type. The dopant is driven into the semiconductor substrate to form a first doped region having the first doping type along the epitaxial layer, where the first doped region separates a second doped region having a second doping type opposite the first doping type from the sidewalls of the trenches and from the back-side of the semiconductor substrate. A dielectric layer is formed over the back-side of the semiconductor substrate, where the dielectric layer fill the trenches to form back-side deep trench isolation structures.

Abstract: The present disclosure is directed to photovoltaic junctions and methods for producing the same. Embodiments of the disclosure may be incorporated in various devices for applications such as solar cells and light detectors and may demonstrate advantages compared to standard materials used for photovoltaic junctions such as silica. An example embodiment of the disclosure includes a photovoltaic junction, the junction including a light absorbing material, an electron acceptor for shuttling electrons, and a metallic contact. In general, embodiments of the disclosure as disclosed herein include photovoltaic junctions which provide absorption across one or more wavelengths in the range from about 200 nm to about 1000 nm, or from near IR (NIR) to ultra-violet (UV). Generally, these embodiments include a multi-layered light absorbing material that can be formed from quantum dots that are successively deposited on the surface of an electron acceptor (e.g., a semiconductor).

Abstract: Detector modules, detectors and medical imaging devices are provided. One of the detector modules includes: a support and a plurality of detector sub-modules arranged on the support along an extension direction in which the support extends. Each of the detector sub-modules has a first area and a second area in the extension direction. A detecting device is disposed in the first area, and a functional module is disposed in the second area. The functional module is electrically connected to the detecting device for receiving an electrical signal from the detecting device. The plurality of detector sub-modules includes a first detector sub-module and a second detector sub-module that are arranged adjacent to each other in the extension direction, and the first area of the first detector sub-module at least partially overlaps with the second area of the second detector sub-module.

Abstract: A method for producing an imager includes the following steps: a. attaching an imaging sensor to a first substrate; b. cutting out the first substrate a predefined distance around the attached imaging sensor; c. attaching a driver circuit board for driving the imaging sensor to the cut-out first substrate, close to the attached imaging sensor; d. connecting the driver circuit board for driving the imaging sensor to the attached imaging sensor in order to obtain a first tile; e. repeating the attaching, cutting-out, attaching, and connecting steps in order to obtain a second tile; f. butting together the obtained first tile and second tile by placing the cut-out first substrates in edge-to-edge contact; g. attaching the butted-together tiles to a main substrate; h. connecting the driver circuit boards of the imaging sensors of the butted-together first tile and second tile to a motherboard of the imager.

Abstract: A semiconductor substrate including a first main surface and a second main surface opposing each other is provided. The semiconductor substrate includes a first semiconductor region of a first conductivity type. The semiconductor substrate includes a plurality of planned regions where a plurality of second semiconductor regions of a second conductivity type forming pn junctions with the first semiconductor region are going to be formed, in a side of the second main surface. A textured region is formed on surfaces included in the plurality of planned regions, in the second main surface. The plurality of second semiconductor regions are formed in the plurality of planned regions after forming the textured region. The first main surface is a light incident surface of the semiconductor substrate.

Abstract: A silicon interposer may include an on-chip DC blocking capacitor, comprising: a first electrical connection to couple to a supply voltage and to cathodes of a plurality of photodiodes formed in a two-dimensional photodiode array on a first substrate, and a second electrical connection to couple to ground and to ground inputs of a plurality of transimpedance amplifiers on a second substrate; wherein the on-chip DC blocking capacitor is configured to be shared among a plurality of receiver circuits comprising the plurality of photodiodes and the plurality of transimpedance amplifiers; and wherein the silicon interposer comprises a substrate separate from the first substrate and the second substrate.

Abstract: A photoelectric conversion device comprising: a first substrate that includes a pixel circuit including a photoelectric conversion element; a second substrate having a signal processing circuit that drives the pixel circuit or processes a signal from the pixel circuit; a connection part electrically connecting the first substrate and the second substrate; and an inspection circuit, wherein the inspection circuit is formed in one of the first and second substrates and is connected to a wire supplying a first potential and being provided in the one of the first and second substrates, and the inspection circuit is connected via the connection part to a wire supplying a second potential and being provided in the other of the first and second substrates.

Abstract: An image sensing chip package structure includes a chip, an adhesive loop and a light-transmissible substrate member. The chip includes an image sensing region. The adhesive loop is connected to the chip, and has an inner peripheral surface that defines a plurality of protrusions which surround the image sensing region of the chip. The light-transmissible substrate member is connected to the adhesive loop oppositely of the chip to cover the image sensing region of the chip. Methods of manufacturing the image sensing chip package structures are also provided.

Abstract: An imaging device comprises a sensor substrate including a pixel array that includes at least a first pixel. The first pixel includes an avalanche photodiode including a light receiving region, a cathode, and an anode. The first pixel includes a wiring layer electrically connected to the cathode and arranged in the sensor substrate such that the wiring layer is in a path of incident light that exits the light receiving region.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a first through substrate via (TSV) disposed within a semiconductor substrate. The semiconductor substrate has a front-side surface and a back-side surface respectively on opposite sides of the semiconductor substrate. The semiconductor substrate comprises a first doped channel region extending from the front-side surface to the back-side surface. The first TSV is defined at least by the first doped channel region. A conductive contact overlies the back-side surface of the semiconductor substrate and comprises a first conductive layer overlying the first TSV. The first conductive layer comprises a conductive material. An upper conductive layer underlies the conductive contact. An upper surface of the upper conductive layer is aligned with the back-side surface of the semiconductor substrate. The upper conductive layer comprises a silicide of the conductive material.

Abstract: A stacked image sensor includes a first semiconductor die and a second semiconductor die. The first semiconductor die includes a pixel array of rows and columns of pixels, a first column interlayer-connection unit extending in the row direction and disposed adjacent the top or bottom of the pixel array and column routing wires extending in a diagonal direction and connecting the pixel columns and the first column interlayer-connection unit. The second semiconductor die is stacked with the first semiconductor die. The second semiconductor die includes a second column interlayer-connection unit extending in the row direction and disposed at a location corresponding to the first column interlayer-connection unit and connected to the first column interlayer-connection unit, and a column control circuit connected to the second column interlayer-connection unit.

Abstract: The present disclosure provides an optical structure, including a substrate, a light detection region in the substrate, an isolation structure in the substrate, surrounding the light detection region, a color filter layer over the substrate, and a dielectric grid structure in the color filter layer, the dielectric grid structure overlapping with the light detection region.

Abstract: A method for manufacturing an image sensing device includes forming an interconnection layer over a front surface of a semiconductor substrate. A trench is formed to extend from a back surface of the semiconductor substrate. An etch stop layer is formed along the trench. A buffer layer is formed over the etch stop layer. An etch process is performed for etching the buffer layer. The buffer layer and the etch stop layer include different materials.

Abstract: A method of manufacturing a solid-state image sensor, includes forming a first isolation region of a first conductivity type in a semiconductor layer having first and second surfaces, the forming the first isolation region including first implantation for implanting ions into the semiconductor layer through the first surface, forming charge accumulation regions of a second conductivity type in the semiconductor layer, performing first annealing, forming an interconnection on a side of the first surface of the semiconductor layer after the first annealing, and forming a second isolation region of the first conductivity type in the semiconductor layer, the forming the second isolation region including second implantation for implanting ions into the semiconductor layer through the second surface. The first and second isolation regions are arranged between the adjacent charge accumulation regions.

Abstract: The semiconductor device comprises a substrate of semiconductor material having a main surface, an integrated circuit in the substrate, a photodetector element or array of photodetector elements arranged at or above the main surface, and at least one nanomaterial film arranged above the main surface. At least part of the nanomaterial film has a scintillating property. The method of production includes the use of a solvent to apply the nanomaterial film, in particular by inject printing, by silk-screen printing, by spin coating or by spray coating.

Abstract: A monolithic multi-metallic thermal expansion stabilizer (MTES) has a coefficient of thermal expansion (CTE) differential between a first surface and a second surface, and a transition region extending between for mitigating the CTE differential.

Abstract: A temperature sensor module with an integrated lid structure for spurious IR-cancellation is disclosed. An improved temperature sensor module that allows detection of a maximum of the relevant IR-radiation from an object's surface of interest as well as generation of additional information about parasitic or spurious IR-radiation that distort the relevant thermal signal in order to enable a cancellation of interfering thermal signal portions is presented. The temperature sensor module includes a temperature sensing element, a sensor-interface control integrated circuit, whereas the temperature sensing element is coupled to the sensor-interface control IC, and a lid structure and a sensor packaging both defining a field of view of the temperature sensor module, wherein the lid structure is formed by a substrate comprising a second integrated temperature sensor connected to the sensor-interface control IC or an external connected processing unit.

Abstract: A semiconductor element capable of adjusting a barrier height ?Bn and performing zero-bias operation and impedance matching with an antenna for improving detection sensitivity of high-frequency RF electric signals, a method of manufacturing the same, and a semiconductor device having the same. In the semiconductor element, a concentration of InGaAs (n-type InGaAs layer) is intentionally set to be high over a range for preventing the “change of the barrier height caused by the bias” described above up to a deep degeneration range. An electron Fermi level (EF) increases from a band edge of InGaAs (n-type InGaAs layer) to a band edge of InP (InP depletion layer).

Abstract: An integrated circuit includes a photodetection region configured to receive incident photons. The photodetection region is configured to produce a plurality of charge carriers in response to the incident photons. The integrated circuit also includes at least one charge carrier storage region. The integrated circuit also includes a charge carrier segregation structure configured to selectively direct charge carriers of the plurality of charge carriers into the at least one charge carrier storage region based upon times at which the charge carriers are produced.

Abstract: A first conductive portion includes a first pad surrounded by a first insulator film in a plane perpendicular to a first direction, and a first via connected to the first pad so that the first via is positioned between the first pad and a first semiconductor layer in the first direction. A second conductive portion includes a second pad surrounded by a second insulator film in a plane perpendicular to the first direction, and a second via connected to the second pad so that the second via is positioned between the second pad and a second semiconductor layer in the first direction. The first and the second conductive portions are different in dimension.

Abstract: The inventive concepts provide a three-dimensional (3D) image sensor, based on structured light (SL), having a structure in which difficulty in a manufacturing process of a wiring layer is decreased and/or an area of a bottom pad of a capacitor is increased. The 3D image sensor includes: a pixel area including a photodiode in a semiconductor substrate and a gate group including a plurality of gates; a multiple wiring layer on an upper portion of the pixel area, the multiple wiring layer including at least two wiring layers; and a capacitor structure between a first wiring layer on a lowermost wiring layer of the multiple wiring layer and a second wiring layer on the first wiring layer, the capacitor structure including a bottom pad, a top pad, and a plurality of capacitors, wherein the bottom pad is connected to the first wiring layer.

Abstract: The present disclosure provides a quantum dot and a manufacturing method for the same, and a luminescent material, a light-emitting element and a display device applying the quantum dot. The quantum dot includes a nano-crystal and a ligand. The nano-crystal is at least one selected from the group consisting of a XII-XV group compound semiconductor nano-crystal, a XII-XVI group compound semiconductor nano-crystal, a XIII-XV group compound semiconductor nano-crystal and a XIII-XVI group compound semiconductor nano-crystal. The ligand is disposed on a surface of the nano-crystal. The ligand contains 15%-70% of a fatty acid compound, 1%-35% of a phosphine compound, >0%-55% of a thiol compound, and 0%-10% of another ligand substance.

Abstract: A device including a semiconductive substrate having opposite first and second surfaces, a light-sensitive element in the semiconductive substrate, an isolation structure extending at least from the second surface of the semiconductive substrate to within the semiconductive substrate, and a color filter over the second surface of the semiconductive substrate. The isolation structure includes a dielectric fill and a first high-k dielectric layer wrapping around the dielectric fill.

Abstract: Solid-state imaging devices, methods of producing a solid-state imaging device, and electronic apparatuses are provided. More particularly, a solid-state image device includes a silicon substrate, and at least a first photodiode formed in the silicon substrate. The device also includes an epitaxial layer with a first surface adjacent a surface of the silicon substrate, and a transfer transistor with a gate electrode that extends from the at least a first photodiode to a second surface of the epitaxial layer opposite the first surface. In further embodiments, a solid-state imaging device with a plurality of pixels formed in a second semiconductor substrate wherein the pixels are symmetrical with respect to a center point is provided. A floating diffusion is formed in an epitaxial layer, and a plurality of transfer gate electrodes that are each electrically connected to the floating diffusion by one of the transfer gate electrodes is provided.

Abstract: The present disclosure provides a display substrate, a method for preparing the same, and a display device. The display substrate includes: a base substrate; a display function layer located on the base substrate, a first groove arranged in the first surface, and a first connection sub-line located in the first groove and covering a bottom and each side wall of the first groove, the first connection sub-line being connected to a signal input terminal; an integrated circuit located on a second surface, a second groove arranged in the second surface, and a second connection sub-line located in the second groove, the second connection sub-line being connected to the first connection sub-line and a signal output terminal of the integrated circuit.

Abstract: Solid-state imaging devices, methods of producing a solid-state imaging device, and electronic apparatuses are provided. More particularly, a solid-state image device includes a silicon substrate, and at least a first photodiode formed in the silicon substrate. The device also includes an epitaxial layer with a first surface adjacent a surface of the silicon substrate, and a transfer transistor with a gate electrode that extends from the at least a first photodiode to a second surface of the epitaxial layer opposite the first surface. In further embodiments, a solid-state imaging device with a plurality of pixels formed in a second semiconductor substrate wherein the pixels are symmetrical with respect to a center point is provided. A floating diffusion is formed in an epitaxial layer, and a plurality of transfer gate electrodes that are each electrically connected to the floating diffusion by one of the transfer gate electrodes is provided.

Abstract: An SiPM sensor chip includes pixels consisting of microcells Z, each pixel being associated with an xy position x1, x2, x3, . . . , xN or y1, y2, y3, . . . yM. A plurality of pixels form a block, and the microcells are connected to output channels for a linear coding.

Abstract: The present disclosure discloses an anti-reflection coating and a method of forming the same. According to one embodiment of the present disclosure, the anti-reflection coating includes a first layer positioned on a substrate to be spaced apart from the substrate by a first distance and a second layer positioned on the first layer to be spaced apart from the first layer by a second distance. In this case, the first and second layers are a metamaterial forming a structural double layer and are realized as an anomalous dispersive medium that does not absorb incident light. The structural double layer may realize spatiotemporal dispersion that varies depending on an incidence angle using the nonlocality of the electromagnetic wave reaction of incident light.

Abstract: In some embodiments, a method is provided. The method includes forming a plurality of trenches in a semiconductor substrate, where the trenches extend into the semiconductor substrate from a back-side of the semiconductor substrate. An epitaxial layer comprising a dopant is formed on lower surfaces of the trenches, sidewalls of the trenches, and the back-side of the semiconductor substrate, where the dopant has a first doping type. The dopant is driven into the semiconductor substrate to form a first doped region having the first doping type along the epitaxial layer, where the first doped region separates a second doped region having a second doping type opposite the first doping type from the sidewalls of the trenches and from the back-side of the semiconductor substrate. A dielectric layer is formed over the back-side of the semiconductor substrate, where the dielectric layer fill the trenches to form back-side deep trench isolation structures.

Abstract: Various structures of image sensors are disclosed, as well as methods of forming the image sensors. According to an embodiment, a structure comprises a substrate comprising photo diodes, an oxide layer on the substrate, recesses in the oxide layer and corresponding to the photo diodes, a reflective guide material on a sidewall of each of the recesses, and color filters each being disposed in a respective one of the recesses. The oxide layer and the reflective guide material form a grid among the color filters, and at least a portion of the oxide layer and a portion of the reflective guide material are disposed between neighboring color filters.

Abstract: In some embodiments, the present disclosure relates to an image sensor, including a first photodiode and a second photodiode disposed in a semiconductor substrate. A floating diffusion node is disposed along a frontside of the semiconductor substrate and between the first and second photodiodes. A partial backside deep trench isolation (BDTI) structure is disposed within the semiconductor substrate and between the first and second photodiodes. The partial BDTI extends from a backside of the semiconductor substrate and is spaced from the floating diffusion node. A full BDTI structure extends from the backside of the semiconductor substrate to the frontside of the semiconductor substrate.

Abstract: A semiconductor device including a first semiconductor section including a first wiring layer at one side thereof, the first semiconductor section further including a photodiode, a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together, a third semiconductor section including a third wiring layer at one side thereof, the second and the third semiconductor sections being secured together such the first semiconductor section, second semiconductor section, and the third semiconductor section are stacked together, and a first conductive material electrically connecting at least two of (i) the first wiring layer, (ii) the second wiring layer, and (iii) the third wiring layer such that the electrically connected wiring layers are in electrical communication.

Abstract: A solid-state imaging device is provided. The solid-state imaging device includes an imaging region having a plurality of pixels arranged in a two-dimensional array, in which the imaging region includes an effective pixel and a black reference pixel; and a shape of a floating diffusion portion in the effective pixel is different from that of a floating diffusion portion in the black reference pixel.

Abstract: A photosensitive sensor and a method of manufacturing the photosensitive sensor are disclosed. The photosensitive sensor includes a thin film transistor and a photosensitive element on a substrate, wherein the photosensitive element includes a first electrode, a second electrode, and a photosensitive layer between the first electrode and the second electrode. The second electrode is connected to a drain electrode of the thin film transistor. An orthographic projection of an active layer of the thin film transistor on the substrate is within an orthographic projection of the second electrode on the substrate. The second electrode includes at least two stacked conductive layers, at least one of the at least two stacked conductive layers being a light shielding metal layer.

Abstract: An image acquisition unit acquires first and second radiographic images acquired by irradiating a first radiation detector and a second radiation detector which overlaps the first radiation detector so as to deviate from the first radiation detector by a half pixel with radiation which has been emitted from a radiation source and transmitted through an object. A corresponding positional relationship acquisition unit acquires a corresponding positional relationship between the position of pixels of the first radiographic image and the position of pixels of the second radiographic image. A resolution enhancement unit estimates a pixel value corresponding to a position between the pixels of the first radiographic image, on the basis of the corresponding positional relationship, a pixel value of the first radiographic image, and a pixel value of the second radiographic image, and generates a processed radiographic image having a higher resolution than the first and second radiographic images.

Abstract: According to an aspect of the present invention, provided is a solid state imaging device including a plurality of pixels, and each of the pixels has a charge accumulation region of a first conductivity type that accumulates signal charges corresponding to an incident light, a drain region of the first conductivity type to which a predetermined voltage is applied, a drain gate located between the drain region and the charge accumulation region in a planar view, and a semiconductor region of the first conductivity type connected to the charge accumulation region and the drain region.

Abstract: Example embodiments relate to an image sensor and a method for read-out of pixel signal. One embodiment includes an image sensor. The image sensor includes an array of pixels for detecting light incident on the pixel. The image sensor also includes an in-pixel correlated double sampling (CDS) circuitry. The image sensor also includes a column line that extends along and is associated with a column of pixels in the array of pixels. The column line is configured to selectively receive a pixel signal from a pixel in the column. Further, the image sensor includes a voltage-drop correction line that extends along and is associated with the column of pixels. The voltage-drop correction line is configured to provide a correction voltage signal to a pixel in the column such that corrects for voltage drop of the pixel signal in read-out through the column line.

Abstract: A method of fabricating a photovoltaic cell having a microinverter is provided. The method may include fabricating a monolithic microinverter layer through epitaxy and operably connecting the at least one microinverter layer to at least one photovoltaic cell formed on a photovoltaic layer. A photovoltaic device is also provided. The device may have a photovoltaic layer comprising at least one photovoltaic cell and a microinverter layer comprising at least one microinverter, wherein the microinverter layer was fabricated through epitaxy, the at least one microinverter is configured to be operably connected to at least one photovoltaic cell.

Abstract: An image sensor chip may include a first sub-chip, a second sub-chip on the first sub-chip, and an interconnector between the first and second sub-chips. The first sub-chip may include a first substrate, a bottom electrode on a first region of the first substrate, and a first capacitor on the bottom electrode. The first capacitor may include a plurality of first electrodes vertically extending from a top surface of the bottom electrode, a second electrode on the first electrodes, and a first dielectric layer between the second electrode and the first electrodes. The second sub-chip may include a pixel array configured to convert incident light into an electrical signal. The pixel array may be electrically connected through the interconnector to the first capacitor.

Abstract: A solid-state image pickup device is provided which can inhibit degradation of image quality which may occur when a global electronic shutter operation is performed. A gate drive line for a first transistor of gate drive lines for pixel transistors is positioned in proximity to a converting unit.

Abstract: An image sensor packaging method, an image sensor package and a lens module are disclosed. In the image sensor packaging method, plural image sensor dies are formed within a molded layer, resulting in a package with a significantly reduced thickness which is favorable to the slimming of the package. The packaging method does not involve any wire bonding process. Instead, metal pads are led out through a thin metal film formed in non-photosensitive areas on the same side of micro lens surfaces of the image sensor dies. This approach has a less adverse impact on micro lens surfaces and, compared to the wire bonding process, allows a smaller spacing from metal pads to the micro lens surfaces with respect to a direction parallel to the micro lens surfaces, which enables more compact image sensor dies usable in a lens module for an optimized spatial design and ease of miniaturization.

Abstract: A semiconductor device having a substrate with at least one photo-detecting region and at least one bond pad is provided. A first passivation layer is deposited over the substrate and over step portions at the edges of the bond pad and a trench having sidewalls and a bottom surface is formed in the substrate. A light shielding layer is deposited over the first passivation layer and covering the trench sidewalls. The light shielding layer has end portions at the photo-detecting region, at step portions at the edges of the bond pad and at the bottom surface of the trench. A second passivation layer is deposited over the light shielding layer. A third passivation layer is deposited over the end portions of the light shielding layer at the photo-detecting region and at the step portions at edges of the bond pad.

Abstract: The present technology relates to a solid-state imaging element, an imaging device, and an electronic device that can improve transfer efficiency of a charge accumulation unit (MEM) and can increase the number of saturation electrons Qs. In a case where a charge voltage conversion unit (FD) is connected to a center of a charge accumulation unit (MEM) in each pixel and pixels are arrayed in an array, a column in which photoelectric conversion units (PD) are arrayed and a column including charge voltage conversion units (FD) and pixel transistors are arrayed in parallel. The present technology can be applied to a CMOS image sensor.