Abstract: A method of contacting a silicide-based Schottky diode including the step of providing a contact to the silicide that is fully bordered with respect to an internal edge of the guard ring area. A Schottky diode having silicide contacting a guard ring of the Schottky diode and a contact to the silicide that is fully bordered by silicide with respect to an internal edge of the guard ring.

Abstract: A semiconductor memory device comprises a semiconductor substrate having a memory cell region and a periphery circuit region. The memory cell region includes first and second conductivity type wells and an array of memory cell formed on the first and second conductivity type wells. The periphery circuit region comprises a guard ring that is formed at a location next to a second conductivity type well and to surround a side portion of the array of memory cells. The guard ring is formed with a depth different from that of the second conductivity type well.

Abstract: In a semiconductor device having a solid state image sensing device of the present invention, a p-type well region 2a in which a plurality of unit cells, each having a photodiode PD, are formed and a p-type well region 2b in which a peripheral circuit element is formed are installed in a separated manner. Thus, it is possible to prevent a hot carrier, transition metals, etc. within the peripheral circuit region from invading the pixel region more effectively. Consequently, it becomes possible to provide a semiconductor device having a solid state image sensing device and a manufacturing method thereof, which can improve the pixel characteristic.

Abstract: A first guard ring formed by high concentration ion diffusion is established around the transistor formation region of the semiconductor substrate. A second guard ring is established around the first guard ring with a prescribed gap therebetween. A metal film is formed opposing to each guard ring with an insulating film interposed therebetween; these metal films are connected to the opposing guard rings by interlayer wires. The metal films are each connected to external terminals providing a standard potential by individual metal wires from their respective electrodes.

Abstract: A gate insulation film is provided on the surface of silicon substrate, a first gate electrode is provided on the gate insulation film, an interlayer insulation film is provided on the first gate electrode, a second gate electrode is provided on the interlayer insulation film, and the first gate electrode is fixed at a reference potential. Subsequently, a predetermined voltage is applied to the part of the substrate opposed to the first and second gate electrodes.

Abstract: A semiconductor device (and method for forming the device) includes a silicon-on-insulator (SOI) wafer formed on a substrate surface. An isolation trench in the wafer surface surrounds alternating p-type trenches and n-type trenches and electrically isolates the device from the substrate, thereby allowing the device to be effectively utilized as a differential detector in an optoelectronic circuit.

Abstract: A filter layer and a buffer layer are sequentially laminated on a first principal face of a semiconductor substrate, and an island-shaped light absorption layer and a window layer are laminated on top of the buffer layer. A diffusion region in which p-type impurities have been diffused is formed in the window layer. An n-side electrode and a p-side electrode are formed on the buffer layer and the diffusion region, respectively. A light incidence portion is formed on the buffer layer where the light absorption layer has not been formed.

Abstract: A photodiode array device having an absorption layer and a cladding layer formed on one surface of a single substrate, anodes formed on the cladding layer, a cathode formed on the other surface of the substrate, and a plurality of light-receiving regions; a photodiode module including the photodiode array device; and a structure for connecting the photodiode module and an optical connector. The photodiode array device has trenches formed on the one surface of the substrate and having such a depth as to divide the absorption layer into subdivisions, for cutting off propagation of light between adjacent light-receiving regions.

Abstract: In a photovoltaic device module comprising a plurality of photovoltaic devices connected electrically through a metal member, an insulating member is so provided as to avoid contact between an edge portion of the photovoltaic device and the metal member. This can provide a photovoltaic device module which is inexpensive, easy to operate and highly reliable.

Abstract: To form an impurity diffusion layer on only one side of a semiconductor substrate at least one semiconductor substrate and at least one diffusion protecting plate are put close to each other and a first impurity diffusion is perfomed on them, or at least one semiconductor substrate and at least one diffusion protecting plate are put close to each other and a first impurity diffusion is performed on them and then the semiconductor substrate and the diffusion protecting plate are arranged such that those sides on which the impurity diffusion has been performed face each other and a second impurity diffusion is performed. The diffusion protecting plate may be replaced by a semiconductor substrate. The first and second impurity diffusions may be performed using an impurity of the same conductivity type.

Abstract: A structure of a cross guard ring along the edge of a semiconductor chip is disclosed. A first guard ring, a second guard ring and a third guard ring are formed along the edge of a semiconductor chip. Each guard ring comprises several rectangle shaped vias which are positioned along the edge of the chip structure, wherein each rectangle via is separated from an adjacent rectangle via by a gap. Further, each rectangle via of the second guard ring is positioned opposite the said gap of the first guard ring and are crossed over and have some overlay with rectangle vias of the first guard ring which are separated by the said gap as shown in FIG. 2. Similarly the third guard ring is positioned with respect to the second guard ring.

Abstract: A device, having circuits formed thereon, comprises a circuit including a frequency generator for generating a detectable radio frequency energy when powered and a power generator, coupled to the frequency generator, for generating power when exposed to light.

Abstract: A semiconductor radiation detector is provided to detect x-ray and light photons. The entrance electrode is segmented by using variable doping concentrations. Further, the entrance electrode is physically segmented by inserting n+ regions between p+ regions. The p+ regions and the n+ regions are individually biased. The detector elements can be used in an array, and the p+ regions and the n+ regions can be biased by applying potential at a single point. The back side of the semiconductor radiation detector has an n+ anode for collecting created charges and a number of p+ cathodes. Biased n+ inserts can be placed between the p+ cathodes, and an internal resistor divider can be used to bias the n+ inserts as well as the p+ cathodes. A polysilicon spiral guard can be implemented surrounding the active area of the entrance electrode or surrounding an array of entrance electrodes.

Abstract: Besides the central pn-junction and the central electrode, a PD chip has a peripheral pn-junction and a peripheral electrode which do not appear on the sides. The ends of the peripheral pn-junction are covered with a protection layer for preventing self-shortcircuit. A reverse bias is applied to the peripheral electrode for making a wide depletion layer beneath the peripheral pn-junction. Extra carriers generated by peripherally-incidence rays are fully absorbed by the peripheral depletion layer and annihilated by the reverse bias.

Abstract: A diode (20), having first and second conductive layers (24,26), a conductive pad (28), and a distributed reverse surge guard (22), provides increased protection from reverse current surges. The surge guard (22) includes an outer loop (42) of P+-type surge guard material and an inner grid (44) of linear sections (46, 48) which form a plurality of inner loops extending inside the outer loop (42). The surge guard (22) distributes any reverse current over the area of the conductive pad (28) to provide increased protection from transient threats such as electrostatic discharge (ESD) and during electrical testing.

Abstract: A detector layer for an optics module includes at least one diode having at least one sloped sidewall. At least one isolation region may be formed adjacent to the at least one sloped sidewall to isolate the at least one diode. Conducting material is disposed on at least a portion of the top surface of the diode. An insulating material is disposed on at least a portion of the diode and extends to the conducting material. A metal is disposed on at least a portion of the insulating material and at least a portion of the conducting material such that the metal is coupled to the conducting material.

Abstract: A photo-detecting device includes: a semiconductor substrate; a multilayer structure formed on the semiconductor substrate; an island-like photo-detecting region formed in at least a portion of the multilayer structure, the island-like photo-detecting region having a central portion; and a light-shielding mask formed on the semiconductor substrate so as to shield from light a portion of the island-like photo-detecting region at least excluding the central portion. The light-shielding mask comprises an upper metal film and a lower metal film, and the upper metal film and the lower metal film are at least partially isolated by an insulative film, the upper metal film and the lower metal film having different patterns.

Abstract: A process for producing a sensor membrane substrate, in particular, for a mass flow sensor or a pressure sensor, the substrate having on its front a membrane, which is fixed at the edge of an opening that is etched free from the back. The process includes the following steps: providing a substrate; local thickening the substrate in an area on the front opposite the edge, the thickened portion having a continuous transition to the substrate; depositing a membrane layer on the front having the locally oxidized area; and etching free the opening from the back to clear the membrane in such a way that the edge is located underneath the thickened area.

Abstract: An electrostatic discharge protection device is formed in a substrate and contains a drain area of a first dopant concentration abutting an extended drain area having a dopant concentration lower than the first dopant concentration. Similarly, a highly doped source area abuts a lower doped source extension area. The source and drain are laterally bounded by oxide regions and covered by an insulation layer. The areas of lower doping prevent charge crowding during an electrostatic discharge event by resistively forcing current though the nearly planer bottom surface of the drain, rather than the curved drain extension. In addition, a highly doped buried layer can abut an area of a graded doping level. By adjusting the doping levels of the graded areas and the buried layers, the substrate breakdown voltage is pre-selected.

Abstract: Edge passivation for a small area silicon cell is provided in a batch process by providing streets between individual cells formed in a silicon substrate and diffusing dopant through the substrate along the streets. Following completion of fabrication of the plurality of cells in the substrate, the substrate is sawed along the streets with the diffused region providing passivation along the edges of the individual die.

Abstract: An ESD protective circuit formed by n-type pull-up transistors and n-type pull-down transistors on a p-type silicon substrate for protecting an internal device circuit is disclosed. In the circuit, a n-well region having a p+ diffusion and a n+ diffusion therein being formed adjacent one drain region of one pull-up transistors, the p+ diffusion and a n+ diffusion, as well as all the drain regions of the pull-up transistors are coupled to a power supply. All the source regions of the pull-up transistors and drain regions of the pull-down transistors are connected to an I/O pad. All the source regions of the pull-down transistors including the p+ guardings are grounded. The gates of all transistors are connected to the internal device circuit so that the internal device circuit will be immunity from the ESD.

Abstract: An ohmic electrode for electrically connecting a shielding metal film and a window layer is provided to a semiconductor light-receiving element in which stray light is controlled by the shielding metal film. In this semiconductor light-receiving element, the ohmic electrode is disposed such that it encircles a p+ diffusion region while kept in contact with the window layer on a substrate. Crack propagation from the edgewise region into the ohmic electrode is thereby impeded.

Abstract: An electrode structure of an HIP infrared detector. A HIP infrared comprises a p-type silicon substrate which has an exposed guard ring, an exposed region of the silicon substrate encompassed by the guard ring, and a silicon oxide layer covering a part of the guard ring and the silicon substrate. On the silicon substrate, a photosensitive alloy layer comprises an amorphous photosensitive alloy layer on the silicon oxide layer, and a single crystalline photosensitive alloy layer on both the part of the silicon substrate encompassed by the guard ring and the guard ring. An electrode to electrically connects the silicon substrate via the photosensitive alloy layer. Moreover, the HIP infrared further comprises a p+ Ohmic contact in the silicon substrate and another electrode to contact with the p+ Ohmic contact.

Abstract: A field shield portion consisting of a kind of transistor is formed to electrically insulate an NMOS region of a memory cell from other regions. The field shield portion includes a field shield gate electrode layer, a p type region and a gate insulating film. Threshold value of this transistor is set higher than the power supply voltage, and field gate electrode layer thereof is in a floating state. It is unnecessary to provide a contact portion for applying a prescribed voltage at field shield gate electrode layer. Therefore, the region for forming the contact portion in field shield gate electrode layer can be reduced. As a result, a semiconductor device of which layout area is reduced, is provided.

Abstract: A method of manufacturing a PIN (positive-intrinsic-negative) diode structure includes depositing an insulation or dielectric layer over the bottom PIN diode electrodes, prior to depositing the PIN semiconductor layers. The insulation layer results in a PIN diode structure with reduced leakage current, reduced RIE (reactive ion etching) chamber contamination, the reduction or elimination of post RIE processing, improved yields, and/or expands the potential materials that may be used for the bottom electrode. A corresponding PIN diode structure is also disclosed. The resulting PIN diode structures may be used in, for example, LCD (liquid crystal display) and solid state imager applications.

Abstract: In a photovoltaic device module comprising a plurality of photovoltaic devices connected electrically through a metal member, an insulating member is so provided as to avoid contact between an edge portion of the photovoltaic device and the metal member. This can provide a photovoltaic device module which is inexpensive, easy to operate and highly reliable.

Abstract: A semiconductor device and fabrication method thereof restrains an amplified current between input voltage Vin and ground voltage Vss, and first and second n-wells are biased into internal voltage sources, whereby the current-voltage characteristic of the input pad becomes stabilized during an open/short checkup of a semiconductor device. The semiconductor device includes a semiconductor substrate having a plurality of device isolation regions, first and second n-wells horizontally spaced from either of the plurality of device isolation regions, a p-channel transistor formed in the second n-well, an input protection transistor horizontally spaced from the first n-well and the device isolation region, on a symmetrical portion by the first n-well to the second n-well, and a guard ring formed between the first n-well and the input protection transistor.

Abstract: Since the PN junction of a photodiode is formed of a silicon substrate having a low impurity concentration and an epitaxial layer, the width of the depletion layer in the PN junction is formed wider, the parasitic capacitance by the junction capacitance is lowered, and the diffusion length of the silicon substrate is formed longer. Besides, a buried layer containing a high impurity concentration is formed by a high energy ion implantation method in such a depth that the buried layer cannot be depleted by a reverse voltage applied to the PN junction, which is served as a region to lead out the anode, which accordingly results in a low parasitic resistance at the anode. Thereby, the invention provides a semiconductor device including a photodetector and a method of manufacturing the same that achieves a high photoelectric conversion sensitivity and an excellent frequency characteristic at the same time.

Abstract: A large-area semiconductor device formed by adhering substrates, which is free from damages on the elements provided on each substrate during transportation thereof, also free from loss in the production yield and the uniformity of performance, thereby achieving a low cost and a high quality, can be realized by carrying out full-cutting in a substantially vertical direction of each substrate at an end surface on a side of the substrates to be mutually opposed to one another to detach an unnecessary portion, carrying out half-cutting on at least one end surface on a side other than the side to be opposed to merely form a groove between an unnecessary portion and the substrate to leave the unnecessary portion in a connected state, and arranging thus cut substrates so that the full-cutting end surfaces thereof are mutually opposed.

Abstract: A delta-doped hybrid advanced detector (HAD) is provided which combines at least four types of technologies to create a detector for energetic particles ranging in energy from hundreds of electron volts (eV) to beyond several million eV. The detector is sensitive to photons from visible light to X-rays. The detector is highly energy-sensitive from approximately 10 keV down to hundreds of eV. The detector operates with milliwatt power dissipation, and allows non-sequential readout of the array, enabling various advanced readout schemes.

Abstract: A solar cell and a method of producing the same which realizes electrical separation of the p n junction in a simple manner, and a method of producing a semiconductor device a method of producing a semiconductor device in which an electrode is formed by using a metallic paste material on a substrate covered with a silicon nitride film or a titanium oxide film, wherein a glass paste 104 composed mainly of glass which has a property of melting silicon is provided on an n type diffusion layer 101 in the p n junction; the substrate is baked so that penetration of the n type diffusion layer 101 is effected by the glass paste; aluminum is diffused in the n type diffusion layer 101 below a p electrode 103 formed of an aluminum silver paste to thereby form a p type inversion layer 105 inverted to a p type, whereby the electrical separation of the p n junction can be realized.

Abstract: A semiconductor integrated circuit is made up of a plurality of input-output circuit portions which are aligned at irregular intervals between a core portion and an external portion, a first guard-ring which is formed in the respective input-output circuit portions, and a second guard-ring which is formed between the respective input-output circuit portions. Accordingly, the semiconductor integrated circuit can prevent latch-up between the respective input-output circuit portions without changing the layout of the respective input-output circuit portions.

Abstract: In a CMOS-based photosensor chip, the area between the last photosensor in a linear array of photosensors and the edge of the chip can be a source of unintended charge generation affecting the last photosensor. A guardring, in the form of a biased diffusion area, prevents the unwanted leakage of charge from the edge area to the end photosensor.

Abstract: An integrated circuit (IC) is provided. The IC includes a silicon substrate and a dielectric layer formed upon the silicon substrate. The IC further includes a terminal metal layer (TML) formed upon the dielectric layer. The dielectric layer and the TML form a die active area. The TML has formed therein a plurality of spaced locking structures. The plurality of space locking structures are electrically isolated therebetween. Each locking structure is formed outside the die active area. The IC further includes a passivation layer adhering to the locking structures.

Abstract: A new kind of thermal detector and thermal imager for infrared radiation. A thermal detector/imager is a device for detecting/imaging in the infrared portion of the electromagnetic spectrum. This produces a video image, where the video brightness is a function of the incident power. The new thermal imager consists of a thermionic thermal detector having: a substrate having a thermal insulating gap; and a reverse biased CoSi.sub.2 diode suspended over the thermal insulating gap of the substrate and which senses temperature of thermionic emission by producing an output signal with a current that changes exponentially with temperature changes. The substrate is a silicon on insulator (SOI) wafer which has said thermal insulating gap on its top surface; an oxide insulator layer that covers the top surface of the thick silicon support layer, including the thermal insulating gap; and support legs placed on the top surface of the oxide insulator layer. The support legs support the reverse biased CoSi.sub.

Abstract: The present invention discloses a converging type solar cell element able to restrain recombination of carriers and inflow of carriers into an embankment section and improve photoelectric conversion efficiency. A p.sup.+ diffusion layer 16 is formed on the surface of a sunlight receiving section 10 which is formed on a silicon substrate 12 comprising a p-type silicon. An energy gradient arises between the p.sup.+ diffusion layer 16 and the silicon substrate 12. Therefore, free electrons, which are minority carriers among the carriers generated in the silicon substrate 12 resulting from irradiation of sunlight to the sunlight receiving section 10, can be prevented from migrating to the surface side of the silicon substrate 12. Further, recombination of free electrons which may arise due to lattice defects of the surface can also be prevented. Still further, the p.sup.+ diffusion layer 16 may also be formed on a back surface side of the embankment section 14 which surrounds the sunlight receiving section 10.

Abstract: A mesa-structure avalanche photodiode in which a buffer region in the surface of the mesa structure effectively eliminates the sharply-angled, heavily doped part of the cap layer that existed adjacent the lightly-doped n-type multiplication layer and p-type guard ring before the buffer region was formed. This reduces electric field strength at the ends of the planar epitaxial P-N junction and prevents edge breakdown in this junction. The lateral extent of the guard ring is defined by a window formed in a masking layer prior to regrowth of the guard ring. This guard ring structure eliminates the need to perform additional processing steps to define the lateral extent of the guard ring and passivate the periphery of the guard ring.

Abstract: A photodiode is provided. The photodiode includes an insulative region (IR) that permits passage of light therethrough. The photodiode also includes a substrate region of a first conductivity type and a well region of a second conductivity type. The well is formed within the substrate, beneath the IR. The well is demarcated from the substrate by a first surface. The photodiode further includes a heavily doped region (HDR) of the second conductivity type. The HDR is formed within the IR at a first position. The first surface meets the HDR at substantially the first position.

Abstract: An improvement of the design of Schottky barrier infrared detector (SBIR) arrays, as taught by Roosild, et al. We describe modifications of the detector unit cell design which maximize the fraction of detector electrode area exhibiting full spectral emission response. In particular we recommend changes in the impurity density profile, or "doping", under the Schottky electrode. The new detector cell design can result in a two-fold increase in the photoemission of SBIR arrays, which have small detector cell dimensions.

Abstract: A semiconductor device comprises a monocrystalline silicon wafer having a major surface lying in the <100> crystal plane. Disposed on the surface is a mesa having a generally square cross-section with generally rounded corners. The mesa has four main side walls each having a slope of around 45 degrees with respect to the base plane of the mesa, and the horizontal edges of the main side walls are disposed at an angle of at least around 12 degrees to the <110> directions on the wafer surface. The corners of the mesa each comprises a number of surfaces also having slopes of around 45 degrees and one surface having a slope of around 54 degrees. A high-low (N.sup.+ N.sup.- or P.sup.+ P.sup.-) junction is disposed within the mesa and makes a continuous line intercept with the mesa side walls around the entire periphery of the mesa. Except for exceptionally small deviations of no great significance, the high low junction intercept is at a constant height location entirely around the mesa periphery.

Abstract: It is the object of the invention to suppress the leakage current of a semiconductor photodiode. A trench, a side wall of which is covered with and insulating layer, is formed on the surface of a semiconductor substrate of the first conductivity type. Then, an epitaxial layer of the second conductivity type is grown in the trench, where a PN-junction is constructed between the bottom surface of the epitaxial layer and the semiconductor substrate. An impurity diffusion layer of the second conductivity type with higher impurity concentration than that of an internal portion of the epitaxial semiconductor layer is formed over the side surface of the epitaxial layer of the second conductivity type. In the aforementioned structure, when a reverse bias voltage is applied to the PN-junction, a depletion layer does not extend to a neighborhood of the insulating layer, and a leakage current, which flows via surface states near the insulating layer.

Abstract: A pin type light-receiving device according to the present invention comprises (a) a semiconductor substrate, (b) a first semiconductor layer formed on a semiconductor substrate and doped with an impurity of a first conduction type, (c) a second semiconductor layer formed in a mesa shape on the first semiconductor layer and made of a first semiconductor material without intentionally doping the first semiconductor material with an impurity, (d) a third semiconductor layer formed in a mesa shape on the second semiconductor layer and made of the first semiconductor material doped with an impurity of a second conduction type different from the first conduction type, (e) a first electrode layer formed in ohmic contact on the first semiconductor layer, (f) a second electrode layer formed in ohmic contact on the third semiconductor layer, and (g) a fourth semiconductor layer formed around the first to the third semiconductor layers and made of a second semiconductor material having a band gap energy greater than th

Abstract: In a method for fabricating an infrared detector, initially, a CdHgTe layer of a first conductivity type is produced on a front surface of a semiconductor substrate, a plurality of spaced apart CdHgTe regions of a second conductivity type, opposite the first conductivity type, are produced at the surface of the first conductivity type CdHgTe layer, and part of the surface of the first conductivity type CdHgTe layer between the second conductivity type CdHgTe regions is selectively irradiated with a charged particle beam to evaporate Hg atoms from that part, whereby a CdHgTe separation region of the first conductivity type and having a Cd composition larger than that of the first conductivity type CdHgTe layer is produced penetrating through the first conductivity type CdHgTe layer and surrounding each of the second conductivity type CdHgTe regions. Therefore, a highly-integrated high-resolution infrared detector with no crosstalk between pixels is achieved.

Abstract: A spatial light modulation device, in which at least a photoconductor structure and a light modulator have a multilayer structure. In this spatial light modulation device, the photoconductor structure has a plurality of pixel portions and avalanche multiplication of charges generated by light incident on each of the pixel portions is performed therein and charges obtained as a result of the avalanche multiplication are stored in the pixel portions. Thus, this spatial light modulation device has high sensibility.

Abstract: A matrix wiring substrate is provided which can perform an electrostatic countermeasure until drive circuits are connected to a matrix wiring substrate, whereby the circuit wiring can be inspected at an earlier stage. The matrix wiring substrate, where circuit wiring is formed over a substrate, includes a guard ring formed around the circuit wiring and connected to the circuit wiring, and separable portions arranged between the circuit wiring and the guard ring for controlling the conduction between the circuit wiring and the guard ring. Since the circuit wiring is conducted with the guard ring by effecting externally the separable portion, lines of the circuit wiring are short-circuited electrically. No potential difference between the wires causes any electric discharge, thus resulting in increased manufacturing yield.

Abstract: A photo sensor comprises a semiconductor substrate, a bipolar photo transistor having an emitter region, a base region and a collector region which is formed in the surface region of the semiconductor substrate, a silicon dioxide formed on the bipolar phototransistor, and a film having a smaller diffusion coefficient of hydrogen than the silicon dioxide formed all over the silicon dioxide.

Abstract: In a optoelectronic integrated circuit, a pin-type light receiving device and an electronic circuit device are electrically connected to each other and monolithically integrated on a semiconductor substrate. In the pin-type light receiving device, an n-type semiconductor layer, an i-type semiconductor layer, and a p-type semiconductor layer are sequentially formed on the semiconductor substrate and sequentially formed into mesa shapes. The first mesa is constituted by the p-type semiconductor layer, and the second mesa is constituted by the i-type semiconductor layer. The boundary surface between the first and second mesas is formed to match the junction surface between the p-type semiconductor layer and the i-type semiconductor layer. The diameter of the first mesa is formed smaller than that of the second mesa.

Abstract: A semiconductor device is provided having a first semiconductor region comprising an n-type semiconductor and a second semiconductor region of an n-type semiconductor having a higher resistivity than the first semiconductor region. An insulation film is provided adjacent to the semiconductor region having an aperture therein, and an electrode region is provided in the aperture. A third semiconductor region comprising a p-type semiconductor is provided at a junction between the insulation film and the electrode region. The electrode comprises a monocrystalline metal and constitutes a Schottky junction with the semiconductor region. An ohmic electrode comprising aluminum is arranged on the electrode region.

Abstract: A vertical semiconductor radiation detector structure is described in which a suction diode, formed by deposition of p+ on a substrate or epitaxial layer and subsequent up-diffusion during epitaxial layer deposition, surrounds the active area of the radiation detector. The suction diode removes the slow diffusion currents thereby reducing the settling time of the radiation detector to an acceptable level.

Abstract: A semiconductor light emitting element in which light leakage from the vicinity of an active layer end thereof is significantly reduced, and an interval at which the element is disposed is sufficiently narrow, so that there can be realized an optimal distance-measuring accuracy when used for a light source of a camera's automatic focusing mechanism.