Abstract: One embodiment of the present invention provides a solar cell. The solar cell includes a photovoltaic structure and a front-side metal grid situated above the photovoltaic structure. The front-side metal grid also includes one or more electroplated metal layers. The front-side metal grid includes one or more finger lines, and each end of a respective finger line is coupled to a corresponding end of an adjacent finger line via an additional metal line, thus ensuring that the respective finger line has no open end.

Abstract: An iridium interfacial stack (“IrIS”) and a method for producing the same are provided. The IrIS may include ordered layers of TaSi2, platinum, iridium, and platinum, and may be placed on top of a titanium layer and a silicon carbide layer. The IrIS may prevent, reduce, or mitigate against diffusion of elements such as oxygen, platinum, and gold through at least some of its layers.

Abstract: A method for wafer transfer includes forming a spreading layer, including graphene, on a single crystalline SiC substrate. A semiconductor layer including one or more layers is formed on and is lattice matched to the crystalline SiC layer. The semiconductor layer is transferred to a handle substrate, and the spreading layer is split to remove the single crystalline SiC substrate.

Abstract: Novel processing methods for production of high-refractive index contrast and low loss optical waveguides are disclosed. In one embodiment, a “channel” waveguide is produced by first depositing a lower cladding material layer with a low refractive index on a base substrate, a refractory metal layer, and a top diffusion barrier layer. Then, a trench is formed with an open surface to the refractory metal layer. The open surface is subsequently oxidized to form an oxidized refractory metal region, and the top diffusion barrier layer and the non-oxidized refractory metal region are removed. Then, a low-refractive-index top cladding layer is deposited on this waveguide structure to encapsulate the oxidized refractory metal region. In another embodiment, a “ridge” waveguide is produced by using similar process steps with an added step of depositing a high-refractive-index material layer and an optional optically-transparent layer.

Abstract: A high voltage device having a Schottky diode integrated with a MOS transistor includes a semiconductor substrate a Schottky diode formed on the semiconductor substrate, at least a first doped region having a first conductive type formed in the semiconductor substrate and under the Schottky diode, and a control gate covering a portion of the Schottky diode and the first doped region positioned on the semiconductor substrate.

Abstract: A method of performing a silicide contact process comprises a forming a nickel-platinum alloy (NiPt) layer over a semiconductor device structure; performing a first rapid thermal anneal (RTA) so as to react portions of the NiPt layer in contact with semiconductor regions of the semiconductor device structure, thereby forming metal rich silicide regions; performing a first wet etch to remove at least a nickel constituent of unreacted portions of the NiPt layer; performing a second wet etch using a dilute Aqua Regia treatment comprising nitric acid (HNO3), hydrochloric acid (HCl) and water (H2O) to remove any residual platinum material from the unreacted portions of the NiPt layer; and following the dilute Aqua Regia treatment, performing a second RTA to form final silicide contact regions from the metal rich silicide regions.

Abstract: A thin film photoelectric conversion device for performing photoelectric conversion of a wide range of light, from the visible range to the infrared range, is provided.

Abstract: A method of making a diode begins by depositing an AlxGa1-xN nucleation layer on a SiC substrate, then depositing an n+ GaN buffer layer, an n? GaN layer, an AlxGa1-xN barrier layer, and an SiO2 dielectric layer. A portion of the dielectric layer is removed and a Schottky metal deposited in the void. The dielectric layer is affixed to the support layer with a metal bonding layer using an Au—Sn utectic wafer bonding process, the substrate is removed using reactive ion etching to expose the n+ layer, selected portions of the n+, n?, and barrier layers are removed to form a mesa diode structure on the dielectric layer over the Schottky metal, and an ohmic contact is deposited on the n+ layer.

Abstract: A low profile high power Schottky barrier bypass diode for solar cells and panels with the cathode and anode electrodes on the same side of the diode and a method of fabrication thereof are disclosed for generating a thin chip with both electrodes being on the same side of the chip. In an embodiment, a mesa isolation with a Zener diode over the annular region surrounding the central region of the mesa anode in the Epi of the substrate is formed. In an embodiment, a P-type Boron dopant layer is ion implanted in the annular region for the Zener Diode. This controls recovery from high voltage spikes from the diode rated voltage. A Schottky barrier contact for the anode and a contact for the cathode are simultaneously created on the same side of the chip.

Abstract: A photo detector is disclosed. The photo detector has a substrate, a semiconductor layer disposed on the substrate, an insulating layer covered on the semiconductor layer, an interlayer dielectric layer covered on the insulating layer, and two electrodes formed on a portion of the interlayer dielectric layer. The semiconductor layer has a first doping region, a second doping region, and an intrinsic region located between the first doping region and the second doping region. The interlayer dielectric layer has at least three holes to expose a portion of the insulating layer, a portion of the first doping region, and the second doping region. The electrodes are connected to the first doping region and the second doping region through two of the holes.

Abstract: To provide a technique capable of improving the reliability of a semiconductor element and its product yield by reducing the variations in the electrical characteristic of a metal silicide layer. After forming a nickel-platinum alloy film over a semiconductor substrate 1, by carrying out a first thermal treatment at a thermal treatment temperature of 210 to 310° C. using a heater heating device, the technique causes the nickel-platinum alloy film and silicon to react with each other to form a platinum-added nickel silicide layer in a (PtNi)2Si phase. Subsequently, after removing the unreacted nickel-platinum alloy film, the technique carries out a second thermal treatment having the thermal treatment temperature higher than that of the first thermal treatment to form the platinum-added nickel silicide layer in a PtNiSi phase. The temperature rise rate of the first thermal treatment is set to 10° C./s or more (for example, 30 to 250° C.

Abstract: Provided are a thin-film photoelectric conversion device of which thickness can be reduced to several tens nanometers (nm) or below, and a method of manufacturing the thin-film photoelectric conversion device. The thin-film photoelectric conversion device includes a metal silicide layer formed on a surface of a silicon substrate by diffusion of a first metal and silicon, a conductive thin-film layer formed on the surface of the silicon substrate in a region where the second metal thin-film layer is laminated, and a silicon diffused portion formed between the metal silicide layer and the conductive thin-film layer near the surface of the silicon substrate by diffusion of silicon nano-particles.

Abstract: To provide a thin solar cell module connector having improved reliability, enduring long use, and having high productivity. A diode chip 6 is disposed in a diode module 2. The diode module 2 is transfer-molded. The diode module 2 is fitted in an opening 22 in the module box 20.

Abstract: A method of making a diode begins by depositing an AlxGa1?xN nucleation layer on a SiC substrate, then depositing an n+ GaN buffer layer, an n? GaN layer, an AlxGa1?xN barrier layer, and an SiO2 dielectric layer. A portion of the dielectric layer is removed and a Schottky metal deposited in the void. The dielectric layer is affixed to the support layer with a metal bonding layer using an Au-Sn utectic wafer bonding process, the substrate is removed using reactive ion etching to expose the n+ layer, selected portions of the n+, n?, and barrier layers are removed to form a mesa diode structure on the dielectric layer over the Schottky metal,; and an ohmic contact is deposited on the n+ layer.

Abstract: Disclosed herein is a solid-state imaging element which includes a plurality of drive signal inputs, a plurality of bus lines, and a plurality of vertical transfer register electrodes. In the solid-state imaging element, a charge accumulated in light-receiving elements in a pixel region is vertically transferred by the drive signals input to the electrodes. Each of the electrodes has a contact part connected to the second contact and having a width smaller than a width of the electrodes in the pixel region, and a blank region is formed between predetermined adjacent two of the contact parts so that a width of the blank region is larger than a distance between respective two of the contact parts other than the predetermined adjacent two of the contact parts. The first contact is disposed on the blank region.

Abstract: A solar module 20 comprises first and second sheets 21 and 22, a plurality of rows (a plurality of groups) of spherical solar cells 11 incorporated in between these sheets 21 and 22 in a state in which the conduction direction is perpendicular to the surface of the sheets, a mechanism for the parallel connection of each group of spherical solar cells 11, a mechanism for the serial connection of each group of spherical solar cells 11 with the spherical solar cells 11 in adjacent groups, a positive electrode terminal 23, and a negative electrode terminal 24. A positive electrode is formed on the bottom and a negative electrode on top in the odd-numbered rows of spherical solar cells 11 from the left end, while a positive electrode is formed on top and a negative electrode on the bottom in the even-numbered rows of spherical solar cells 11.

Abstract: A transparent conductive film substantially made from In2O3, SnO2 and ZnO, having a molar ratio In/(In+Sn+Zn) of 0.65 to 0.8 and also a molar ratio Sn/Zn of 1 or less: The transparent conductive film has a favorable electric contact property with an electrode or line made from Al or Al alloy film. Further, a semiconductor device having an electrode or line made from the transparent conductive film has high reliability and productivity.

Abstract: A semiconductor device having a metal/metal silicide gate and a Schottky source/drain and a method of forming the same are provided. The semiconductor device includes a gate dielectric overlying a semiconductor substrate, a metal or metal silicide gate electrode having a work function of less than about 4.3 eV or greater than about 4.9 eV overlying the gate dielectric, a spacer having a thickness of less than about 100 ? on a side of the gate electrode, and a Schottky source/drain having a work function of less than about 4.3 eV or greater than about 4.9 eV wherein the Schottky source/drain region overlaps the gate electrode. The Schottky source/drain region preferably has a thickness of less than about 300 ?.

Abstract: A method for forming an integrated circuit on an insulating substrate is described comprising the steps of forming a semiconductor layer on a seed wafer substrate containing an at least partially crystalline porous release layer, processing the semiconductor layer to form a “transferable” device layer containing at least one semiconductor device, and bonding said transferable device layer to a final, insulating substrate before or after separating said device layer from the seed wafer substrate. A second method, for separating a semiconductor layer from a seed wafer substrate, is described wherein an at least partially crystalline porous layer initially connecting the semiconductor layer and seed wafer substrate is split or broken apart by the steps of (i) introducing a fluid including water into the pores of said porous layer, and (ii) expanding said fluid by solidifying or freezing to break apart the porous layer.

Abstract: A semiconductor device can be manufactured which has a low resistance, and device characteristics of which do not vary. The semiconductor device includes a silicon layer, a gate dielectric film formed on the silicon layer, a gate electrode formed on the gate dielectric film and including a nitrided metal silicide layer which is partially crystallized, and source and drain regions formed in a surface region of the silicon layer at both sides of the gate electrode.

Abstract: A Schottky diode is adjusted by implanting an implant species by way of a titanium silicide Schottky contact and driving the implant species into the underlying silicon substrate by a rapid anneal. The implant is at a low energy, (e.g. about 10 keV) and at a low dose (e.g. less than about 9E12 atoms per cm2) such that the barrier height is slightly increased and the leakage current reduced without forming pn junction and retaining the peak boron concentration in the titanium silicide layer.

Abstract: A passive mechanism suppresses injection, into any active guard regions interposed between the edge of a photodiode array chip and the outer photodiode pixels or into the outer pixels themselves, of minority carrier current generated in the physically disrupted region at the edge of the semiconductor die created by cleaving, sawing or otherwise separating the chip from the remainder of the wafer on which the die was fabricated. A thin metallic layer covers all or part of the edge region, thereby creating a Schottky barrier. This barrier generates a depletion region in the adjacent semiconductor material. The depletion region inherently creates an energy band distribution which preferentially accelerates minority carriers generated or near the metal-semiconductor interface towards the metal, thereby suppressing collection of these carriers by any active regions of the guard structure or by the photodiode pixels.

Abstract: The invention relates to an opto-electronic component for converting electromagnetic radiation into an intensity-dependent photocurrent, comprising a substrate (1) with a microelectronic circuit whose surface is provided with a first layer (7) which is electrically contacted thereto and made of amorphous silicon a-i:H or alloys thereof, and at least one other optically active layer (8) is disposed upstream from said first layer in the direction of incident light thereof (7). The invention also relates to the production thereof. The aim of the invention is to improve upon an opto-electronic component of tho above-mentioned variety in order to obtain high spectral sensitivity within the visible light range and, correspondingly, significantly reduce sensitivity to radiation in the infrared range without incurring any additional construction costs.

Abstract: A novel photodetector CMOS-compatible photodetector is disclosed in which photo-generation of carriers (electrons) is carried out in the metal of the electrodes, rather than as electron-hole pairs in the semiconductor on which the metal electrodes are deposited. The novel photo detector comprises a silicon or other semiconductor substrate material characterized by an electron energy bandgap, and a pair of metal electrodes disposed upon a surface of the silicon to define therebetween a border area of the surface. One of the two electrodes being exposed to the incident radiation and covering an area of said surface which is larger than the aforesaid border area, the aforesaid metal of the electrodes being characterized by a Fermi level which is within said electron energy bandgap.

Abstract: A core memory array having a plurality of charge trapping dielectric memory devices. The core memory array can include a substrate having a first semiconductor bit line and a second semiconductor bit line formed therein and a body region interposed between the first and the second bit lines. Over the body region can be formed a first dielectric layer disposed, a dielectric charge trapping layer and a second dielectric layer. At least one word line can be disposed over the second dielectric layer, which defines a channel within the body region. Each bit line can include a bit line contact assembly having a locally metalized portion of the bit line and a conductive via traversing a dielectric region.

Abstract: A semiconductor device and a fabrication method thereof are disclosed. A silicon nitride film is formed over a silicon semiconductor substrate. Impurity ions are then implanted into desired areas of the silicon semiconductor substrate, so that nitrogen atoms and silicon atoms from the silicon nitride film are incorporated into the surface of the silicon semiconductor substrate together with introduction of impurity ions. The silicon semiconductor substrate has a minimized content of oxygen mixed thereinto and restored crystal defects filled by nitrogen atoms upon implanting of impurity ions. The fabricated semiconductor device is free from a trade-off relation between gate-electrode depletion and junction current leakage, and short-channel effects.

Abstract: A pn junction solar cell includes a pn junction structure including a p-type and a n-type semiconducting layer, a front contact electrode formed on the front surface of the pn junction structure through a contact pattern having a constant width, and a rear contact electrode formed on a rear surface of the pn structure. The front contact electrode is reduced in its width as it goes away from a terminal.

Abstract: This disclosure describes one-chip micro-integrated optoelectronic sensors and methods for fabricating and using the same. The sensors may include an optical emission source, optical filter and a photodetector fabricated on the same transparent substrate using the same technological processes. Optical emission may occur when a bias voltage is applied across a metal-insulator-semiconductor Schottky contact or a p-n junction. The photodetector may be a Schottky contact or a p-n junction in a semiconductor. Some sensors can be fabricated on optically transparent substrate and employ back-side illumination. In the other sensors provided, the substrate is not transparent and emission occurs from the edge of a p-n junction or through a transparent electrode. The sensors may be used to measure optical absorption, optical reflection, scattering or fluorescence.

Abstract: A pn junction solar cell includes a pn junction structure including a p-type and a n-type semiconducting layer, a front contact electrode formed on the front surface of the pn junction structure through a contact pattern having a constant width, and a rear contact electrode formed on a rear surface of the pn structure. The front contact electrode is reduced in its width as it goes away from a terminal.

Abstract: A method for lowering the anneal temperature required to form a multi-component material, such as refractory metal silicide. A shallow layer of titanium is implanted in the bottom of the contact area after the contact area is defined. Titanium is then deposited over the contact area and annealed, forming titanium silicide. A second embodiment comprises depositing titanium over a defined contact area. Silicon is then implanted in the deposited titanium layer and annealed, forming titanium silicide. A third embodiment comprises combining the methods of the first and second embodiments. In further embodiment, nitrogen, cobalt, cesium, hydrogen, fluorine, and deuterium are also implanted at selected times.

Abstract: Disclosed is a solid state image device which has a plurality of photosensitive units which are disposed in parallel with each other and each of which includes a row of a plurality of photosensitive devices each of which includes a first N(or P)-type impurity region which is selectively formed on the surface of a P(or N)-type semiconductor region at the surface of a semiconductor substrate, a CCD register for executing electronic scanning which is disposed in parallel to the row of photosensitive devices, and a read-out gate in which a signal charge is transferred from the photosensitive device to the CCD register, wherein a transparent Schottky electrode is formed on the first N(or P)-type impurity region except a portion adjacent to the read-out gate region, the Schottky electrode is electrically connected to a P.sup.+ (or N.sup.

Abstract: A photodiode capable of obtaining a sufficient photo current/dark ratio at both a forward bias state and a reverse bias state. The photodiode includes a glass substrate, an aluminum film formed as a lower electrode over the glass substrate, an alumina film formed as a Schottky barrier over the aluminum film, a hydrogenated amorphous silicon film formed as a photo conduction layer over a portion of the alumina film, and a transparent conduction film formed as an upper electrode over the hydrogenated amorphous silicon film.

Abstract: Silicon and metal are coevaporated onto a silicon substrate in a molecular beam epitaxy system with a larger than stoichiometric amount of silicon so as to epitaxially grow particles of metal silicide embedded in a matrix of single crystal epitaxially grown silicon. The particles interact with incident photons by resonant optical absorption at the surface plasmon resonance frequency. Controlling the substrate temperature and deposition rate and time allows the aspect ratio of the particles to be tailored to desired wavelength photons and polarizations. The plasmon energy may decay as excited charge carriers or phonons, either of which can be monitored to indicate the amount of incident radiation at the selected frequency and polarization.