With Specified Schottky Metallic Layer Patents (Class 257/453)
  • Patent number: 10333011
    Abstract: Resonant-cavity infrared photodetector (RCID) devices that include a thin absorber layer contained entirely within the resonant cavity. In some embodiments, the absorber is a single type-II InAs—GaSb interface situated between an AlSb/InAs superlattice n-type region and a p-type AlSb/GaSb region. In other embodiments, the absorber region comprises quantum wells formed on an upper surface of the n-type region. In other embodiments, the absorber region comprises a “W”-structured quantum well situated between two barrier layers, the “W”-structured quantum well comprising a hole quantum well sandwiched between two electron quantum wells. In other embodiments, the RCID includes a thin absorber region and an nBn or pBp active core within a resonant cavity. In some embodiments, the RCID is configured to absorb incident light propagating in the direction of the epitaxial growth of the RCID structure, while in other embodiments, it absorbs light propagating in the epitaxial plane of the structure.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: June 25, 2019
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Jerry R. Meyer, Igor Vurgaftman, Chadwick Lawrence Canedy, William W. Bewley, Chul Soo Kim, Charles D. Merritt, Michael V. Warren, Mijin Kim, Eric Stanton
  • Patent number: 10214797
    Abstract: Disclosed is a method for producing and identifying a Weyl semimetal. Identification is enabled via a combination of the vacuum ultraviolet (low-photon energy) and soft X-ray (SX) angle resolved photoemission spectroscopy (ARPES). Production generally requires providing high purity raw materials, creating a mixture, heating the mixture in a container at a temperature sufficient for thermal decomposition of an impurity while preventing the possible reaction between the side walls of the container and the raw materials, depositing the resulting compound and a transfer agent onto the bottom surface of the ampule, differentially heating the ampule, and allowing a chemical vapor transport reaction to complete.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: February 26, 2019
    Assignee: TRUSTEES OF PRINCETON UNIVERSITY
    Inventors: Suyang Xu, Ilya Belopolski, Nasser Alidoust, Madhab Neupane, Shuang Jia, M. Zahid Hasan
  • Patent number: 9946025
    Abstract: An integrated circuit includes optical waveguides defined in a semiconductor layer, and uses removable optical taps to allow for in-process characterization and trimming. These optical waveguides may be trimmed during fabrication of the integrated circuit to improve performance. Note that the trimming may modify indexes of refraction of portions of the optical waveguides or may involve a more invasive process. Moreover, the trimming may exclude or may not involve the use of a polymer and/or the carrier wavelengths at a given temperature may be stable as a function of time. The trimming process may use removable optical taps for external feedback to determine the amount of change required. These optical taps may be formed either in the semiconductor layer or the cladding layer, and they may be disabled with negligible impact to device performance via alterations to the cladding layer after the completion of trimming.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: April 17, 2018
    Assignee: Oracle International Corporation
    Inventors: Jock T. Bovington, Ashok V. Krishnamoorthy, Patrick J. Decker
  • Patent number: 9171976
    Abstract: A light detection device includes a substrate, a buffer layer disposed on the substrate, a first band gap change layer disposed on a portion of the buffer layer, a light absorption layer disposed on the first band gap change layer, a Schottky layer disposed on a portion of the light absorption layer, and a first electrode layer disposed on a portion of the Schottky layer.
    Type: Grant
    Filed: December 24, 2013
    Date of Patent: October 27, 2015
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Ki Yon Park, Hwa Mok Kim, Young Hwan Son, Daewoong Suh
  • Patent number: 8878327
    Abstract: A Schottky barrier device includes a semiconductor substrate, a first contact metal layer, a second contact metal layer and an insulating layer. The semiconductor substrate has a first surface, and plural trenches are formed on the first surface. Each trench includes a first recess having a first depth and a second recess having a second depth. The second recess extends down from the first surface while the first recess extends down from the second recess. The first contact metal layer is formed on the second recess. The second contact metal layer is formed on the first surface between two adjacent trenches. The insulating layer is formed on the first recess. A first Schottky barrier formed between the first contact metal layer and the semiconductor substrate is larger than a second Schottky barrier formed between the second contact metal layer and the semiconductor substrate.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: November 4, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Cheng-Tyng Yen, Young-Shying Chen, Chien-Chung Hung, Chwan-Ying Lee
  • Patent number: 8878329
    Abstract: A high voltage device having a Schottky diode integrated with a MOS transistor includes a semiconductor substrate a Schottky diode formed on the semiconductor substrate, at least a first doped region having a first conductive type formed in the semiconductor substrate and under the Schottky diode, and a control gate covering a portion of the Schottky diode and the first doped region positioned on the semiconductor substrate.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: November 4, 2014
    Assignee: United Microelectronics Corp.
    Inventor: Min-Hsuan Tsai
  • Publication number: 20140225216
    Abstract: A photodetector includes a substrate, a first electrode layer, a first light absorbing layer, a second electrode layer, a second light absorbing layer, and a third electrode layer that are laminated on the substrate, a first electrode wire that intercouples the first electrode layer and the second electrode layer, a second electrode wire that intercouples the second electrode layer and the third electrode layer, a first diode formed at a place where the second electrode layer and the first electrode wire are mutually brought into contact, and a second diode formed at a place where the second electrode layer and the second electrode wire are mutually brought into contact.
    Type: Application
    Filed: April 15, 2014
    Publication date: August 14, 2014
    Applicant: FUJITSU LIMITED
    Inventors: SHINICHIRO KAWAKAMI, Yasuo MATSUMIYA
  • Patent number: 8765523
    Abstract: A method for manufacturing a semiconductor device includes the steps of preparing a substrate made of silicon carbide and having an n type region formed to include a main surface, forming a p type region in a region including the main surface, forming an oxide film on the main surface across the n type region and the p type region, by heating the substrate having the p type region formed therein at a temperature of 1250° C. or more, removing the oxide film to expose at least a part of the main surface, and forming a Schottky electrode in contact with the main surface that has been exposed by removing the oxide film.
    Type: Grant
    Filed: November 6, 2012
    Date of Patent: July 1, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Wada, Takeyoshi Masuda
  • Patent number: 8610289
    Abstract: A semiconductor component including a first layer (10) of a semiconductor material as a substrate, a second layer (12) running on said first layer (10), and at least two intermediate layers (14, 16) made of the materials of the first and second layers running between the first and second layer, where the first intermediate layer (16) facing the second layer (12) may contain a eutectic mixture (18) made of the materials of the first and second layers. The invention is also directed to an electroconductive contact (15, 15a, 15b) forming an electroconductive connection to the first layer and originating at or running through the second layer, as well as to a method for producing the metal-semiconductor contact.
    Type: Grant
    Filed: June 12, 2008
    Date of Patent: December 17, 2013
    Assignee: Schott Solar AG
    Inventors: Bernd Wildpanner, Hilmar Von Campe, Werner Buss
  • Patent number: 8344398
    Abstract: A method of making a diode begins by depositing an AlxGa1-xN nucleation layer on a SiC substrate, then depositing an n+ GaN buffer layer, an n? GaN layer, an AlxGa1-xN barrier layer, and an SiO2 dielectric layer. A portion of the dielectric layer is removed and a Schottky metal deposited in the void. The dielectric layer is affixed to the support layer with a metal bonding layer using an Au—Sn utectic wafer bonding process, the substrate is removed using reactive ion etching to expose the n+ layer, selected portions of the n+, n?, and barrier layers are removed to form a mesa diode structure on the dielectric layer over the Schottky metal, and an ohmic contact is deposited on the n+ layer.
    Type: Grant
    Filed: October 15, 2010
    Date of Patent: January 1, 2013
    Assignee: Cree, Inc.
    Inventors: Primit Parikh, Sten Heikman
  • Patent number: 8174089
    Abstract: The present invention relates to various switching device structures including Schottky diode, P—N diode, and P—I—N diode, which are characterized by low defect density, low crack density, low pit density and sufficient thickness (>2.5 um) GaN layers of low dopant concentration (<1E16 cm?3) grown on a conductive GaN layer. The devices enable substantially higher breakdown voltage on hetero-epitaxial substrates (<2 KV) and extremely high breakdown voltage on homo-epitaxial substrates (>2 KV).
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: May 8, 2012
    Assignee: Cree, Inc.
    Inventors: Jeffrey S. Flynn, George R. Brandes, Robert P. Vaudo
  • Publication number: 20120104535
    Abstract: A photodetector includes a substrate, a first electrode layer, a first light absorbing layer, a second electrode layer, a second light absorbing layer, and a third electrode layer that are laminated on the substrate, a first electrode wire that intercouples the first electrode layer and the second electrode layer, a second electrode wire that intercouples the second electrode layer and the third electrode layer, a first diode formed at a place where the second electrode layer and the first electrode wire are mutually brought into contact, and a second diode formed at a place where the second electrode layer and the second electrode wire are mutually brought into contact.
    Type: Application
    Filed: October 27, 2011
    Publication date: May 3, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Shinichiro KAWAKAMI, Yasuo MATSUMIYA
  • Patent number: 8164154
    Abstract: A low profile high power Schottky barrier bypass diode for solar cells and panels with the cathode and anode electrodes on the same side of the diode and a method of fabrication thereof are disclosed for generating a thin chip with both electrodes being on the same side of the chip. In an embodiment, a mesa isolation with a Zener diode over the annular region surrounding the central region of the mesa anode in the Epi of the substrate is formed. In an embodiment, a P-type Boron dopant layer is ion implanted in the annular region for the Zener Diode. This controls recovery from high voltage spikes from the diode rated voltage. A Schottky barrier contact for the anode and a contact for the cathode are simultaneously created on the same side of the chip.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: April 24, 2012
    Inventors: Aram Tanielian, Garo Tanielian
  • Patent number: 8035185
    Abstract: An electrode is composed of a carbon carrying a metal and a binder polymer, and it is used as a counter electrode of a dye-sensitized solar cell. The metal carried by carbon is at least one kind of metal selected from the group consisting of Pt, Ru, Co, Ti, Ni, Al and Au. The carbon is needle-like carbon, fullerene, carbon nanotube, conductive carbon black, or the like, and its specific surface area is equal to or larger than 100 m2/g.
    Type: Grant
    Filed: May 26, 2004
    Date of Patent: October 11, 2011
    Assignee: Sony Corporation
    Inventors: Yusuke Suzuki, Masahiro Morooka, Kazuhiro Noda
  • Patent number: 8022494
    Abstract: A lateral photodiode, with improved response speed, includes a semiconductor substrate having active regions, and a p-type region and an n-type region arranged parallel to the surface of the substrate. The active regions are an n-layer and a p-layer respectively, and stacked in the thickness direction of the substrate to form a p-n junction. In addition, a barrier layer, for preventing movement of carriers from the substrate toward the active region, is provided on the side of the active regions toward the substrate.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: September 20, 2011
    Assignees: FUJIFILM Corporation, Massachusetts Institute of Technology
    Inventors: Yukiya Miyachi, Wojciech P. Giziewicz, Jurgen Michel, Lionel C. Kimerling
  • Patent number: 7999344
    Abstract: An optoelectronic device comprises a photodetector feature, an interfacial layer disposed above at least a portion of the photodetector feature, and a vertical contact disposed on at least a portion of the interfacial layer. The photodetector feature comprises germanium and is operative to convert a light signal into an electrical signal. The interfacial layer comprises nickel. Finally, the vertical contact is operative to transmit the electrical signal from the photodetector feature.
    Type: Grant
    Filed: May 6, 2010
    Date of Patent: August 16, 2011
    Assignee: International Business Machines Corporation
    Inventors: Solomon Assefa, Stephen Walter Bedell, Yurii A. Vlasov, Fengnian Xia
  • Patent number: 7939902
    Abstract: The present invention is a field effect transistor having a strained semiconductor substrate and Schottky-barrier source and drain electrodes, and a method for making the transistor. The bulk charge carrier transport characteristic of the Schottky barrier field effect transistor minimizes carrier surface scattering, which enables the strained substrate to provide improved power and speed performance characteristics in this device, as compared to conventional devices.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: May 10, 2011
    Assignee: Avolare 2, LLC
    Inventors: John P. Snyder, John M. Larson
  • Patent number: 7863682
    Abstract: A semiconductor device having a junction barrier Schottky diode includes: a SiC substrate; a drift layer on the substrate; an insulation film on the drift layer having an opening in a cell region; a Schottky barrier diode having a Schottky electrode contacting the drift layer through the opening of the insulation film and an ohmic electrode on the substrate; a terminal structure having a RESURF layer surrounding the cell region; and multiple second conductive type layers on an inner side of the RESURF layer. The second conductive type layers and the drift layer provide a PN diode. The Schottky electrode includes a first Schottky electrode contacting the second conductive type layers with ohmic contact and a second Schottky electrode contacting the drift layer with Schottky contact.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: January 4, 2011
    Assignee: Denso Corporation
    Inventors: Eiichi Okuno, Takeo Yamamoto
  • Patent number: 7834367
    Abstract: A method of making a diode begins by depositing an AlxGa1?xN nucleation layer on a SiC substrate, then depositing an n+ GaN buffer layer, an n? GaN layer, an AlxGa1?xN barrier layer, and an SiO2 dielectric layer. A portion of the dielectric layer is removed and a Schottky metal deposited in the void. The dielectric layer is affixed to the support layer with a metal bonding layer using an Au-Sn utectic wafer bonding process, the substrate is removed using reactive ion etching to expose the n+ layer, selected portions of the n+, n?, and barrier layers are removed to form a mesa diode structure on the dielectric layer over the Schottky metal,; and an ohmic contact is deposited on the n+ layer.
    Type: Grant
    Filed: January 19, 2007
    Date of Patent: November 16, 2010
    Assignee: Cree, Inc.
    Inventors: Primit Parikh, Sten Heikman
  • Publication number: 20100264506
    Abstract: A light-tight silicon detector. The detector utilizes a silicon substrate having a sensitive volume for the detection of ionizing radiation and a rectifying contact or electrode through which the ionizing radiation may enter. A diffused or boron-implanted p+ layer may act at the rectifying electrode. A first layer of titanium nitride is deposited on the entrance window to prevent light from being admitted to the sensitive volume and to increase the abrasion and corrosion resistance of the detector. Alternatively a titanium nitride layer may be deposited directly on the silicon substrate, said layer acting as a surface barrier or Schottky barrier rectifying contact. A layer of titanium nitride may be deposited on the backside contact wherein this titanium nitride layer serves as an ohmic contact. The second layer may be further utilized as a conductive contact for surface mount connections.
    Type: Application
    Filed: April 12, 2010
    Publication date: October 21, 2010
    Inventors: Olivier Evrard, Marijke Keters
  • Patent number: 7816733
    Abstract: A semiconductor device having a JBS diode includes: a SiC substrate; a drift layer on the substrate; an insulation film on the drift layer having an opening in a cell region; a Schottky barrier diode having a Schottky electrode contacting the drift layer through the opening and an ohmic electrode on the substrate; a terminal structure having a RESURF layer in the drift layer surrounding the cell region; and multiple second conductive type layers in the drift layer on an inner side of the RESURF layer contacting the Schottky electrode. The second conductive type layers are separated from each other. The second conductive type layers and the drift layer provide a PN diode. Each second conductive type layer has a depth larger than the RESURF layer.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: October 19, 2010
    Assignee: DENSO CORPORATION
    Inventors: Eiichi Okuno, Takeo Yamamoto
  • Patent number: 7790495
    Abstract: An optoelectronic device comprises a photodetector feature, an interfacial layer disposed above at least a portion of the photodetector feature, and a vertical contact disposed on at least a portion of the interfacial layer. The photodetector feature comprises germanium and is operative to convert a light signal into an electrical signal. The interfacial layer comprises nickel. Finally, the vertical contact is operative to transmit the electrical signal from the photodetector feature.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: September 7, 2010
    Assignee: International Business Machines Corporation
    Inventors: Solomon Assefa, Stephen Walter Bedell, Yurii A. Vlasov, Fengnian Xia
  • Patent number: 7768091
    Abstract: In a conventional ultraviolet sensing device using a diamond semiconductor in a light-receiving unit, an Au-based electrode material is used for both a rectifier electrode and an ohmic electrode. However, the Au-based electrode material has fatal defects, such as poor adhesion to diamond, low mechanical strength, and furthermore poor thermal stability. While avoiding complication of the device structure and exploiting the characteristics of a photoconductive sensing device, by using a carbide compound (TiC, ZrC, HfC, VC, NbC, TaC, CrC, MoC, and WC) of a high melting metal having a high mechanical strength for a rectifier electrode and/or a ohmic electrode, there is provided an extremely heat-stable diamond ultraviolet sensor having a light-receiving sensitivity to ultraviolet light having a wavelength of 260 nm or less.
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: August 3, 2010
    Assignee: National Institute for Materials Science
    Inventors: Yasuo Koide, Meiyong Liao, Antonio Alvarez Jose
  • Patent number: 7768092
    Abstract: A semiconductor device comprises a first layer (1) of a wide band gap semiconductor material doped according to a first conductivity type and a second layer (3) on top thereof designed to form a junction blocking current in the reverse biased state of the device at the interface to said first layer. The device comprises extension means for extending a termination of the junction laterally with respect to the lateral border (6) of the second layer. This extension means comprises a plurality of rings (16-21) in juxtaposition laterally surrounding said junction (15) and being arranged as seen in the lateral direction away from said junction alternatively a ring (16-18) of a semiconductor material of a second conductivity type opposite to that of said first layer and a ring (19-21) of a semi-insulating material.
    Type: Grant
    Filed: July 20, 2005
    Date of Patent: August 3, 2010
    Assignee: Cree Sweden AB
    Inventors: Christopher Harris, Cem Basceri
  • Publication number: 20100175745
    Abstract: Photovoltaic devices are driven by intense photoemission of “hot” electrons from a suitable nanostructured metal. The metal should be an electron source with surface plasmon resonance within the visible and near-visible spectrum range (near IR to near UV (about 300 to 1000 nm)). Suitable metals include silver, gold, copper and alloys of silver, gold and copper with each other. Silver is particularly preferred for its advantageous opto-electronic properties in the near UV and visible spectrum range, relatively low cost, and simplicity of processing.
    Type: Application
    Filed: July 17, 2008
    Publication date: July 15, 2010
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Robert Kostecki, Samuel S. Mao
  • Patent number: 7679662
    Abstract: Disclosed herein is a solid-state imaging element which includes a plurality of drive signal inputs, a plurality of bus lines, and a plurality of vertical transfer register electrodes. In the solid-state imaging element, a charge accumulated in light-receiving elements in a pixel region is vertically transferred by the drive signals input to the electrodes. Each of the electrodes has a contact part connected to the second contact and having a width smaller than a width of the electrodes in the pixel region, and a blank region is formed between predetermined adjacent two of the contact parts so that a width of the blank region is larger than a distance between respective two of the contact parts other than the predetermined adjacent two of the contact parts. The first contact is disposed on the blank region.
    Type: Grant
    Filed: November 9, 2006
    Date of Patent: March 16, 2010
    Assignee: Sony Corporation
    Inventors: Sadamu Suizu, Masaaki Takayama
  • Patent number: 7633135
    Abstract: This invention discloses a bottom-anode Schottky (BAS) diode that includes an anode electrode disposed on a bottom surface of a semiconductor substrate. The bottom-anode Schottky diode further includes a sinker dopant region disposed at a depth in the semiconductor substrate extending substantially to the anode electrode disposed on the bottom surface of the semiconductor and the sinker dopant region covered by a buried Schottky barrier metal functioning as an Schottky anode.
    Type: Grant
    Filed: July 22, 2007
    Date of Patent: December 15, 2009
    Assignee: Alpha & Omega Semiconductor, Ltd.
    Inventor: François Hébert
  • Patent number: 7622752
    Abstract: A Schottky diode with a vertical barrier extending perpendicularly to the surface of a semiconductor chip having a vertical central metal conductor in contact on the one hand with the substrate of the semiconductor chip with an interposed interface forming a Schottky barrier, and on the other hand with radially-extending conductive fingers.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: November 24, 2009
    Assignees: STMicroelectronics S.A., STMicroelectronics Maroc
    Inventors: Frédéric Lanois, Sylvain Nizou
  • Publication number: 20090152536
    Abstract: A semiconductor device provides a metal contact, a DNA layer, wherein the metal layer and the DNA layer are adapted to form a Schottky barrier junction there between, and a conductive contact with the DNA layer.
    Type: Application
    Filed: May 12, 2008
    Publication date: June 18, 2009
    Applicant: IPICOM, Inc.
    Inventor: De Yu Zang
  • Patent number: 7508045
    Abstract: A semiconductor device includes a first-conductivity-type SiC substrate, a first-conductivity-type SiC semiconductor layer formed on the substrate, whose impurity concentration is lower than that of the substrate, a first electrode formed on the semiconductor layer and forming a Schottky junction with the semiconductor layer, a barrier height of the Schottky junction being 1 eV or less, plural second-conductivity-type junction barriers formed to contact the first electrode and each having a depth d1 from an upper surface of the semiconductor layer, a width w, and a space s between adjacent ones of the junction barriers, a second-conductivity-type edge termination region formed outside the junction barriers to contact the first electrode and having a depth d2 from the upper surface of the semiconductor layer, and a second electrode formed on the second surface of the substrate, wherein following relations are satisfied d1/d2?1, s/d1?0.6, and s/(w+s)?0.33.
    Type: Grant
    Filed: July 12, 2007
    Date of Patent: March 24, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Johji Nishio, Takuma Suzuki, Chiharu Ota, Takashi Shinohe
  • Publication number: 20080308892
    Abstract: A semiconductor component including a first layer (10) of a semiconductor material as a substrate, a second layer (12) running on said first layer (10), and at least two intermediate layers (14, 16) made of the materials of the first and second layers running between the first and second layer, where the first intermediate layer (16) facing the second layer (12) may contain a eutectic mixture (18) made of the materials of the first and second layers. The invention is also directed to an electroconductive contact (15, 15a, 15b) forming an electroconductive connection to the first layer and originating at or running through the second layer, as well as to a method for producing the metal-semiconductor contact.
    Type: Application
    Filed: June 12, 2008
    Publication date: December 18, 2008
    Applicant: SCHOTT SOLAR GMBH
    Inventors: Bernd WILDPANNER, Hillmar VON CAMPE, Werner BUSS
  • Patent number: 7432577
    Abstract: A semiconductor component for detecting electromagnetic radiation includes a contact between a metal and a semiconductor. The semiconductor has at least one metal-chalcogenide compound semiconductor as an optical absorbing material or is configured completely from said semiconductor. This allows a cost-effective component to be produced which reacts to electromagnetic radiation in a specifically defined manner. The semiconductor component can be used in an electronic component and a sensor system. A method is also described for producing a semiconductor component by bringing a substrate into contact with a solution, in which a precursor of metal-chalcogenide compound semiconductor is dissolved and/or suspended.
    Type: Grant
    Filed: October 10, 2000
    Date of Patent: October 7, 2008
    Assignee: Satronic AG
    Inventors: Tilman Weiss, Christoph Thiedig, Stefan Langer, Oliver Hilt, Hans Georg Koerner, Sebastian Stahn, Stephan Swientek
  • Patent number: 7420215
    Abstract: A transparent conductive film substantially made from In2O3, SnO2 and ZnO, having a molar ratio In/(In+Sn+Zn) of 0.65 to 0.8 and also a molar ratio Sn/Zn of 1 or less: The transparent conductive film has a favorable electric contact property with an electrode or line made from Al or Al alloy film. Further, a semiconductor device having an electrode or line made from the transparent conductive film has high reliability and productivity.
    Type: Grant
    Filed: June 22, 2007
    Date of Patent: September 2, 2008
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazunori Inoue, Nobuaki Ishiga, Kensuke Nagayama, Toru Takeguchi, Kazumasa Kawase
  • Patent number: 7385271
    Abstract: Electro-hole production at a Schottky barrier has recently been observed experimentally as a result of chemical processes. This conversion of chemical energy to electronic energy may serve as a basic link between chemistry and electronics and offers the potential for generation of unique electronic signatures for chemical reactions and the creation of a new class of solide state chemical sensors. Detection of the following chemical species was established: hydrogen, deuterium, carbon monoxide, molecular oxygen. The detector (1b) consists of a Schottky diode between an Si layer and an ultrathin metal layer with zero force electrical contacts.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: June 10, 2008
    Assignee: Adrena, Inc.
    Inventors: Eric W. McFarland, Henry W. Weinberg, Hermann Nienhaus, Howard S. Bergh, Brian Gergen, Arunava Mujumdar
  • Patent number: 7294898
    Abstract: The present invention is a field effect transistor having a strained semiconductor substrate and Schottky-barrier source and drain electrodes, and a method for making the transistor. The bulk charge carrier transport characteristic of the Schottky barrier field effect transistor minimizes carrier surface scattering, which enables the strained substrate to provide improved power and speed performance characteristics in this device, as compared to conventional devices.
    Type: Grant
    Filed: July 16, 2004
    Date of Patent: November 13, 2007
    Assignee: Spinnaker Semiconductor, Inc.
    Inventors: John P. Snyder, John M. Larson
  • Patent number: 7279765
    Abstract: A pixel electrode employs a transparent electrode made from indium-zinc-oxide (IZO) that is capable of preventing damage and bending thereof. In a liquid crystal display device containing pixel electrodes, the transparent electrode is made from indium-zinc-oxide (IZO) having an amorphous structure so that it can be etched within a short period of time with a low concentration of etchant. Accordingly, it is possible to prevent damage and bending of the transparent electrode upon the patterning thereof.
    Type: Grant
    Filed: August 18, 2003
    Date of Patent: October 9, 2007
    Assignee: LG.Philips LCD Co., Ltd.
    Inventors: You Shin Ahn, Hu Kag Lee
  • Patent number: 7262434
    Abstract: A semiconductor device provided with a silicon carbide semiconductor substrate, and an ohmic metal layer joined to one surface of the silicon carbide semiconductor substrate in an ohmic contact and composed of a metal material whose silicide formation free energy and carbide formation free energy respectively take negative values. The ohmic metal layer is composed of, for example, a metal material such as molybdenum, titanium, chromium, manganese, zirconium, tantalum, or tungsten.
    Type: Grant
    Filed: March 27, 2003
    Date of Patent: August 28, 2007
    Assignee: Rohm Co., Ltd.
    Inventors: Yuji Okamura, Masashi Matsushita
  • Patent number: 7180094
    Abstract: Provided are a nitride-based light emitting device and a method of manufacturing the same. The nitride-based light emitting device has a structure in which at least an n-cladding layer, an active layer, and a p-cladding layer are sequentially formed on a substrate. The light emitting device further includes an ohmic contact layer composed of a zinc (Zn)-containing oxide containing a p-type dopant formed on the p-cladding layer. The method of manufacturing the nitride-based light emitting device includes forming an ohmic contact layer composed of Zn-containing oxide containing a p-type dopant on the p-cladding layer, the ohmic contact layer being made and annealing the resultant structure. The nitride-based light emitting device and manufacturing method provide excellent I–V characteristics by improving ohmic contact with a p-cladding layer while significantly enhancing light emission efficiency of the device due to high light transmittance of a transparent electrode.
    Type: Grant
    Filed: October 5, 2004
    Date of Patent: February 20, 2007
    Assignees: Samsung Electronics Co., Ltd., Gwangju Institute of Science and Technology
    Inventors: Tae-yeon Seong, Kyoung-kook Kim, June-o Song, Dong-seok Leem
  • Patent number: 7176537
    Abstract: A semiconductor device having a metal/metal silicide gate and a Schottky source/drain and a method of forming the same are provided. The semiconductor device includes a gate dielectric overlying a semiconductor substrate, a metal or metal silicide gate electrode having a work function of less than about 4.3 eV or greater than about 4.9 eV overlying the gate dielectric, a spacer having a thickness of less than about 100 ? on a side of the gate electrode, and a Schottky source/drain having a work function of less than about 4.3 eV or greater than about 4.9 eV wherein the Schottky source/drain region overlaps the gate electrode. The Schottky source/drain region preferably has a thickness of less than about 300 ?.
    Type: Grant
    Filed: May 23, 2005
    Date of Patent: February 13, 2007
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Chin Lee, Chung-Hu Ke, Min-Hwa Chi
  • Patent number: 7087834
    Abstract: An apparatus and method for solar energy production comprises a multi-layer solid-state structure including a photosensitive layer, a thin conductor, a charge separation layer, and a back ohmic conductor, wherein light absorption occurs in a photosensitive layer and the charge carriers produced thereby are transported through the thin conductor through the adjacent potential energy barrier. The open circuit voltage of the solar cell can be manipulated by choosing from among a wide selection of materials making up the thin conductor, the charge separation layer, and the back ohmic layer.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: August 8, 2006
    Assignee: Andrena, Inc.
    Inventor: Eric W. McFarland
  • Patent number: 7012314
    Abstract: A method of making a semiconductor device having a predetermined epitaxial region, such as an active region, with reduced defect density includes the steps of: (a) forming a dielectric cladding region on a major surface of a single crystal body of a first material; (b) forming a first opening that extends to a first depth into the cladding region; (c) forming a smaller second opening, within the first opening, that extends to a second depth greater than the first depth and that exposes an underlying portion of the major surface of the single crystal body; (d) epitaxially growing regions of a second semiconductor material in each of the openings and on the top of the cladding region; (e) controlling the dimensions of the second opening so that defects are confined to the epitaxial regions grown within the second opening and on top of the cladding region, a first predetermined region being located within the first opening and being essentially free of defects; (D planarizing the top of the device to remove all
    Type: Grant
    Filed: June 3, 2003
    Date of Patent: March 14, 2006
    Assignee: Agere Systems Inc.
    Inventors: Jeffrey Devin Bude, Malcolm Carroll, Clifford Alan King
  • Patent number: 6998690
    Abstract: A gallium nitride-based III-V Group compound semiconductor device has a gallium nitride-based III-V Group compound semiconductor layer provided over a substrate, and an ohmic electrode provided in contact with the semiconductor layer. The ohmic electrode is formed of a metallic material, and has been annealed.
    Type: Grant
    Filed: July 1, 2003
    Date of Patent: February 14, 2006
    Assignee: Nichia Corporation
    Inventors: Shuji Nakamura, Takao Yamada, Masayuki Senoh, Motokazu Yamada, Kanji Bando
  • Patent number: 6956163
    Abstract: An apparatus and method for solar energy production comprises a multi-layer solid-state structure including a photosensitive layer, a thin conductor, a charge separation layer, and a back ohmic conductor, wherein light absorption occurs in a photosensitive layer and the charge carriers produced thereby are transported through the thin conductor through the adjacent potential energy barrier. The open circuit voltage of the solar cell can be manipulated by choosing from among a wide selection of materials making up the thin conductor, the charge separation layer, and the back ohmic layer.
    Type: Grant
    Filed: August 20, 2003
    Date of Patent: October 18, 2005
    Assignee: Adrena, Inc.
    Inventor: Eric W. McFarland
  • Patent number: 6946717
    Abstract: A compound semiconductor device is comprising a compound semiconductor substrate (219) having a ground plane (205); an active element (201) disposed on the substrate; a passive element (211) disposed on the substrate and electrically coupled to the active element; and an insulating layer (202) adjacent the substrate and interposed between the passive device and ground surface such that there is no resistive ground path from the passive device to the ground surface.
    Type: Grant
    Filed: January 30, 2002
    Date of Patent: September 20, 2005
    Assignee: M/A-Com, Inc.
    Inventors: David Russell Hoag, Timothy Edward Boles, Daniel G. Curcio
  • Patent number: 6852615
    Abstract: A process and related product in which ohmic contacts are formed in High Electron Mobility Transistors (HEMTs) employing compound substrates such as gallium nitride. An improved device and an improvement to a process for fabrication of ohmic contacts to GaN/AlGaN HEMTs using a novel two step resist process to fabricate the ohmic contacts are described. This novel two-step process consists of depositing a plurality of layers having compounds of Group III V elements on a substrate; patterning and depositing a first photoresist on one of the layers; etching recessed areas into this layer; depositing ohmic metals on the recessed areas; removing the first photoresist; patterning and depositing a second photoresist, smaller in profile than the first photoresist, on the layer; depositing more ohmic metal on the layer allowing for complete coverage of the recessed areas; removing the second photoresist, and annealing the semiconductor structure.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: February 8, 2005
    Assignee: HRL Laboratories, LLC
    Inventors: Miroslav Micovic, Tahir Hussain, Paul Hashimoto, Janna Ruth Duvall
  • Patent number: 6831309
    Abstract: A unipolar photodiode and methods of making and using employ a Schottky contact as a cathode contact. The Schottky cathode contact is created directly on a carrier traveling or collector layer of the unipolar photodiode resulting in a simpler overall structure to use and make. The unipolar photodiode comprises a light absorption layer, the collector layer adjacent to the light absorption layer, the Schottky cathode contact in direct contact with the collector layer, and an anode contact either directly or indirectly interfaced to the light absorption layer. The light absorption layer has a doping concentration that is greater than a doping concentration of the collector layer. The light absorption layer has a band gap energy that is less than that of the collector layer. The light absorption layer and the collector layer may be of the same or opposite conduction type.
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: December 14, 2004
    Assignee: Agilent Technologies, Inc.
    Inventor: Kirk S. Giboney
  • Patent number: 6798034
    Abstract: A passive mechanism suppresses injection, into any active guard regions interposed between the edge of a photodiode array chip and the outer photodiode pixels or into the outer pixels themselves, of minority carrier current generated in the physically disrupted region at the edge of the semiconductor die created by cleaving, sawing or otherwise separating the chip from the remainder of the wafer on which the die was fabricated. A thin metallic layer covers all or part of the edge region, thereby creating a Schottky barrier. This barrier generates a depletion region in the adjacent semiconductor material. The depletion region inherently creates an energy band distribution which preferentially accelerates minority carriers generated or near the metal-semiconductor interface towards the metal, thereby suppressing collection of these carriers by any active regions of the guard structure or by the photodiode pixels.
    Type: Grant
    Filed: August 7, 2002
    Date of Patent: September 28, 2004
    Assignee: Diglrad Corporation
    Inventor: Lars S. Carlson
  • Publication number: 20040155311
    Abstract: The invention relates to an opto-electronic component for converting electromagnetic radiation into an intensity-dependent photocurrent, comprising a substrate (1) with a microelectronic circuit whose surface is provided with a first layer (7) which is electrically contacted thereto and made of amorphous silicon a-i:H or alloys thereof, and at least one other optically active layer (8) is disposed upstream from said first layer in the direction of incident light thereof (7). The invention also relates to the production thereof. The aim of the invention is to improve upon an opto-electronic component of tho above-mentioned variety in order to obtain high spectral sensitivity within the visible light range and, correspondingly, significantly reduce sensitivity to radiation in the infrared range without incurring any additional construction costs.
    Type: Application
    Filed: April 12, 2004
    Publication date: August 12, 2004
    Inventors: Peter Rieve, Jens Prima, Konstantin Seibel, Marcus Walder
  • Patent number: 6774449
    Abstract: The semiconductor device of the present invention includes: a gallium nitride (GaN) compound semiconductor layer; and a Schottky electrode formed on the GaN compound semiconductor layer, wherein the Schottky electrode contains silicon.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: August 10, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Katsunori Nishii, Yoshito Ikeda, Hiroyuki Masato, Kaoru Inoue
  • Patent number: 6774300
    Abstract: An apparatus and method for solar energy production comprises a multi-layer solid-state structure including a photosensitive layer, a thin conductor, a charge separation layer, and a back ohmic conductor, wherein light absorption occurs in a photosensitive layer and the charge carriers produced thereby are transported through the thin conductor through the adjacent potential energy barrier. The open circuit voltage of the solar cell can be manipulated by choosing from among a wide selection of materials making up the thin conductor, the charge separation layer, and the back ohmic layer.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: August 10, 2004
    Assignee: Adrena, Inc.
    Inventor: Eric W. McFarland