Geometric Configuration Of Junction (e.g., Fingers) Patents (Class 257/465)
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Patent number: 6538299Abstract: A semiconductor device (and method for forming the device) includes a silicon-on-insulator (SOI) wafer formed on a substrate surface. An isolation trench in the wafer surface surrounds alternating p-type trenches and n-type trenches and electrically isolates the device from the substrate, thereby allowing the device to be effectively utilized as a differential detector in an optoelectronic circuit.Type: GrantFiled: October 3, 2000Date of Patent: March 25, 2003Assignee: International Business Machines CorporationInventors: Young H. Kwark, Dan Moy, Mark B. Ritter, Dennis L. Rogers, Jeffrey J. Welser
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Patent number: 6531725Abstract: An active pixel sensor cell, and the process for forming the active pixel sensor cell, featuring a pinned photodiode structure, and a readout region, located in a region of the pinned photodiode structure, has been developed. The process features the formation of a N+ readout region, performed simultaneously with the formation of the N+ source/drain region of the reset transistor, however with the N+ readout region placed in an area to be used for the pinned photodiode structure. The pinned photodiode structure is next formed via formation of a lightly doped N type well region, used as the lower segment of the pinned photodiode structure, followed by the formation of P+ region, used as the top segment of the pinned photodiode structure, with the N+ readout region, surrounded by the P+ region.Type: GrantFiled: January 14, 2002Date of Patent: March 11, 2003Assignee: Taiwan Semiconductor Manufacturing CompanyInventors: Chi-Hsiang Lee, An Ming Chiang, Wei-Kun Yeh, Hua-Yu Yang
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Patent number: 6531752Abstract: A method of fabricating a stripe photodiode element, for an image sensor cell, has been developed. The stripe photodiode element is comprised of a narrow width, serpentine shaped, lightly doped N type region, in a P well region. The use of the serpentine shaped region results in increased photon collection area, when compared to counterparts fabricated using non-serpentine shaped patterns. In addition the use of the serpentine shaped N type regions allow both vertical, as well as horizontal depletion regions, to result, thus increasing the quantum efficiency of the photodiode element. The combination of narrow width, and a reduced dopant level, for the N type serpentine shaped region, result in a fully depleted photodiode element.Type: GrantFiled: September 20, 2001Date of Patent: March 11, 2003Assignee: Taiwan Semiconductor Manufacturing CompanyInventors: Dun-Nian Yaung, Shou-Gwo Wuu, Chien-Hsien Tseng
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Patent number: 6528717Abstract: Producing a photovoltaic panel, including forming holes in a first electrode plate, fitting, in the holes, photovoltaic elements, each having a P-N junction between a core and a shell, electrically connecting a first portion of the shell of each photovoltaic element to the first electrode plate, removing one second portion of the shell of each photovoltaic element located on both sides of the first portion of the shell, so that a third portion of the core of the each photovoltaic element that corresponds to the one second portion of the shell is exposed, and electrically connecting the third portion of the core of each photovoltaic element to a second electrode plate, wherein electrically connecting the first portion and electrically connecting the third portion includes soldering, a corresponding one of the first portion and the third portion to a corresponding one of the first electrode plate and the second electrode plate.Type: GrantFiled: March 11, 2002Date of Patent: March 4, 2003Assignee: Fuji Machine Mfg. Co., Ltd.Inventors: Koichi Asai, Yasuo Muto, Kazuya Suzuki
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Patent number: 6518494Abstract: A silicon structure having little solar light beam reflection, which is suitable for a solar battery. On the entire surface of a quartz substrate, Mo is deposited at a thickness of approximately 51 &mgr;m to form a lower electrode. On the entire surface of the lower electrode, a p type silicon structure having a thickness of 30 to 40 &mgr;m comprising an aggregate of a plurality of columnar silicon members mainly comprising silicon and having random orientations is formed via a film mainly comprising silicon, using Si2Cl6 mixed with BCl3. On the surface of the p type silicon structure, P is diffused by a thermal diffusion method using POCl3 to form an n type region at the periphery of the columnar silicon members. On the entire surface of the p type silicon structure, a transparent electrode comprising indium-tin oxide having a thickness of 30 to 40 &mgr;m is formed, and an upper electrode comprising Al having a thickness of approximately 1 &mgr;m is formed on the transparent electrode.Type: GrantFiled: August 22, 1996Date of Patent: February 11, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Munehiro Shibuya, Masatoshi Kitagawa, Yuuji Mukai, Akihisa Yoshida
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Patent number: 6512280Abstract: A light-sensing diode fabricated in a semiconductor substrate having a surface protected by an insulator, comprising a first region of one conductivity type in this substrate, a second region of the opposite conductivity type forming a junction with the first region in the substrate; this junction having a convoluted shape, providing two portions generally parallel to the surface, and a constricted intersection with the surface; and a gate for applying electrical bias across the junction, this gate positioned on the insulator such that it covers all portions of the junction intersection with the surface, thereby creating a gate-controlled photodiode.Type: GrantFiled: May 16, 2001Date of Patent: January 28, 2003Assignee: Texas Instruments IncorporatedInventors: Zhiliang J. Chen, Kuok Y. Ling, Hisashi Shichijo, Katsuo Komatsuzaki, Chin-Yu Tsai
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Patent number: 6506622Abstract: The present invention provides a photovoltaic device being capable of generating a large amount of current even with thin joined semiconductor layers, has a high photoelectric conversion efficiency and can be manufactured inexpensively at a low temperature together with a manufacturing method of the same, a photovoltaic device integrated with a building material and a power-generating apparatus. The photovoltaic device is formed by depositing joined semiconductor layers on a substrate, wherein a ratio of projected areas of regions on a surface of the joined semiconductor layers that have heights not smaller than a center value of concavities and convexities to a projected area of the entire surface of the joined semiconductor layers is higher than a ratio of projected areas of regions on the surface of the substrate that have heights not smaller than a center value of concavities and convexities on a surface of the substrate to a projected area of the entire surface of the substrate.Type: GrantFiled: November 3, 2000Date of Patent: January 14, 2003Assignee: Canon Kabushiki KaishaInventor: Atsushi Shiozaki
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Patent number: 6489658Abstract: The invention relates to a MOS transistor for a photo cell, comprising a semiconductor substrate on which a gate electrode, a drain electrode and a photosensitive source region are configured. An oxide layer is arranged between the gate electrode and the substrate, and in the active region of the MOS transistor this oxide layer is formed as thin oxide film while it is configured as thick oxide film in a passive region. The inventive transistor is distinguished by the provisions that the gate electrode comprises a closed annular section in the active region of the MOS transistor, and that either the drain electrode or the photosensitive source region is arranged within the annular section of the gate electrode so that current will only flow in the active region.Type: GrantFiled: June 28, 1999Date of Patent: December 3, 2002Assignee: Institut fur MikroelectronikInventors: Harald Richter, Bernd Höfflinger, Uwe Apel, Ulrich Seger
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Patent number: 6479316Abstract: A decal for use in forming a solar cell comprises an antireflective precursor material and a patterned electrically conductive material. The antireflective precursor material and the patterned electrically conductive material are disposed over a base material. The antireflective precursor material can be one or more layers of paste which form an antireflective coating upon being fired. A cover layer can be disposed over the antireflective precursor material and the electrically conductive material.Type: GrantFiled: July 1, 1999Date of Patent: November 12, 2002Assignee: Evergreen Solar, Inc.Inventors: Jack I. Hanoka, Brynley E. Lord, Mark T. Mrowka, Xinfa Ma
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Patent number: 6461947Abstract: To form an impurity diffusion layer on only one side of a semiconductor substrate at least one semiconductor substrate and at least one diffusion protecting plate are put close to each other and a first impurity diffusion is perfomed on them, or at least one semiconductor substrate and at least one diffusion protecting plate are put close to each other and a first impurity diffusion is performed on them and then the semiconductor substrate and the diffusion protecting plate are arranged such that those sides on which the impurity diffusion has been performed face each other and a second impurity diffusion is performed. The diffusion protecting plate may be replaced by a semiconductor substrate. The first and second impurity diffusions may be performed using an impurity of the same conductivity type.Type: GrantFiled: September 7, 2000Date of Patent: October 8, 2002Assignee: Hitachi, Ltd.Inventors: Tsuyoshi Uematsu, Yoshiaki Yazawa, Hiroyuki Ohtsuka, Ken Tsutsui
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Patent number: 6459109Abstract: A semiconductor position sensor functions as a PSD or as a two-part split PD or the like, based on control of disconnection/connection of basic, electroconductive strips by controlling a voltage of gate electrode. This semiconductor position sensor does not require a PD separate from the PSD, whereby the device itself can be constructed in compact size. Further, since all signal light can impinge on a photosensitive area, detection sensitivity can be improved.Type: GrantFiled: December 28, 2000Date of Patent: October 1, 2002Assignee: Hamamatsu Photonics K.K.Inventors: Tatsuo Takeshita, Masayuki Sakakibara, Kouji Noda
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Patent number: 6455766Abstract: A device, having circuits formed thereon, comprises a circuit including a frequency generator for generating a detectable radio frequency energy when powered and a power generator, coupled to the frequency generator, for generating power when exposed to light.Type: GrantFiled: April 11, 2001Date of Patent: September 24, 2002Assignee: International Business Machines CorporationInventors: Donald J. Cook, Edward J. Nowak, Minh H. Tong
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Patent number: 6452086Abstract: The invention relates to a production method for a solar cell and to the solar cell itself which comprises an integrated bypass diode on the side facing away from the incidence of light and which can be produced in a simple manner by diffusion. A one-piece electric conductor serves to connect two successive solar cells in series and simultaneously effects the contacting of the corresponding bypass diode.Type: GrantFiled: March 22, 2001Date of Patent: September 17, 2002Assignee: Astrium GmbHInventor: Rainer Müller
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Patent number: 6441297Abstract: The invention relates to a solar cell arrangement consisting of series-connected solar subcells. Said solar subcells consist of a semiconductor wafer which forms a common base material for all of the solar subcells and wherein a number of recesses are provided for delimiting the individual, series-connected solar subcells. The invention is characterised in that at least some of the recesses extend from the top surface of the semiconductor wafer, through the wafer itself to the bottom surface and in that at most some bridge segments are left in continuation of the recesses as far as the wafer edge, to mechanically interconnect the solar subcells.Type: GrantFiled: October 23, 2000Date of Patent: August 27, 2002Inventors: Steffen Keller, Peter Fath, Gerhard Willeke
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Publication number: 20020105038Abstract: The invention relates to a MOS transistor for a photo cell, comprising a semiconductor substrate on which a gate electrode, a drain electrode and a photosensitive source region are configured. An oxide layer is arranged between the gate electrode and the substrate, and in the active region of the MOS transistor this oxide layer is formed as thin oxide film while it is configured as thick oxide film in a passive region.Type: ApplicationFiled: June 28, 1999Publication date: August 8, 2002Inventors: HARALD RICHTER, BERND HOFFLINGER, UWE APEL, ULRICH SEGER
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Patent number: 6403877Abstract: A space solar cell includes a back surface electrode formed on a back surface opposite to a light receiving surface of a semiconductor substrate, and a dielectric layer formed between the back surface electrode and the semiconductor substrate. In the space solar cell, a plurality of openings are formed in the dielectric layer for establishing an electrical connection between the back surface electrode and the semiconductor substrate, and a ratio of an area occupied by the openings relative to an area of the back surface is within a range from 0.25% to 30%.Type: GrantFiled: February 21, 2001Date of Patent: June 11, 2002Assignee: Sharp Kabushiki KaishaInventor: Tomoji Katsu
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Patent number: 6399412Abstract: Producing a photovoltaic panel, including forming holes in a first electrode plate, fitting, in the holes, photovoltaic elements, each having a P-N junction between a core and a shell, electrically connecting a first portion of the shell of each photovoltaic element to the first electrode plate, removing one second portion of the shell of each photovoltaic element located on both sides of the first portion of the shell, so that a third portion of the core of the each photovoltaic element that corresponds to the one second portion of the shell is exposed, and electrically connecting the third portion of the core of each photovoltaic element to a second electrode plate, wherein electrically connecting the first portion and electrically connecting the third portion includes soldering, a corresponding one of the first portion and the third portion to a corresponding one of the first electrode plate and the second electrode plate.Type: GrantFiled: November 14, 2000Date of Patent: June 4, 2002Assignee: Fuji Machine Mfg. Co., Ltd.Inventors: Koichi Asai, Yasuo Muto, Kazuya Suzuki
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Patent number: 6385430Abstract: Position sensors having an active area are assembled into an array in which the electrodes of adjacent sensors are offset and interleaved so that the electrodes are adjacent an active area, thereby avoiding dead spots. The position sensor array is position adjacent to the path of an object opposite to a source of light. As the object passes it alters the distribution of light on the position sensor array that generates signals indicative of the objects position in response to the changes in impinging light.Type: GrantFiled: February 7, 2001Date of Patent: May 7, 2002Assignee: Xerox CorporationInventors: Warren B. Jackson, David Kalman Biegelsen
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Patent number: 6384317Abstract: The solar cell in the semiconductor substrate includes at least a radiation receiving front surface and a second surface. The substrate includes a first region of one type of conductivity and a second region of the opposite conductivity type with at least a first part located adjacent to the front surface and a second part located adjacent to the second surface. The front surface includes conductive contacts to the second region and the second surface has separated contacts to the first region and to the second region. The contacts to the second region at the second surface are connected to the contacts at the front surface through a limited number of vias.Type: GrantFiled: April 3, 2000Date of Patent: May 7, 2002Assignee: IMEC vzwInventors: Emmanuel Van Kerschaver, Jozef Szlufcik, Roland Einhaus, Johan Nijs
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Patent number: 6380604Abstract: An optical detector includes a pyramidal etch-pit formed in a layered semiconductor structure. A channel layer is provided on facets of the pyramidal etch-pit and a hole-accumulation layer, sandwiched by a pair of barrier layers is formed on the channel layer. Further, electrodes are provided on a top surface and a bottom surface of the layered semiconductor structure. An optical window is provided so as to introduce an optical beam to the channel layer or the hole-accumulation layer.Type: GrantFiled: March 28, 2001Date of Patent: April 30, 2002Assignee: Fujitsu LimitedInventor: Masashi Shima
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Patent number: 6380568Abstract: A CMOS image sensor containing a plurality of unit pixels, each unit pixel having a light sensing region and a peripheral circuit region, includes: a semiconductor substrate of a first conductive type; a transistor formed on the peripheral circuit region of the semiconductor substrate, wherein the transistor has a gate oxide layer and a gate electrode formed on the gate oxide layer; spacers formed on sidewalls of the gate oxide layer and the gate electrode, wherein one spacer are formed on the light sensing region; a first doping region of a second conductive type formed on the light sensing region, wherein the first doping region is extended to an edge of the gate electrode; and a second doping region of the first conductive type formed on the first doping region, wherein the second doping region is extended to an edge of a spacer formed on the light sensing region.Type: GrantFiled: June 28, 2000Date of Patent: April 30, 2002Assignee: Hyundai Electronics Industries Co., Ltd.Inventors: Jae-Dong Lee, Sang-Joo Lee
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Patent number: 6380603Abstract: A semiconductor device includes: a photosensitive section essentially composed of a PN junction between a semiconductor multilayer structure of the first conductivity type and a first semiconductor layer of the second conductivity type; and a partitioning portion for splitting the photosensitive section into a plurality of regions. The semiconductor multilayer structure of the first conductivity type includes: a semiconductor substrate of the first conductivity type; a first semiconductor layer of the first conductivity type; and a second semiconductor layer of the first conductivity type. The partitioning portion includes a third semiconductor layer of the first conductivity type extending from the first semiconductor layer of the second conductivity type so as to reach the second semiconductor layer of the first conductivity type.Type: GrantFiled: November 7, 2000Date of Patent: April 30, 2002Assignee: Sharp Kabushiki KaishaInventors: Takahiro Takimoto, Toshihiko Fukushima, Isamu Ohkubo, Makoto Hosokawa, Masaru Kubo
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Patent number: 6362021Abstract: A polycrystalline film of silicon including silicon grains having an aspect ratio, d/t, of more than 1:1, wherein “d” is the grain diameter and “t” is the grain thickness. The polycrystalline film of silicon can be used to form an electronic device, such as a monolithically integrated solar cell having ohmic contacts formed on opposed surfaces or on the same surface of the film. A plurality of solar cells can be monolithically integrated to provide a solar cell module that includes an electrically insulating substrate and at least two solar cells disposed on the substrate in physical isolation from one another. Methods for manufacturing the film, solar cell and solar cell module are also disclosed. The simplified structure and method allow for substantial cost reduction on a mass-production scale, at least in part due to the high aspect ratio silicon grains in the film.Type: GrantFiled: February 2, 2001Date of Patent: March 26, 2002Assignee: AstroPower, Inc.Inventors: David H. Ford, Allen M. Barnett, Robert B. Hall, James A. Rand
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Patent number: 6355873Abstract: A spherical shaped solar diode having an n-type substrate surrounded by a p-type layer of semiconductor material is disclosed. In addition, a plurality of hetero-junction super lattice structures are formed surrounding the p-type layer. The plurality of hetero-junction super lattice structures include alternating layers of Si and SeBeTe. The plurality of hetero-junction super lattice structures adapt the diode to convert higher energy light (as compared to 1.1eV light) to electrical energy. The diodes are formed into a solar panel assembly. The panel assembly includes a wire mesh to secure the diodes and electrically contact one electrode of each diode. A dimpled sheet is also used for securing the diodes and electrically contacting the other electrode of each diode. The diodes are positioned adjacent to the dimpled sheet so that when light is applied to the solar panel assembly, the diodes are exposed to the light on a majority of each diode's surface.Type: GrantFiled: June 21, 2000Date of Patent: March 12, 2002Assignee: Ball Semiconductor, Inc.Inventor: Akira Ishikawa
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Patent number: 6340826Abstract: A light emitting field effect transistor is proposed with a new extended drain region. The extension is doped with erbium or other rare-earth atoms. The erbium provides light-emitting centers in the indirect bandgap silicon substrate to enhance the radiative process. When a drain voltage is applied to create a high enough electric, energetic electrons entering this region interact with Er to emit infrared light.Type: GrantFiled: March 27, 2000Date of Patent: January 22, 2002Inventor: Agisilaos Iliadis
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Patent number: 6307242Abstract: A semiconductor photo-detector, which has a high quantum efficiency due to high coupling with an incident beam and operates at higher frequency due to a reduced area of PN junction. In a semiconductor photo-detector of the present invention, reflection layers are deposited on both of the parallel surfaces of a square-shaped wave-guide, while light absorption layers are deposited on at least another pair of parallel surfaces which is one of the parallel pairs of remaining surfaces.Type: GrantFiled: February 18, 1999Date of Patent: October 23, 2001Assignee: NEC CorporationInventor: Mitsuhiro Sugiyama
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Patent number: 6294822Abstract: The present invention discloses a small spherical solar cell SS (spherical semiconductor) and the manufacturing method for the same, comprising: a spherical core 1; a reflective film 2 formed on the surface of core 1; a semiconductor thin film layer (p type polycrystalline silicon thin film 4a, n+ diffusion layer 7) which is approximately spherical and is formed on the surface of reflective film 2; a n+p junction 8 which is formed on semiconductor thin film layer; passivation film 9; and a surface protective film 10 of titanium dioxide; a pair of electrodes 11a, 11b connected to both sides of n+p junction 8. Other than spherical solar cell SS, the following are also disclosed: a spherical crystal manufacturing device; 2 types of spherical solar cells; 2 types of spherical photocatalytic elements; a spherical light emitting element which emits visible blue light; 2 types of spherical semiconductor device materials.Type: GrantFiled: June 10, 1999Date of Patent: September 25, 2001Inventor: Josuke Nakata
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Patent number: 6271553Abstract: The surface of a semiconductor wafer comprises a silicon substrate and a well positioned in a predetermined area just under the surface of the substrate. A photo diode comprises a MOS transistor positioned on the surface of the well, a photo sensor positioned beside the well and electrically connected to the MOS transistor, and an insulation layer positioned on the surface of the substrate surrounding the photo sensor. The photo sensor comprises a first doped region positioned on the surface of the photo sensor, and a second doped region positioned between the first doped region and the insulation layer, a portion of the second doped region at least partially under the insulation layer. The dopant density of the second doped region is less than that of the first doped region, and the second doped region functions to reduce the electrical field around the first doped region so as to reduce the leakage current.Type: GrantFiled: November 29, 1999Date of Patent: August 7, 2001Assignee: United Microelectronics Corp.Inventor: Jui-Hsiang Pan
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Publication number: 20010008295Abstract: This invention provides a photovoltaic semiconductor device of high efficiency capable of maintaining good interface characteristics of an amorphous semiconductor layer and a transparent electrode by eliminating damage caused by plasma of a plasma doping layer formed by doping impurity to the i-type amorphous semiconductor layer. The i-type amorphous semiconductor layer substantially not containing impurity for reducing electric resistance on a textured surface of an n-type single crystalline substrate. Then, the plasma doping layer is formed by exposing the n-type single crystalline substrate with the amorphous semiconductor layer formed thereon in an atmosphere of excited gas containing p-type impurity and diffusing the impurity to the amorphous semiconductor layer. A p-type amorphous semiconductor thin film layer containing p-type impurity is formed on the plasma doping layer by chemical vapor deposition and a transparent electrode 5 is formed on the p-type amorphous semiconductor thin film.Type: ApplicationFiled: December 27, 2000Publication date: July 19, 2001Applicant: SANYO ELECTRIC CO., LTDInventors: Hitoshi Sakata, Yasuo Kadonaga
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Patent number: 6252251Abstract: A raised photodetector constructed to define an open channel extending between opposite edges of the photodetector and dimensioned for permitting light from laser to pass therethrough. The photodetector has a light-collecting region disposed in an outward facing wall recessed within the channel for collecting light from the laser.Type: GrantFiled: June 9, 1999Date of Patent: June 26, 2001Assignee: Lucent Technologies Inc.Inventors: Richard Bendicks Bylsma, Dominic Paul Rinaudo, Rory Keene Schlenker, Walter Jeffrey Shakespeare
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Patent number: 6249033Abstract: An apparatus for detecting energy and point of incidence of an ionizing event comprising a semiconductor layer with a first type of conductivity, in which at least one first doped region with the first type of conductivity and a corresponding plurality of second doped regions with a second type of conductivity associated to said at least one first doped region are formed on a first surface of said layer, said at least first doped region and said corresponding plurality of second doped regions defining a respective drift path for charge carriers with the first type of conductivity, and at least one third doped region with the second type of conductivity is formed on a second surface of said layer, and means for biasing said second doped regions and said third doped region which is capable of reversely biasing the junctions between the second doped regions and the semiconductor layer and between the third doped region and the semiconductor layer so as to deplete the semiconductor layer.Type: GrantFiled: February 27, 1998Date of Patent: June 19, 2001Assignees: Istituto Nazionale di Fisica Nucleare, Max-Planck-Gesellschaft zur Förderung der Wissenschaften e.V.Inventors: Andrea Castoldi, Emilio Gatti, Chiara Guazzoni, Antonio Longoni, Pavel Rehak, Lothar Strüder
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Patent number: 6246099Abstract: The photosensitive semiconductor element according to the invention comprises a substrate 1, an intermediate layer 2 and an outer layer 5, wherein the intermediate layer 2 is at least partially embedded within the substrate 1 and the outer layer 5 is at least partially embedded within the intermediate layer 2 and the intermediate layer 2 and the outer layer 5 form a photosensitive region 22 for the generation of a light-dependent signal R such as for example a photocurrent. In this arrangement the outer layer 5 is divided into mutually spaced regions 11 which are separated by intermediate regions 13 of the intermediate layer 2. The spaced regions 11 of the outer layer then serve for example as the anode 30 of the photosensitive semiconductor element which can be connected to a suitable electronic evaluation arrangement.Type: GrantFiled: September 9, 1999Date of Patent: June 12, 2001Assignee: Electrowatt Technology Innovation AGInventors: Alexandre Pauchard, Radivoje Popovic, Robert Racz
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Patent number: 6239355Abstract: A solid state photovoltaic device is formed on a substrate and includes a photoactive channel layer interposed between a pair of electrodes. The photoactive channel layer includes a first material which absorbs light and operates as a hole carrier. Within the first material are nanoparticles of a second material which operate as electron carriers. The nanoparticles are distributed within the photoactive channel layer such that, predominantly, the charge path between the two electrodes at any given location includes only a single nanocrystal. Because a majority of electrons are channeled to the electrodes via single nanocrystal conductive paths, the resulting architecture is referred to as a channel architecture.Type: GrantFiled: October 8, 1999Date of Patent: May 29, 2001Assignee: The Trustees of Columbia University in the City of New YorkInventor: Joshua S. Salafsky
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Patent number: 6232547Abstract: In a method of manufacturing a solar cell, a phase A is deposited in the form of stacks on an electrically conductive substrate, wherein the stacks are covalently and electrically interconnected and also connected to the substrate, and any spaces between the stacks are filled with a phase B, which is electrically connected to a counter electrode, wherein the phases A and B are so selected that they form a photovoltaic active transition structure or an injection contact. The invention also resides in a solar cell made in accordance with this method.Type: GrantFiled: March 20, 2000Date of Patent: May 15, 2001Assignee: Forschungszentrum Jülich GmbHInventors: Dieter Meissner, Klaus Kohrs
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Patent number: 6232626Abstract: A trench photosensor for use in a CMOS imager having an improved charge capacity. The trench photosensor may be either a photogate or photodiode structure. The trench shape of the photosensor provides the photosensitive element with an increased surface area compared to a flat photosensor occupying a comparable area on a substrate. The trench photosensor also exhibits a higher charge capacity, improved dynamic range, and a better signal-to-noise ratio. Also disclosed are processes for forming the trench photosensor.Type: GrantFiled: February 1, 1999Date of Patent: May 15, 2001Assignee: Micron Technology, Inc.Inventor: Howard E. Rhodes
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Patent number: 6229084Abstract: A space solar cell includes a back surface electrode formed on a back surface opposite to a light receiving surface of a semiconductor substrate, and a dielectric layer formed between the back surface electrode and the semiconductor substrate. In the space solar cell, a plurality of openings are formed in the dielectric layer for establishing an electrical connection between the back surface electrode and the semiconductor substrate, and a ratio of an area occupied by the openings relative to an area of the back surface is within a range from 0.25% to 30%.Type: GrantFiled: September 27, 1999Date of Patent: May 8, 2001Assignee: Sharp Kabushiki KaishaInventor: Tomoji Katsu
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Patent number: 6218719Abstract: An anti-reflective coating having a composite layer of silicon nitride and silicon dioxide may be formed over the entire photosensitive region of the photodetector to minimize the amount of reflection. The composite layer comprises a silicon nitride layer and a dielectric layer contiguous to the silicon nitride layer. The anti-reflective coating may be formed in a CMOS process for fabricating the PN junction in the photodiode and CMOS devices for amplifying the photodetector signal, where the polysilicon gate layer is used as a etch stop. The P+ or N+ material in the PN junction of the photodiode has a distributed design where two portions of the region are separated by a distance in the range of Xd to 2Xd, where Xd is the one-sided junction depletion width, to enhance the electric field and to reduce the distance traveled by the carriers for enhancing bandwidth. A heavily doped region of the opposite type may be added between the two portions to further enhance the electric field.Type: GrantFiled: January 19, 1999Date of Patent: April 17, 2001Assignee: Capella Microsystems, Inc.Inventor: Koon Wing Tsang
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Patent number: 6211455Abstract: A polycrystalline film of silicon including silicon grains having an aspect ratio, d/t, of more than 1:1, wherein “d” is the grain diameter and “t” is the grain thickness. The polycrystalline film of silicon can be used to form an electronic device, such as a monolithically integrated solar cell having ohmic contacts formed on opposed surfaces or on the same surface of the film. A plurality of solar cells can be monolithically integrated to provide a solar cell module that includes an electrically insulating substrate and at least two solar cells disposed on the substrate in physical isolation from one another. Methods for manufacturing the film, solar cell and solar cell module are also disclosed. The simplified structure and method allow for substantial cost reduction on a mass-production scale, at least in part due to the high aspect ratio silicon grains in the film.Type: GrantFiled: July 1, 1999Date of Patent: April 3, 2001Assignee: AstropowerInventors: David H. Ford, Allen M. Barnett, Robert B. Hall, James A. Rand
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Patent number: 6172370Abstract: An X-ray imaging array is described together with a method for its manufacture. The array is defined by a set of PN junctions in a silicon wafer that extend all the way through between the two surfaces of the wafer. The PN junctions are formed using neutron transmutation doping that is applied to P-type silicon through a mask, resulting in an array of N-type regions (that act as pixels) in a sea of P-type material. Through suitable placement of the biassing electrodes, a space charge region is formed that is narrower at the top surface, where X-rays enter the device, and wider at the lower surface. This ensures that most of the secondary electrons, generated by the X-ray as it passes through the wafer, get collected at the lower surface where they are passed to a charge readout circuit.Type: GrantFiled: December 28, 1999Date of Patent: January 9, 2001Assignee: Industrial Technology Research InstituteInventors: Chungpin Liao, Jen-Chau Wu
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Patent number: 6147372Abstract: Device layouts are described which increase the photon current of a metal oxide semiconductor image sensor. The metal oxide semiconductor can be NMOS, PMOS, or CMOS. The key part of the photon current of the image sensors comes from the depletion region at the PN junction between the drain region and the substrate material. The layouts used significantly increase the area of this depletion region illuminated by a stream of photons. The layouts have a drain region which takes the shape of a number of parallel fingers perpendicular to the gate electrode, a number of parallel fingers parallel to the gate electrode, or a spiral. The drain regions of these layouts significantly increase the area of the drain depletion region illuminated by a stream of electrons.Type: GrantFiled: February 8, 1999Date of Patent: November 14, 2000Assignee: Taiwan Semiconductor Manufacturing CompanyInventors: Hua-Yu Yang, Chih-Heng Shen, Wen-Cheng Chang
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Patent number: 6069394Abstract: A sapphire substrate, a buffer layer of undoped GaN and a compound semiconductor crystal layer successively formed on the sapphire substrate together form a substrate of a light emitting diode. A first cladding layer of n-type GaN, an active layer of undoped In.sub.0.2 Ga.sub.0.8 N and a second cladding layer successively formed on the compound semiconductor crystal layer together form a device structure of the light emitting diode. On the second cladding layer, a p-type electrode is formed, and on the first cladding layer, an n-type electrode is formed. In a part of the sapphire substrate opposing the p-type electrode, a recess having a trapezoidal section is formed, so that the thickness of an upper portion of the sapphire substrate above the recess can be substantially equal to or smaller than the thickness of the compound semiconductor crystal layer.Type: GrantFiled: April 8, 1998Date of Patent: May 30, 2000Assignee: Matsushita Electronics CorporationInventors: Tadao Hashimoto, Osamu Imafuji, Masaaki Yuri, Masahiro Ishida
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Patent number: 6040592Abstract: An image sensor having a well-to-substrate diode as the photodetector. In a preferred embodiment, a modern salicided (CMOS) process is utilized to manufacture the image sensor. The field oxide region above the diode junction is transparent to visible light, thus allowing the photodiode competitive quantum efficiency as compared to devices having source/drain diffusion-to-substrate photodiodes fabricated on a non-salicided process. The photodiode can be integrated as part of a sensor array with digital circuitry using a relatively unmodified digital CMOS process. Furthermore, the structure allows the optical properties of the photodiode to be engineered by modifying the well without deleterious effects, to approximate a first order, on the characteristics of a FET built in another identical well.Type: GrantFiled: June 12, 1997Date of Patent: March 21, 2000Assignee: Intel CorporationInventors: Bart McDaniel, Mark A. Beiley, Lawrence T. Clark, Eric J. Hoffman, Edward J. Bawolek
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Patent number: 6038060Abstract: An optical antenna collects, modifies and emits energy at light wavelengths. Linear conductors sized to correspond to the light wavelengths are used. Nonlinear junctions of small dimension are used to rectify an alternating waveform induced upon the conductors by the lightwave electromagnetic energy. The optical antenna and junctions are effective to produce harmonic energy at light wavelengths. The linear conductors may be comprised of carbon nanotubes that are attached to a substrate material, which may then be connected to an electrical port.Type: GrantFiled: December 11, 1997Date of Patent: March 14, 2000Inventor: Robert Joseph Crowley
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Patent number: 6034321Abstract: A dot-junction photovoltaic cell using high absorption semi-conductors increases photovoltaic conversion performance of direct band gap semi-conductors by utilizing dot-junction cell geometry. This geometry is applied to highly absorbing materials, including In.sub.x-1 Ga.sub.x As. The photovoltaic cell configured to be separated into a thin active region and a thick, inactive substrate, which serves as a mechanical support.Type: GrantFiled: March 24, 1998Date of Patent: March 7, 2000Assignee: Essential Research, Inc.Inventor: Phillip P. Jenkins
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Patent number: 6023020Abstract: A solar cell utilizing a chalcopyrite semiconductor and reducing the density of defects on the junction interface of pn junctions is provided. This solar cell includes a substrate, a back electrode formed on the substrate, a p-type chalcopyrite semiconductor thin film formed on the back electrode, an n-type semiconductor thin film formed so as to constitute a pn junction with the p-type chalcopyrite semiconductor thin film, and a transparent electrode formed on the n-type semiconductor thin film. A material having a higher resistivity than the p-type chalcopyrite semiconductor is formed between the p-type chalcopyrite semiconductor thin film and the n-type semiconductor thin film. A thin film made of this material may be formed by deposition from a solution. For example, CuInS.sub.2 is formed on the surface of a p-type chalcopyrite based semiconductor such as CuInSe.sub.Type: GrantFiled: October 14, 1997Date of Patent: February 8, 2000Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Mikihiko Nishitani, Takayuki Negami, Naoki Kohara, Takahiro Wada, Yasuhiro Hashimoto
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Patent number: 5998851Abstract: An optical waveguide type photodiode has a plurality of semiconductor layers formed one upon another on a semiconductor substrate and including an optical absorption layer sandwiched between a pair of optical confinement layers for guiding incident light in parallel with the semiconductor layers, wherein a light absorption quantity per unit length of an optical waveguide area constituted by the optical absorption layer is substantially constant throughout the entire area thereof. Specifically, the optical confinement factor .GAMMA.(x) of the optical waveguide area is set so as to increase with guided distance x of light. Preferably, a device structure is employed in which the thickness d(x) of the optical absorption layer increases with the guided distance x of light.Type: GrantFiled: December 1, 1997Date of Patent: December 7, 1999Assignee: The Furukawa Electric Co., Ltd.Inventor: Kazuaki Nishikata
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Patent number: 5986206Abstract: Polymer based solar cells incorporate nanoscale carbon particles as electron acceptors. The nanoscale carbon particles can be appropriate carbon blacks, especially modified laser black. Conducting polymers are used in the solar cells as electron donors upon absorption of light. Preferred solar cell structures involve corrugation of the donor/acceptor composite material such that increased amounts of electricity can be produced for a given overall area of the solar cell.Type: GrantFiled: December 10, 1997Date of Patent: November 16, 1999Assignee: NanoGram CorporationInventors: Nobuyuki Kambe, Peter S. Dardi
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Patent number: 5969399Abstract: A high gain photodetector requiring a substantially silicon area than prior art photodetectors having the same gain. The photodetector includes a light converter for converting a light signal to a current; and a first vertical transistor. The first vertical transistor includes a first well in a semiconductor substrate, the first well including a diffusion region, the semiconductor substrate and the diffusion having a first type of doping and the first well having a second type of doping. The first type of doping is either P-type or N-type, and the second type of doping is the other of the P-type or N-type doping. The light converter is connected to the first well so as to forward bias the vertical transistor thereby causing a current to flow between the diffusion region in the first well and the substrate. Additional amplification of the photocurrent from the light converter can be provided by including a second vertical transistor.Type: GrantFiled: May 19, 1998Date of Patent: October 19, 1999Assignee: Hewlett-Packard CompanyInventor: Frederick A. Perner
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Patent number: 5961742Abstract: For a converging solar cell element capable of preventing excessive concentration of converged sunlight to one point without lowering the degree of light convergence, a p+ layer 14 and an n+ layer 12 are formed on the rear surface of a silicon substrate; a positive pole 16 and a negative pole 18 are formed in response to the respective layers; and, on the front surface side, a light receiving surface 24 is formed with a bank portion 28 which enhances intensity in the surrounding area. In the central portion of the light receiving surface 24, a projected portion 26 is formed, which scatters converged sunlight and prevents the concentration of converged sunlight to one point.Type: GrantFiled: October 8, 1997Date of Patent: October 5, 1999Assignee: Toyota Jidosha Kabushiki KaishaInventors: Kyoichi Tange, Tomonori Nagashima
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Patent number: 5861655Abstract: A photoelectric conversion apparatus has an element separation structure that is adequate as to crosstalk between pixels and excellent in FPN characteristics. The photoelectric conversion apparatus comprises a semiconductor substrate of a first conduction type, a plurality of first semiconductor regions formed in a surface of the semiconductor substrate and having the opposite conduction type to that of the substrate, a second semiconductor region having the same conduction type as the first semiconductor regions and disposed between the plurality of first semiconductor regions thus formed, and a third semiconductor region disposed between the first and second semiconductor regions having the first conduction type, and having an impurity concentration higher than that of the semiconductor substrate.Type: GrantFiled: January 16, 1997Date of Patent: January 19, 1999Assignee: Canon Kabushiki KaishaInventors: Hiraku Kozuka, Shigetoshi Sugawa