Abstract: A semiconductor apparatus examination method includes a step of detecting light from a plurality of positions in a semiconductor apparatus (D) and acquiring a waveform corresponding to each of the plurality of positions, a step of extracting a waveform corresponding to a specific timing from the waveform corresponding to each of the plurality of positions and generating an image corresponding to the specific timing based on the extracted waveform, and a step of extracting a feature point based on a brightness distribution correlation value in the image corresponding to the specific timing and identifying a position of a drive element in the semiconductor apparatus based on the feature point.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a photodetector and methods of manufacture. The structure includes: a photodetector; and a semiconductor material on the photodetector, the semiconductor material comprising a first dopant type, a second dopant type and intrinsic semiconductor material separating the first dopant type from the second dopant type.

Abstract: A method for triggering switches in a defined order comprises providing two or more PCSS devices and a compatible optical trigger; projecting a beam from the optical trigger; splitting the optical beam into two or more paths toward the two or more PCSS devices, wherein each of the two or more paths has a different length such that each of the two or more PCSS devices are triggered with defined time differentials. Each of the defined path lengths may be determined with the speed of light from the optical trigger along the two or more paths in order to achieve the desired switch-timing differential. The optical path consists of at least one of an optical fiber, a mirror arrangement, and a lens arrangement. Path lengths may be controlled by different fiber lengths, and transmitting a beam through a solid having a higher index of refraction than other beam path(s).

Abstract: In a light detection device 1 the plurality of pad electrodes are arranged on the semiconductor substrate. Each of the plurality of wires is connected to the pad electrode corresponding thereto. A stitch bond of a corresponding wire is formed on each pad electrode. A distance between each pad electrode and a cell corresponding to the pad electrode is smaller than a distance between the pad electrodes connected to mutually different cells of the cells. The plurality of pad electrodes are arranged in a first region and a second region that are spaced apart from each other with a light receiving region interposed therebetween. The pad electrode corresponding to a cell is arranged in the first region. The pad electrode corresponding to a cell is arranged in the second region.

Abstract: A spherical flip-chip micro-LED, a method for manufacturing the spherical flip-chip micro-LED, and a display panel are provided. The spherical flip-chip micro-LED includes a light-emitting body, a supporting body, a first electrode, a second electrode, and an insulating protective layer. The supporting body is transparent. The first electrode and the second electrode are electrically coupled with the light-emitting body. The insulating protective layer covers the light-emitting body. The light-emitting body, the supporting body, and the insulating protective layer form a spherical structure.

Abstract: A process for fabricating a substrate for a radiofrequency device by joining a piezoelectric layer to a carrier substrate by way of an electrically insulating layer, the piezoelectric layer having a rough surface at its interface with the electrically insulating layer, the process being characterized in that it comprises the following steps: —providing a piezoelectric substrate having a rough surface for reflecting a radiofrequency wave, —depositing a dielectric layer on the rough surface of the piezoelectric substrate, —providing a carrier substrate, —depositing a photo-polymerizable adhesive layer on the carrier substrate, —bonding the piezoelectric substrate to the carrier substrate by way of the dielectric layer and of the adhesive layer, in order to form an assembled substrate, —irradiating the assembled substrate with a light flux in order to polymerize the adhesive layer, the adhesive layer and the dielectric layer together forming the electrically insulating layer.

Abstract: A photovoltaic cell includes a germanium-containing well embedded in a single crystalline silicon substrate and extending to a proximal horizontal surface of the single crystalline silicon substrate, wherein germanium-containing well includes germanium at an atomic percentage greater than 50%. A silicon-containing capping structure is located on a top surface of the germanium-containing well and includes silicon at an atomic percentage greater than 42%. The silicon-containing capping structure prevents oxidation of the germanium-containing well. A photovoltaic junction may be formed within, or across, the trench by implanting dopants of a first conductivity type and dopants of a second conductivity type.

Abstract: In some embodiments, a semiconductor device is provided. The semiconductor device includes an epitaxial structure having a group IV chemical element disposed in a semiconductor substrate, where the epitaxial structure extends into the semiconductor substrate from a first side of the semiconductor substrate. A photodetector is at least partially arranged in the epitaxial structure. A first capping structure having a first capping structure chemical element that is different than the first group IV chemical element covers the epitaxial structure on the first side of the semiconductor substrate. A second capping structure is arranged between the first capping structure and the epitaxial structure, where the second capping structure includes the group IV chemical element and the first capping structure chemical element.

Abstract: The present disclosure provides a photo sensing device including a substrate, including a silicon layer at a front surface, a photosensitive member extending into and at least partially surrounded by the silicon layer, wherein the silicon layer includes a first doped region adjacent to a first side of the photosensitive member, wherein the first doped region has a first conductivity type, and a second doped region adjacent to a second side of the photosensitive member opposite to the first side, wherein the second doped region has a second conductivity type different from the first conductivity type, and a composite layer disposed between the photosensitive member and the silicon layer and surrounding the photosensitive member, and a portion of the composite layer proximal to the first doped region is doped with a dopant having the first conductivity type.

Abstract: A light receiving element (1) according to an embodiment of the present disclosure includes: a semiconductor layer including a compound semiconductor material; a first impurity diffusion region (12A) provided on one surface of the semiconductor layer; and a second impurity diffusion region (12B) provided around the first impurity diffusion region (12A). The second impurity diffusion region (12B) has a lower impurity concentration than an impurity concentration of the first impurity diffusion region (12A).

Abstract: Provided is a highly sensitive sensor comprising a cracked transparent conductive thin film. The highly sensitive sensor relates to a sensor which is acquired by means of forming a fine crack in a transparent conductive thin film formed on a substrate and is for measuring external tension and pressure by means of measuring the change of electrical resistance due to changes, shorting or opening in a fine interconnection structure formed by the fine crack. Such highly sensitive transparent conductive crack sensor can be applied to high-precision measurement or an artificial skin, can also be utilized as a positioning detecting sensor by means of pixelating the sensor, and can be utilized in fields of precise measurements, biometric devices used on the human skin and the like, human motion measurement sensors, display panel sensors and the like.

Abstract: A spherical LED chip, a method for manufacturing the same, and a display panel, and a method for spherical LED chip transfer are provided. The spherical LED chip includes a first electrode, a second electrode surrounding the first electrode and having magnetism, and a first insulating protective layer arranged at the outside of the first electrode. The first insulating protective layer and the second electrode form an LED housing configured to wrap the first electrode and with a spherical outer contour.

Abstract: As a result of miniaturization of a pixel region associated with an improvement in definition and an increase in a substrate size associated with an increase in area, defects due to precision, bending, and the like of a mask used at the lime of evaporation have become issues. A partition including portions with different thicknesses over a pixel electrode (also referred to as a first electrode) in a display region and in the vicinity of a pixel electrode layer is formed, without increasing the number of steps, by using a photomask or a reticle provided with an auxiliary pattern having a light intensity reduction function made of a diffraction grating pattern or a semi-transmissive film.

Abstract: The present disclosure provides a photo sensing device, the photo sensing device includes a substrate, including a silicon layer at a front surface, a photosensitive member extending into and at least partially surrounded by the silicon layer, a first doped region having a first conductivity type at a first side of the photosensitive member, wherein the first doped region is in the silicon layer, and a second doped region having a second conductivity type different from the first conductivity type at a second side of the photosensitive member opposite to the first side, wherein the second doped region is in the silicon layer, and the first doped region is apart from the second doped region, and a superlattice layer disposed between the photosensitive member and the silicon layer, wherein the superlattice layer includes a first material and a second material different from the first material.

Abstract: A photodetector is provided. The photodetector includes a bottom electrode region in a semiconductor layer, a light absorption material in the semiconductor layer, and a first buffer layer sandwiched between a bottom surface of the light absorption material and the semiconductor layer. The first buffer layer includes, from bottom to top, a first Si layer, a first SiGe layer, a second Si layer, and a second SiGe layer. A first atomic percentage of Ge in the first SiGe layer is less than a second atomic percentage of Ge in the second SiGe layer. The photodetector further includes a top electrode region over the light absorption material.

Abstract: A non-diffusion type photodiode is described and has: a substrate, a buffer layer, a light absorption layer, an intermediate layer, and a multiplication/window layer. The buffer layer is disposed on the substrate. The light absorption layer is disposed on the buffer layer. The intermediate layer is disposed on the light absorption layer and has a first boundary, wherein the intermediate layer is an I-type semiconductor layer or a graded refractive index layer. The multiplication/window layer is disposed on the intermediate layer and has a second boundary, wherein in a top view, the first boundary surrounds the second boundary, and a distance between the first boundary and the second boundary is greater than or equal to 1 micrometer. The non-diffusion type photodiode can reduce generation of dark current.

Abstract: A back contact solar cell assembly and methods for its manufacture and assembly onto a panel for use in space vehicles are described. The solar cell assembly includes a compound semiconductor multijunction solar cell having a contact at the top surface of the solar cell, a conductive semiconductor element extending from the contact on the top surface to the back surface of the assembly where it forms a first hack contact of a first polarity type, and a second back contact of a second polarity at the back surface of the assembly electrically coupled to the back surface of the solar cell.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor. The image sensor includes and image sensor element disposed within a substrate. The substrate comprises a first material. The image sensor element includes an active layer comprising a second material different from the first material. A buffer layer is disposed between the active layer and the substrate. The buffer layer extends along outer sidewalls and a bottom surface of the active layer. A capping structure overlies the active layer. Outer sidewalls of the active layer are spaced laterally between outer sidewalls of the capping structure such that the capping structure continuously extends over outer edges of the active layer.

Abstract: The present invention provides a process for making nanoparticle based bulk materials. Also provided is a single component metal nanoparticle based bulk glass material comprising less than about 1% by weight of ligand capped nanocrystals; and wherein the metal is palladium.

Abstract: A semiconductor apparatus includes a semiconductor layer that includes a photoelectric conversion unit disposed between a front surface and a back surface and a transistor disposed at the front surface, and a dielectric film in contact with the back surface, wherein the semiconductor layer includes a region extending 100 nm from the back surface, the region having boron concentrations whose maximum value is more than 1×1020 [atoms/cm3].

Abstract: According to one embodiment, a light detector includes a conductive layer, a first element, a second element, a first member, a first insulating part, and a second insulating part. The conductive layer includes a first conductive portion and a second conductive portion. The first element includes a first semiconductor layer and a second semiconductor layer. The second element includes a fourth semiconductor layer and a fifth semiconductor layer. The first member is provided between the first element and the second element and electrically connected to the conductive layer. The first member is conductive. The first insulating part is provided between the first element and the first member. The second insulating part is provided between the second element and the first member.

Abstract: A photoelectric converter including a crystalline silicon substrate having a light receiving surface including a smooth section and a rough surface section having surface roughness greater than the surface roughness of the smooth section and a light transmissive inorganic film so provided as to overlap with the smooth section and the rough surface section, and the film thickness t1 of a portion of the inorganic film that is the portion where the inorganic film overlaps with the rough surface section is smaller than the film thickness t2 of a portion of the inorganic film that is the portion where the inorganic film overlaps with the smooth section. The arithmetic average roughness of the rough surface section is preferably greater than or equal to 0.1 ?m.

Abstract: An additive manufacturing method includes: forming a powder bed by supplying a raw material powder; and irradiating the raw material powder that forms the powder bed with a light beam having an intensity distribution of a second or higher order mode or of a top hat shape.

Abstract: A magnetic photomultiplier tube (PMT) system, including a PMT. The PMT including a photocathode for converting an impinging photon to a photoelectron, an anode, and at least two or a series of oppositely facing pairs of dynodes, wherein each pair is spaced apart from an adjacent pair, a first electric field being generated intermediate at least one pair of oppositely facing dynodes and a second electric field generated intermediate at least one adjacent pairs of dynodes. The PMT system includes a magnetic field generated by a magnetic system, the PMT being positioned within the magnetic field.

Abstract: A method for preparing a selective emitter solar cell includes: forming a textured surface with a plurality of protrusions in the first regions and the second regions of the surface of the semiconductor substrate, wherein each protrusion has a cross-sectional shape that is trapezoidal or trapezoid-like in a thickness direction of the semiconductor substrate; performing a diffusion treatment on at least part of protrusions to form a first doped layer, and forming a first oxide layer above the first regions; re-etching the surface of the semiconductor substrate by using the first oxide layer as a mask, to etch each protrusion in the second regions to form a pyramid structure, such that the first doped layer in the second regions is etched to form a second doped layer with a doping concentration lower than a doping concentration of the first doped layer.

Abstract: A method of manufacturing an oxide semiconductor, includes impregnating a substrate in a solution containing a metal precursor and hydroxyl ions, and forming a metal oxide on the substrate by applying a voltage to the solution. The solution includes a surfactant, and the direction of crystal growth of the metal oxide is controllable based on the surfactant.

Abstract: A wafer-level process includes providing a set of electronic chips, including a stack with a set of matrix arrays of pixels, an interconnect layer electrically connected to the set of matrix arrays of pixels, and a first layer, including vias electrically connected to the interconnect layer. The wafer-level process further includes forming metal pillars on the first layer, the pillars being electrically connected to the vias, and forming a material integrally with the first layer, around the metal pillars. The wafer-level process also includes dicing the electronic chips so as to release the thermomechanical stresses to which the stack is subjected. Finally, the wafer-level process includes making the metal pillars coplanar after dicing the electronic chips.

Abstract: A through-slit is provided in a semiconductor wafer. A first virtual cutting line defines a chip portion including an energy ray sensitive region as viewed from a direction perpendicular to a first main surface. The shortest distance from a second virtual cutting line to the edge of a second semiconductor region is smaller than the shortest distance from the first virtual cutting line to the edge of the second semiconductor region. The through-slit penetrates through the semiconductor wafer in the thickness direction along the second virtual cutting line. A side surface to which a first semiconductor region is exposed is formed in the chip portion by providing the through-slit. A fourth semiconductor region of a first conductivity type is provided on the side surface side of the chip portion by adding impurities to the side surface to which the first semiconductor region is exposed.

Abstract: A camera module includes a lens; an image sensor disposed on a substrate and converting an optical signal refracted by the lens into an electrical signal, an adhesive member disposed between the substrate and the image sensor to fix the image sensor to the substrate, and a support member disposed between the substrate and the image sensor configured to maintain a constant distance between the lens and the image sensor even at a time of shrinkage-deformation of the adhesive member.

Abstract: A semiconductor package includes a package substrate, an image sensor disposed on the package substrate, and a bonding layer disposed between the package substrate and the image sensor, and including a first region and a second region, the second region has a modulus of elasticity lower than that of the first region and is disposed on a periphery of the first region.

Abstract: Structures and techniques introduced here enable the design and fabrication of photodetectors (PDs) and/or other electronic circuits using typical semiconductor device manufacturing technologies meanwhile reducing the adverse impacts on PDs' performance. Examples of the various structures and techniques introduced here include, but not limited to, a pre-PD homogeneous wafer bonding technique, a pre-PD heterogeneous wafer bonding technique, a post-PD wafer bonding technique, their combinations, and a number of mirror equipped PD structures. With the introduced structures and techniques, it is possible to implement PDs using typical direct growth material epitaxy technology while reducing the adverse impact of the defect layer at the material interface caused by lattice mismatch.

Abstract: Method for assembling includes: providing a system to transfer wire element from wire element supply device to wire element storage device; stretching wire element between supply and storage devices by tensioning; providing an individualized reservoir and separated chip elements, each including a connection terminal including a top with free access facing in which chip element is not present; transporting the chip element from reservoir to an assembly area between supply and storage devices in which wire element is tightly stretched in assembly area; fixing electrically conducting wire element to chip element connection terminal in assembly area; and adding electrically insulating material on chip element after latter has been fixed to wire element forming a cover, the addition of material being performed on surface of chip element including connection terminal fixed to wire element to cover at least the connection terminal and portion of wire element at fixing point of latter.

Abstract: A light-emitting element includes a mesa structure in which a first compound semiconductor layer of a first conductivity type, an active layer, and a second compound semiconductor layer of a second conductivity type are disposed in that order, wherein at least one of the first compound semiconductor layer and the second compound semiconductor layer has a current constriction region surrounded by an insulation region extending inward from a sidewall portion of the mesa structure; a wall structure disposed so as to surround the mesa structure; at least one bridge structure connecting the mesa structure and the wall structure, the wall structure and the bridge structure each having the same layer structure as the portion of the mesa structure in which the insulation region is provided; a first electrode; and a second electrode disposed on a top face of the wall structure.

Abstract: Various particular embodiments include a method for forming a photodetector, including: forming a structure including a barrier layer disposed between a layer of doped silicon (Si) and a layer of germanium (Ge), the barrier layer including a crystallization window; and annealing the structure to convert, via the crystallization window, the Ge to a first composition of silicon germanium (SiGe) and the doped Si to a second composition of SiGe.

Abstract: A thin film transistor includes a substrate, a gate electrode formed on the substrate, an electrically insulating layer formed on the substrate and covering the gate electrode, a channel layer made of semiconductor material and formed on the electrically insulating layer, an etch stop pattern formed on the channel layer and defining a first through hole and a second through hole; and a source electrode and a drain electrode formed on the etch stop pattern. The source electrode extends into the first through hole to electrically couple to the channel layer. The drain electrode extends into the second through hole to electrically couple to the channel layer. Both the channel layer and the etch stop pattern are formed by using a single mask and a single photoresist layer.

Abstract: To provide a semiconductor device having a photoelectric conversion element having a high sensitivity, causing less blooming, and capable of providing a highly reliable image. The semiconductor device has a semiconductor substrate, a first p type epitaxial layer, a second p type epitaxial layer, and a first photoelectric conversion element. The first p type epitaxial layer is formed over the main surface of the semiconductor substrate. The second p type epitaxial layer is formed so as to cover the upper surface of the first p type epitaxial layer. The first photoelectric conversion element is formed in the second p type epitaxial layer. The first and second p type epitaxial layers are each made of silicon and the first p type epitaxial layer has a p type impurity concentration higher than that of the second p type epitaxial layer.

Abstract: A method for forming a TFT includes providing a substrate, and forming a gate electrode, an electrically insulating layer, a semiconductor layer, an etch stop layer and a photoresist layer successively on the substrate. A photolithographic process is performed to the photoresist layer by using a half-tone mask to thereby configure the photoresist layer to have two recesses in a top thereof. Two lateral ends of the etch stop layer are etched away to form an etch stop pattern. The photoresist layer is heated to flow downwardly. Two lateral ends of the semiconductor channel are etched away to become a channel layer. An ashing is performed to the photoresist layer to have the recesses thereof communicate atmosphere with the etch stop pattern. The etch stop pattern is etched to define first and second through holes. Source and drain electrodes are formed to electrically connect with the channel layer.

Abstract: A light emitting device having a light extraction structure, which is capable of achieving an enhancement in light extraction efficiency and reliability, and a method for manufacturing the same. The light emitting device includes a semiconductor layer having a multi-layered structure including a light emission layer; and a light extraction structure formed on the semiconductor layer in a pattern having unit structures. Further, the wall of each of the unit structures is sloped at an angle of ?45° to +45° from a virtual vertical line being parallel to a main light emitting direction of the light emitting device.

Abstract: An avalanche photodiode detector is provided. The avalanche photodiode detector comprises an absorber region having an absorption layer for receiving incident photons and generating charged carriers; and a multiplier region having a multiplication layer; wherein the multiplier region is on a mesa structure separate from the absorber region and is coupled to the absorber region by a bridge for transferring charged carriers between the absorber region and multiplier region.

Abstract: Methods are provided for using masking techniques and plasma etching techniques to dice a compound semiconductor wafer into dies. Using these methods allows compound semiconductor die to be obtained that have smooth side walls, a variety of shapes and dimensions, and a variety of side wall profiles. In addition, by using these techniques to perform the dicing operations, the locations of features of the die relative to the side walls are ascertainable with certainty such that one or more of the side walls can be used as a passive alignment feature to precisely align one or more of the die with an external device.

Abstract: A quantum dot-polymer nanocomposite for optical chemical and biological sensing is formed by stably incorporating functionalized quantum dots into a pH sensitive hydrogel polymer network. At least one monomer of the pH sensitive hydrogel has functional groups selectively chosen to correspond to functionalized groups on the quantum dots to enable conjugation between the hydrogel polymer network and the functionalized quantum dots. The resulting quantum dot-polymer nanocomposite is placed in a solution having a known pH and addition of a chemical composition or biological agent of interest generates a change in pH of that solution. The nanocomposite expands or contracts responsive to the pH change. The pH change is optically detected by measuring the intensity level of fluorescence from the quantum dots when the nanocomposite is subjected to an excitation light source.

Abstract: Bi-directional camera modules and flip chip bonders including the same are provided. The module includes a circuit board on which an upper sensor and a lower sensor are mounted, an upper lens and a lower lens disposed on the upper sensor and under the lower sensor, respectively, and a housing fixing the upper lens and the lower lens spaced apart from the upper sensor and the lower sensor, respectively. The housing surrounds the circuit board. The housing has a plurality of inlets and an outlet through which air flows, and the housing has an air passage connected from the inlets to the outlet via a space between lower lens and the lower sensor.

Abstract: An infrared detection element includes a substrate, a lower electrode layer, a pyroelectric layer, and an upper electrode layer. The lower electrode layer is fixed to the substrate, and the pyroelectric layer is formed on the lower electrode layer. The upper electrode layer is formed on pyroelectric layer. The lower electrode layer contains pores therein and has a larger thermal expansion coefficient than the pyroelectric layer.

Abstract: Disclosed herein are an image sensor module and a method of manufacturing the same. The image sensor includes: a base substrate having an image sensor mounted groove including a first groove and a second groove having a stepped shape; and an image sensor mounted in a groove of the base substrate.

Abstract: An integrated circuit having an insulated conductor or within a semiconductor substrate and extending perpendicular to a plane of a semiconductor wafer or substrate on which the integrated circuit is fabricated, the conductor comprising a first region of doped semiconductor extending between a first device or a first contact and a second device or a second contact.

Abstract: An optical input/output (I/O) device is provided. The device includes a substrate including an upper trench; a waveguide disposed within the upper trench of the substrate; a photodetector disposed within the upper trench of the substrate and comprising a first end surface optically connected to an end surface of the waveguide; and a light-transmitting insulating layer interposed between the end surface of the waveguide and the first end surface of the photodetector.

Abstract: An optoelectronic device comprising an optically active layer that includes a plurality of domes is presented. The plurality of domes is arrayed in two dimensions having a periodicity in each dimension that is less than or comparable with the shortest wavelength in a spectral range of interest. By virtue of the plurality of domes, the optoelectronic device achieves high performance. A solar cell having high energy-conversion efficiency, improved absorption over the spectral range of interest, and an improved acceptance angle is presented as an exemplary device.

Abstract: A semiconductor light emitting device having high reliability and excellent light distribution characteristics can be provided with an n-electrode arranged on a light extraction surface on the side opposite to the surface whereupon a semiconductor stack is mounted on a substrate. A plurality of convexes are arranged on a first convex region and a second convex region on the light extraction surface. The second convex region adjoins the interface between the n-electrode and the semiconductor stack, between the first convex region and the n-electrode. The base end of the first convex arranged in the first convex region is positioned closer to a light emitting layer than the interface between the n-electrode and the semiconductor stack, and the base end of the second convex arranged in the second convex region is positioned closer to the interface between the n-electrode and the semiconductor stack than the base end of the first convex.

Abstract: A method of producing a plurality of optoelectronic semiconductor chips includes a) providing a layer composite assembly having a principal plane which delimits the layer composite assembly in a vertical direction, and includes a semiconductor layer sequence having an active region that generates and/or detects radiation, wherein a plurality of recesses extending from the principal plane in a direction of the active region are formed in the layer composite assembly; b) forming a planarization layer on the principal plane such that the recesses are at least partly filled with material of the planarization layer; c) at least regionally removing material of the planarization layer to level the planarization layer; and d) completing the semiconductor chips, wherein for each semiconductor chip at least one semiconductor body emerges from the semiconductor layer sequence.

Abstract: A thin film photovoltaic device comprising a relief textured transparent cover plate, a layer of transparent conductive oxide having a layer thickness of less than 700 nm, a light absorbing active layer and a reflective back electrode, where the layer of transparent conductive oxide is a non-textured layer.