Abstract: A pixel cell having a photosensor within a silicon substrate; and an oxide layer provided over the photosensor, the oxide layer having a grated interface with said silicon substrate, and a method of fabricating the pixel cell having a grated interface.

Abstract: An integrated circuit device with a semiconductor body and a method for the production of a semiconductor device a provided. The semiconductor body comprises a cell field with a drift zone of a first conduction type. In addition, the semiconductor device comprises an edge region surrounding the cell field. Field plates with a trench gate structure are arranged in the cell field, and an edge trench surrounding the cell field is provided in the edge region. The front side of the semiconductor body is in the edge region provided with an edge zone of a conduction type complementing the first conduction type with doping materials of body zones of the cell field. The edge zone of the complementary conduction type extends both within and outside the edge trench.

Abstract: In order to improve reliability by preventing edge breakdown in a semiconductor photodetector having a mesa structure such as a mesa APD, the semiconductor photodetector includes a mesa structure formed on a first semiconductor layer of the first conduction type formed on a semiconductor substrate, the mesa structure including a light absorbing layer for absorbing light, an electric field buffer layer for dropping an electric field intensity, an avalanche multiplication layer for causing avalanche multiplication to occur, and a second semiconductor layer of the second conduction type, wherein the thickness of the avalanche multiplication layer at the portion in the vicinity of the side face of the mesa structure is made thinner than the thickness at the central portion of the mesa structure.

Abstract: A light emitting diode comprises a substrate having a first surface and a second surface, a light emitting epitaxy structure placed on the first surface of the substrate, and a compound reflection layer placed on the second surface of the substrate. The second surface of the substrate further has a protection structure.

Abstract: The present invention relates to a flash memory device and its fabrication method. The device comprises a structure for improving a scaling-down characteristic/performance and increasing memory capacity of the MOS-based flash memory device. A new device structure according to the present invention is based on a recessed channel capable of implementing highly-integrated/high-performance and 2-bit/cell. The proposed device suppresses the short channel effect, reduces the cell area, and enables 2-bit/cell by forming the charge storage node as a spacer inside the recessed channel. Moreover, if selectively removing the dielectric films around the recessed silicon surface, the sides as well as the surface of the recessed channel is exposed. A spacer can be used as a storage node, thereby improving the channel controllability of the control electrode and the on-off characteristic of a device. The proposed structure also resolves the threshold voltage problem and improves the write/erase speeds.

Abstract: A semiconductor photodetector device (PD1) comprises a multilayer structure (LS1) and a glass substrate (1) optically transparent to incident light. The multilayer structure includes an etching stop layer (2), an n-type high-concentration carrier layer (3), an n-type light-absorbing layer (5), and an n-type cap layer (7) which are laminated. A photodetecting region (9) is formed near a first main face (101) of the multilayer structure, whereas a first electrode (21) is provided on the first main face. A second electrode (27) and a third electrode (31) are provided on a second main face (102). A film (10) covering the photodetecting region and first electrode is formed on the first main face. A glass substrate (1) is secured to the front face (10a) of this film.

Abstract: An avalanche photodiode semiconductor device (20) for converting an impinging photon (22) includes a base n+ doped material layer (52) formed having a window section (72) for passing the photon (22). An n? doped material layer (30) is formed on the n+ doped material layer (52) having a portion of a lower surface (74) suitably exposed. An n+ doped material layer (32) is formed on the n? doped material (30). A p+ layer (24) formed on top of the n+ doped layer (32). At least one guard ring (26) is formed in the n? doped layer (30).

Abstract: A silicon drift detector (SDD) comprising electrically isolated rings. The rings can be individually biased doped rings. One embodiment includes an SDD with a single doped ring. Some of the doped rings may not require a bias voltage. Some of the rings can be field plate rings. The field plate rings may all use the same biasing voltage as a single outer doped ring. The ring widths can vary such that the outermost ring is widest and the ring widths decrease with each subsequent ring towards the anode.

Abstract: A method and apparatus for operating an imager pixel that includes the act of applying a relatively small first polarity voltage and a plurality of pulses of a second polarity voltage on the gate of a transfer transistor during a charge integration period.

Abstract: A method of manufacturing a vertical cavity surface emitting laser of a mesa structure, the method comprises: sequentially laminating on a substrate a plurality of semiconductor layers including a bottom reflecting mirror, an active layer, a selective oxidation layer and a top reflecting mirror, followed by forming a dielectric film on the laminated semiconductor layers; forming on the dielectric film a first resist pattern comprised of large and small annular opening patterns and large and small annular resist patterns around the same central axis; forming the large and small annular opening patterns in the dielectric film; forming a second resist pattern in the dielectric film so that only the small annular opening pattern is exposed, followed by forming an annular electrode in the exposed small annular opening pattern; and forming a third resist pattern over the annular electrode.

Abstract: A thermopile infrared sensor array, comprises a sensor chip with a number of thermopile sensor elements, made from a semiconductor substrate and corresponding electronic components. The sensor chip is mounted on a support circuit board and enclosed by a cap in which a lens is arranged. The aim is the production of a monolithic infrared sensor array with a high thermal resolution capacity with a small chip size and which may be economically produced. The aim is achieved by arranging a thin membrane made from non-conducting material on the semiconductor substrate of the sensor chip on which the thermopile sensor elements are located in an array. Under each thermopile sensor element, the back side of the membrane is uncovered in a honeycomb pattern by etching and the electronic components are arranged in the boundary region of the sensor chip. An individual pre-amplifier with a subsequent low-pass filter may be provided for each column and each row of sensor elements.

Abstract: A bipolar junction transistor includes a collector having a first conductivity type, a drift layer having the first conductivity type on the collector, a base layer on the drift layer and having a second conductivity type opposite the first conductivity type, a lightly doped buffer layer having the first conductivity type on the base layer and forming a p-n junction with the base layer, and an emitter mesa having the first conductivity type on the buffer layer and having a sidewall. The buffer layer includes a mesa step adjacent to and spaced laterally apart from the sidewall of the emitter mesa, and a first thickness of the buffer layer beneath the emitter mesa is greater than a second thickness of the buffer layer outside the mesa step.

Abstract: Among photodiodes used in an optical system for applying light to the entire chip, the conventional PIN photodiode has a problem that light should be applied only to a light reception surface in order to prevent degradation of light response and that positioning of the optical system is difficult. Moreover, in the mesa type PIN photodiode not requiring positioning of an optical system, disconnection failure is often caused by the mesa step. The present invention is made to solve the aforementioned problems, and its object is to provide a PIN photodiode having an improved light response and causing less disconnection failure of metal wiring and a light reception device using the PIN photodiode. The PIN photodiode of the present invention has a structure that the light reception surface is surrounded by a groove of a predetermined depth.

Abstract: The present invention relates to a semiconductor photodetector and the like that can be made adequately compact while maintaining mechanical strength. The semiconductor photodetector includes a structural body of layers and a glass substrate. The structural body of layers is arranged from an antireflection film, a high-concentration carrier layer of an n-type (first conductive type), a light absorbing layer of the n-type, and a cap layer of the n-type that are laminated successively. The glass substrate is adhered via a silicon oxide film onto the antireflection film side of the structural body of layers. The glass substrate is optically transparent to incident light.

Abstract: The present invention changes layer polarities of an epitaxy structure of an avalanche photodiode into n-i-n-i-p. A transport layer is deposed above an absorption layer to prevent absorbing photon and producing electrons and holes. A major part of electric field is concentrated on a multiplication layer for producing avalanche and a minor part of the electric field is left on the absorption layer for transferring carrier without avalanche. Thus, bandwidth limit from a conflict between RC bandwidth and carrier transferring time is relieved. Meanwhile, active area is enlarged and alignment error is improved without sacrificing component velocity too much.

Abstract: An n? type semiconductor region is provided with an n? diffusion region serving as a drain region, and at one side of the n? diffusion region a p diffusion region and an n+ diffusion region serving as a source region are provided. At an other side of the n? diffusion region a trench is provided and has an insulator introduced therein. Immediately under the n? diffusion region a p? buried layer is provided. In a region of the n? semiconductor region an n+ diffusion region to which a high potential is applied is provided and electrically connected to the n? diffusion region by an interconnect having a resistor. On a surface of a portion of the p diffusion region that is sandwiched between the n+ diffusion region and the n? diffusion region a gate electrode is provided, with a gate insulation film posed therebetween.

Abstract: A solid-state imaging device, a line sensor and an optical sensor for enhancing a wide dynamic range while keeping high sensitivity with a high S/N ratio, and a method of operating a solid-state imaging device for enhancing a wide dynamic range while keeping high sensitivity with a high S/N ratio are provided. The solid-state imaging device comprises an integrated array of a plurality of pixels, each of which comprises a photodiode PD for receiving light and generating photoelectric charges, a transfer transistor Tr1 for transferring the photoelectric charges, and a storage capacitor element C connected to the photodiode PD at least through the transfer transistor Tr1 for accumulating, at least through the transfer transistor Tr1, the photoelectric charge overflowing from the photodiode PD during accumulating operation.

Abstract: An open portion is provided to an interlayer insulation film so as to correspond to a photoreceptor part of an optical detection device. A partition wall for surrounding the open portion (120) is formed by a metal material inside a wiring structure layer (90) along the boundary between the photoreceptor part (4) and a circuit part (6). The partition wall is formed by a contact structure having a multi-level structure with respect to a separation region (74) disposed on the external periphery of the photoreceptor part (4). The partition wall prevents moisture absorption and light penetration from the wall surface of the open portion, and suppresses wiring degradation or fluctuation of the characteristics of the circuit elements on the periphery of the photoreceptor part.

Abstract: A light emitting diode structure has a silicon substrate, a conductive layer, and a light emitting diode. The top surface of the silicon substrate has a cup-structure like paraboloid, and the bottom of the cup-structure has a plurality of through-holes penetrating the silicon substrate. The conductive layer fills up the through-holes and protrudes out from the through-holes. The light emitting diode is disposed on the top of the conductive layer protruding out from the through-holes and is located at the focus of the cup-structure.

Abstract: In one example, an optoelectronic transducer includes a first contact, a second contact, a passivation layer, and a protection layer. The passivation layer is formed on top of the first contact and the second contact and is configured to substantially minimize dark current in the optoelectronic transducer. The protection layer is formed on top of the passivation layer and substantially covers the passivation layer. The protection layer is configured to protect the passivation layer from external factors and prevent degradation of the passivation layer.

Abstract: The present invention provides methods of forming metal oxide semiconductor nanostructures and, in particular, zinc oxide (ZnO) semiconductor nanostructures, possessing high surface area, plant-like morphologies on a variety of substrates. Optoelectronic devices, such as photovoltaic cells, incorporating the nanostructures are also provided.

Abstract: A MOSFET on SOI device includes an upper region having at least one first MOSFET type semi-conductor device formed on a first semi-conductor layer stacked on a first dielectric layer, a first conductive layer and a first portion of a second semi-conductor layer. A lower region includes at least one second MOSFET type semi-conductor device formed on a second portion of the second semi-conductor layer, a gate of the second semi-conductor device being formed by at least one conductive portion. The second semi-conductor layer is arranged on a second dielectric layer stacked on a second conductive layer.

Abstract: A carbon-containing semiconductor layer is formed on exposed surfaces of a p? doped semiconductor layer abutting sidewalls of a shallow trench. Following formation of a dielectric layer on the carbon-containing semiconductor layer, a surface pinning layer having a p-type doping is formed underneath the carbon-containing semiconductor layer. A shallow trench isolation structure and a photodiode are subsequently formed. Diffusion of defects directly beneath the shallow trench isolation structure, now contained in the carbon-containing semiconductor layer, is suppressed. Further, boron diffusion into the shallow trench isolation structure and into the photodiode is also suppressed by the carbon-containing semiconductor layer, providing reduction in dark current and enhancement of performance of the photodiode.

Abstract: A method of manufacturing an optical device includes: a first step of forming an optical-device forming body that includes a plurality of columnar structures arranged in an arrangement direction on a substrate surface via a trench and an outline structure connected to and containing therein the plurality of columnar structures; a second step of oxidizing the optical-device forming body from a state where the optical-device forming body starts to be oxidized to a state where the columnar structure is oxidized; and a third step in which an unoxidized residual part of the outline structure in the second step is oxidized after the second step so as to form an oxidized body. Furthermore, the third step includes restraining the outline structure from being deformed with respect to at least the arrangement direction of the columnar structures in the third step.

Abstract: A photodiode designed to capture incident photons includes a stack of at least three superposed layers of semiconductor materials having a first conductivity type. The stack includes: an interaction layer designed to interact with incident photons so as to generate photocarriers; a collection layer to collect the photocarriers; a confinement layer designed to confine the photocarriers in the collection layer. The collection layer has a band gap less than the band gaps of the interaction layer and confinement layer. The photodiode also includes a region which extends transversely relative to the planes of the layers. The region is in contact with the collection layer and confinement layer and has a conductivity type opposite to the first conductivity type so as to form a p-n junction with the stack.

Abstract: Structure and method are provided for semiconductor devices. The devices include trenches filled with highly doped polycrystalline semiconductor, extending from the surface into the body of the device for, among other things: (i) reducing substrate current injection, (ii) reducing ON-resistance and/or (iii) reducing thermal impedance to the substrate. For isolated LDMOS devices, the resistance between the lateral isolation wall (tied to the source) and the buried layer is reduced, thereby reducing substrate injection current. When placed in the drain of a lateral device or in the collector of a vertical device, the poly-filled trench effectively enlarges the drain or collector region, thereby lowering the ON-resistance. For devices formed on an oxide isolation layer, the poly-filled trench desirably penetrates this isolation layer thereby improving thermal conduction from the active regions to the substrate. The poly filled trenches are conveniently formed by etch and refill.

Abstract: The present invention provides a photoelectric conversion device in which a leakage current is suppressed. A photoelectric conversion device of the present invention comprises: a first electrode over a substrate; a photoelectric conversion layer including a first conductive layer having one conductivity, a second semiconductor layer, and a third semiconductor layer having a conductivity opposite to the one conductivity of the second semiconductor layer over the first electrode, wherein an end portion of the first electrode is covered with the first semiconductor layer; an insulating film, and a second electrode electrically connected to the third semiconductor film with the insulating film therebetween, over the insulating film, are formed over the third semiconductor film, and wherein a part of the second semiconductor layer and a part of the third semiconductor layer is removed in a region of the photoelectric conversion layer, which is not covered with the insulating film.

Abstract: An infrared sensor IC and an infrared sensor, which are extremely small and are not easily affected by electromagnetic noise and thermal fluctuation, and a manufacturing method thereof are provided. A compound semiconductor that has a small device resistance and a large electron mobility is used for a sensor (2), and then, the compound semiconductor sensor (2) and an integrated circuit (3), which processes an electrical signal output by the compound semiconductor sensor (2) and performs an operation, are arranged in a single package using hybrid formation. In this manner, an infrared sensor IC that can be operated at room temperature can be provided by a microminiature and simple package that is not conventionally produced.

Abstract: An image sensor and a method for manufacturing the same are provided. The image sensor can include a semiconductor substrate, an interlayer dielectric, a second doped layer, a first doped layer, an ohmic contact layer, and metal contacts. The semiconductor substrate can have a pixel region and a peripheral region defined therein. The second doped layer, the first doped layer, and the ohmic contact layer can be stacked on the interlayer dielectric of the semiconductor substrate to form an image sensing device in the pixel region.

Abstract: A semiconductor device includes: a semiconductor substrate 1; a through electrode 7 extending through the semiconductor substrate 1; a diffusion layer 24 formed in a region of an upper portion of the semiconductor substrate 1 located on a side of the through electrode 7; and a diffusion layer 22 formed in an upper portion of the diffusion layer 24. A portion of the side surface of the through electrode 7 facing the diffusion layer 24 is curved, and a portion of the surface of the diffusion layer 24 facing the through electrode 7 is curved.

Abstract: A method for forming an emitter structure on a substrate and emitter structures resulting therefrom is disclosed. In one aspect, a method includes forming, on the substrate, a first layer comprising semiconductor material. The method also includes texturing a surface of the first layer, thereby forming a first emitter region from the first layer, wherein the first emitter region has a first textured surface. The method also includes forming a second emitter region at the first textured surface, the second emitter region having a second textured surface.

Abstract: Embodiments relate to a CMOS image sensor and to a method for manufacturing a CMOS image sensor that may disperse stray beam between microlenses. According to embodiments, the method for manufacturing the CMOS image may include forming an interlayer dielectric layer on a semiconductor substrate including a plurality of photo diodes, forming a color filter layer corresponding to the photo diodes on the interlayer dielectric layer, forming a planarization layer on the color filter layer, forming microlenses on the planarization layer, after depositing an insulating layer over the microlenses, forming a trench in a concave lens shape in the insulating layer between the microlenses, and forming a concave lens gap-filling insulating materials inside the trench. In embodiments, concave lenses may be formed between microlenses in a CMOS image sensor and stray beams between the microlenses may be dispersed and recondensed into the microlenses.

Abstract: The pixel for use in an image sensor comprises a low-doped semiconductor substrate (A). On the substrate (A), an arrangement of a plurality of floating areas e.g., floating gates (FG2-FG6), is provided. Neighboring floating gates are electrically isolated from each other yet capacitively coupled to each other. By applying a voltage (V2-V1) to two contact areas (FG1, FG7), a lateral steplike electric field is generated. Photogenerated charge carriers move along the electric-field lines to the point of highest potential energy, where a floating diffusion (D) accumulate the photocharges. The charges accumulated in the various pixels are sequentially read out with a suitable circuit known from image-sensor literature, such as a source follower or a charge amplifier with row and column select mechanisms. The pixel of offers at the same time a large sensing area, a high photocharge-detection sensitivity and a high response speed without any static current consumption.

Abstract: Embodiments of an optical device including at least two transparent layers are disclosed.

Abstract: Disclosed herein is a solid-state imaging element which includes a plurality of drive signal inputs, a plurality of bus lines, and a plurality of vertical transfer register electrodes. In the solid-state imaging element, a charge accumulated in light-receiving elements in a pixel region is vertically transferred by the drive signals input to the electrodes. Each of the electrodes has a contact part connected to the second contact and having a width smaller than a width of the electrodes in the pixel region, and a blank region is formed between predetermined adjacent two of the contact parts so that a width of the blank region is larger than a distance between respective two of the contact parts other than the predetermined adjacent two of the contact parts. The first contact is disposed on the blank region.

Abstract: A semiconductor power device includes a semiconductor body with a plurality of gate trenches formed therein. Disposed within each gate trench is a spacer gate that extends along at least a portion of the sidewalls of the gate trench but not along at least a portion of the bottom surface of the trench. The spacer gate of each gate trench may also include a layer of silicide along outer surfaces thereof. The semiconductor body may include a channel region and each gate trench may extend through the channel region and into the semiconductor body. Formed at the bottom of each gate trench within the semiconductor body may be a tip implant of the same conductivity as the semiconductor body. In addition, a deep body implant of the same conductivity as the channel region may be formed at the base of the channel region.

Abstract: A semiconductor light receiving device includes a plurality of photodiode units, each of which is configured to convert a received light into an electric signal; and a separating unit configured to electrically separates the plurality of photodiode units from each other. The impurity concentration of a surface portion of the separating unit is equal to or lower than a first concentration. The first concentration is a concentration at which the light receiving sensitivity of the separating unit to light is substantially equal to the light receiving sensitivity of each of the plurality of photodiode units of the light. A wavelength of the light is equal to or longer than that of blue-violet light.

Abstract: A method of fabricating a CMOS image sensor is provided, in which a trapezoidal microlens pattern profile is formed to facilitate reflowing the microlens pattern and by which a curvature of the microlens may be enhanced to raise its light-condensing efficiency. The method includes forming a plurality of photodiodes on a semiconductor substrate; forming an insulating interlayer on the semiconductor substrate including the photodiodes; forming a protective layer on the insulating interlayer; forming a plurality of color filters corresponding to the photodiodes; forming a top coating layer on the color filters; forming a microlens pattern on the top coating layer; and forming a plurality of microlenses by reflowing the microlens pattern.

Abstract: An interferometric spatial light modulator comprises of two cavities. One is the optical resonant cavity having a partially reflective film and a movable reflective membrane as two walls, and the other is the electromechanical actuation cavity having the movable reflective membrane and a bottom metal layer as electrodes. The spatial light modulator is built on silicon substrate and is actively addressed. A microdisplay apparatus of such spatial light modulators and a projection display system using such microdisplay are also disclosed.

Abstract: An optical sensor includes a silicon-rich dielectric photosensitive device and a read-out device. The silicon-rich dielectric photosensitive device includes a first electrode, a second electrode, and a photosensitive silicon-rich dielectric layer disposed therebetween. The photosensitive silicon-rich dielectric layer includes a plurality of nanocrystalline silicon crystals therein. The read-out device is electrically connected to the first electrode of the silicon-rich dielectric photosensitive device for reading out opto-electronic signals transmitted from the photo-sensitive silicon-rich dielectric layer.

Abstract: In a laser pickup photodetector of an optical disk playback device, the sensitivity to blue light is improved. On a main surface of a semiconductor substrate, a high resistivity epitaxial layer that becomes an i layer of a PIN photodiode (PIN-PD) is formed. On a surface of the epitaxial layer, two trenches are formed, on a surface of one trench an N+ region that becomes a cathode region of the PIN-PD is formed, and on a surface of the other trench a P+ region that becomes an anode region is formed. When the cathode region and the anode region are set in a reverse bias state, a light receiving semiconductor region that is an i layer between the cathode region and anode region is depleted. The depleted layer expands to a surface of the semiconductor substrate. Accordingly, for blue light having a short wavelength, signal charges can be generated on a surface of the semiconductor substrate and the cathode region can collect the signal charges and extract the charges as a light receiving signal.

Abstract: An apparatus has multiple sets of independently addressable interdigitated nanowires. Nanowires of a set are in electrical communication with other nanowires of the same set and are electrically isolated from nanowires of other sets.

Abstract: An imager pixel utilizing a silicon-on-insulator substrate, a photodiode in said substrate below the buried oxide, and a dual contact to said photodiode and methods of forming said imager pixel. The photodiode has an increased fill factor due to its increased size relative to the pixel.

Abstract: A multi-color photo sensor having a first photodiode with a first p-type layer and a first n-type layer, the first photodiode generates charge when illuminated with photons of a first wavelength range, a second photodiode with a second p-type layer and a second n-type layer, the second photodiode generates charge when illuminated with photons of a second wavelength range, and a readout integrated circuit electrically coupled to the first n-type layer of the first photodiode via a first metal interconnect and electrically coupled to the second n-type layer of the second photodiode via a second metal interconnect, the second metal interconnect traverses through the first photodiode to contact the second n-type layer of the second photodiode, the second metal interconnect is separated from the first photodiode by a first passivating insulator.

Abstract: A solar module 20 comprises first and second sheets 21 and 22, a plurality of rows (a plurality of groups) of spherical solar cells 11 incorporated in between these sheets 21 and 22 in a state in which the conduction direction is perpendicular to the surface of the sheets, a mechanism for the parallel connection of each group of spherical solar cells 11, a mechanism for the serial connection of each group of spherical solar cells 11 with the spherical solar cells 11 in adjacent groups, a positive electrode terminal 23, and a negative electrode terminal 24. A positive electrode is formed on the bottom and a negative electrode on top in the odd-numbered rows of spherical solar cells 11 from the left end, while a positive electrode is formed on top and a negative electrode on the bottom in the even-numbered rows of spherical solar cells 11.

Abstract: An apparatus is provided. The apparatus generally comprises a photoreceptive region and a circuit region formed in a substrate. A multilayer wiring region is then formed on the substrate over at least a portion of the circuit region. The multilayer wiring region includes a wiring layer and a light-blocking layer. The wiring layer is coupled to the circuit region, and the light-blocking wall has a metal layer that is arranged along at least a portion of the perimeter of the photoreceptive region and that is formed in the same process step as the wiring layer.

Abstract: A semiconductor structure with dual isolation structures is disclosed. The semiconductor structure may include a protruding isolation structure in a pixel array region of a substrate and an embedded isolation structure in a peripheral device region of the same substrate. A region of the protruding isolation structure extends from an upper surface of the substrate, while another region of the protruding isolation structure may, optionally, be embedded within the substrate. The embedded isolation structure is formed within the substrate and includes an upper surface that is substantially coplanar with the upper surface of the substrate. A method of forming the semiconductor structure with dual isolation structure is also disclosed.

Abstract: The present invention provides a semiconductor light receiving element capable of reducing capacity while minimizing increase in travel time of carriers. The semiconductor light receiving element includes a semiconductor stacked structure including a first conductivity type layer, a light absorbing layer, and a second conductivity type layer having a light incidence plane in order. The semiconductor light receiving element has an oxidation layer including a non-oxidation region and an oxidation region in a stacking in-plane direction in the light absorbing layer or between the first conductivity type layer and the light absorbing layer.

Abstract: A package structure for an optoelectronic device. The package structure comprises a device chip reversely disposed on a first substrate, which comprises a second substrate and a first dielectric layer between the first and second substrates. The first dielectric layer comprises a pad formed in a corner of the first dielectric layer non-overlapping the second substrate, such that the surface and sidewall of the pad are exposed. A metal layer is formed directly on the exposed surface of the pad and covers the second substrate. A protective layer covers the metal layer, having an opening to expose a portion of the metal layer on the second substrate. A solder ball is disposed in the opening, electrically connecting to the metal layer. The invention also discloses a method for fabricating the same.

Abstract: Electrodeposition is used to deposit nanowires in a controlled fashion with accurate placement and orientation. A substrate is provided with a mesa having electrically conductive sidewalls. The substrate is immersed in an electroplating solution having a dispersion of nanowires, and metal is electroplated onto the sidewalls of the mesa. During electrodeposition, nanowires are incorporated and partially embedded in the deposited metal film. The nanowires will tend to be parallel with the substrate. Additionally electrodes can be deposited to provide electrical contact with the free ends of the nanowires. In this way, electrical connections can be provided to nanowires in a controlled, reproducible manner. The deposited nanowires can be used in a multitude of devices.