Abstract: A semiconductor device comprising a source/drain region and a channel region formed in a silicon thin film composed of a group of silicon single crystal grains which are each approximately rectangular-shaped and which are arranged in a grid pattern on the base body, where a selected orientation of the silicon single crystal grains to the surface of the base body is approximately the <100> direction.

Abstract: Semiconductor crystal grains are formed by metal-induced lateral crystallisation. The positions of the grain boundaries normal to the crystallisation direction are controlled, to position the grains correctly for subsequent formation of electronic devices within them. In a first technique, the grains are positioned by depositing the metal in short strips which each induce the crystallisation of a single corresponding grain. In a second technique, the grains are positioned by pre-patterning the amorphous silicon which is used to form the grains. Electronic circuit elements can be formed in each grain. The resultant structure can be used in a microelectronic mechanical system. Several grains can be formed successively and circuit elements formed in each layer to form a three-dimensional integrated circuit.

Abstract: Tin oxide nanostructures and methods of fabricating tin oxide nanostructures are disclosed. Representative nanostructures include SnO2 nanowires, SnO2 nanoribbons, and SnO2 nanotubes. Another representative nanostructure includes a nanostructure having a rutile crystal lattice and an orthorhombic crystal superlattice. The nanostructure can include, but is not limited to, SnO2 nanowires, SnO2 nanoribbons, and SnO2 nanotubes.

Abstract: A semiconductor device includes an insulating gate field effect transistor including a gate electrode, wherein the gate electrode includes a polycrystalline semiconductor film having a crystal defect density of about 1×1018 cm−3 or less. In certain embodiments, the polycrystalline semiconductor film may be oxidation thermally annealed by subjecting the polycrystalline semiconductor film to thermal treatment in an oxidation atmosphere to carry out oxidization of the polycrystalline semiconductor film and activation of impurities simultaneously.

Abstract: The present invention provides an apparatus having a semiconductor device including a plurality of transistors formed on respective single crystal silicon regions of enlarged grain size. On a polycrystalline silicon layer, projections at regular intervals are formed by using anisotropic etching and a photomask. The tips of projections are composed of single crystal silicon of a specific crystal orientation selectively left by the anisotropic etching, which is a candidate for nuclei of amorphous silicon to be deposited thereon. By iterating the above process a plurality of times, and by gradually enlarging the pitch, span, size and height of projections, the size of the crystal grains of silicon at the surface may be enlarged to the extent required. Thereby, silicon crystal grains of large grain size with the crystal orientation aligned may be formed at controllable positions.

Abstract: A method is provided to produce thin film transistors (TFTs) on polycrystalline films having a single predominant crystal orientation. A layer of amorphous silicon is deposited over a substrate to a thickness suitable for producing a desired crystal orientation. Lateral-seeded excimer laser annealing (LS-ELA) is used to crystallize the amorphous silicon to form a film with a preferred crystal orientation. A gate is formed overlying the polycrystalline film. The polycrystalline film is doped to produce source and drain regions.

Abstract: A bi-layer silicon electrode and its method of fabrication is described. The electrode of the present invention comprises a lower polysilicon film having a random grain microstructure, and an upper polysilicon film having a columnar grain microstructure.

Abstract: An ULSI MOSFET formed using silicon on insulator (SOI) principles includes masking regions of an amorphous silicon film on a substrate and exposing intended active regions. Laser energy is directed against the intended active regions to anneal these regions without annealing the masked regions, thereby increasing production throughput and decreasing defect density.

Abstract: There is disclosed a method of fabricating a thin-film transistor having excellent characteristics. Nickel element is held in contact with selected regions of an amorphous silicon film. Then, thermal processing is performed to crystallize the amorphous film. Subsequently, thermal processing is carried out in an oxidizing ambient containing a halogen element to form a thermal oxide film. At this time, the crystallinity is improved. Also, gettering of the nickel element proceeds. This crystalline silicon film consists of crystals grown radially from a number of points. Consequently, the thin-film transistor having excellent characteristics can be obtained.

Abstract: An n-type polysilicon thin film, an intrinsic polysilicon thin film and a p-type polysilicon thin film are formed on a transparent conductive film of a glass substrate by the plasma enhanced CVD method at a plasma excitation frequency of 81.36 MHz so as to obtain a photoelectric conversion layer. The n-type polysilicon thin film and the intrinsic polysilicon thin film are then formed so that the crystallization ratio of the n-doped layer located on the incident light side becomes equal to or greater than the crystallization ratio of the intrinsic layer. Thus, a thin film solar cell having an appropriate structure of a junction interface between the n-layer and the intrinsic layer is obtained.

Abstract: An insulating film 103 for making an under insulating layer 104 is formed on a quartz or semiconductor substrate 100. Recesses 105a to 105d corresponding to recesses 101a to 101d of the substrate 100 are formed on the surface of the insulating film 103. The surface of this insulating film 103 is flattened to form the under insulating layer 104. By this flattening process, the distance L1, L2, . . . , Ln between the recesses 106a, 106b, 106d of the under insulating layer 104 is made 0.3 &mgr;m or more, and the depth of the respective recesses is made 10 nm or less. The root-mean-square surface roughness of the surface of the under insulating film 104 is made 0.3 nm or less. By this, in the recesses 106a, 106b, 106d, it can be avoided to block crystal growth of the semiconductor thin film, and crystal grain boundaries can be substantially disappeared.

Abstract: Various semiconductor device structures that include an inductor or balun can be formed using a semiconductor structure having a monocrystalline silicon substrate, an amorphous oxide material overlying the monocrystalline silicon substrate, a monocrystalline perovskite oxide material overlying the amorphous oxide material; and a monocrystalline compound semiconductor material overlying the monocrystalline perovskite oxide material, and/or other types of material such as metals and non-metals.

Abstract: Multijunction solar cell structures (100) including high quality epitaxial layers of monocrystalline semiconductor materials that are grown overlying monocrystalline substrates (102) such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers are disclosed. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer (104) on a silicon wafer. The accommodating buffer (104) layer is a layer of monocrystalline material spaced apart from the silicon wafer by an amorphous interface layer (112) of silicon oxide. The amorphous interface layer (112) dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Multiple and varied accommodating buffer layers can be used to achieve the monolithic integration of multiple non-lattice matched solar cell junctions.

Abstract: To effectively crystallize an amorphous semiconductor film comprising silicon by utilizing nickel element and remove nickel element contributed to the crystallization, a mask 103 is provided on an amorphous silicon film 102, oxide film patterns 107 and 108 including nickel are formed, phosphorus is doped in a region 109, thereafter, heating is performed, nickel element is diffused via paths 110 and 111 and nickel element diffuses in the amorphous silicon film and gettered by phosphorus at the region 109 by which crystallization of diffusion of nickel and gettering of nickel can be carried out simultaneously.

Abstract: A novel and very useful method for forming a crystal silicon film by introducing a metal element which promotes crystallization of silicon to an amorphous silicon film and for eliminating or reducing the metal element existing within the crystal silicon film thus obtained is provided. The method for fabricating a semiconductor device comprises steps of intentionally introducing the metal element which promotes crystallization of silicon to the amorphous silicon film and crystallizing the amorphous silicon film by a first heat treatment to obtain the crystal silicon film; eliminating or reducing the metal element existing within the crystal silicon film by implementing a second heat treatment within an oxidizing atmosphere; eliminating a thermal oxide film formed in the previous step; and forming another thermal oxide film on the surface of the region from which the thermal oxide film has been eliminated by implementing another thermal oxidation.

Abstract: There is disclosed a method of fabricating a thin-film transistor having excellent characteristics. Nickel element is held in contact with selected regions of an amorphous silicon film. Then, thermal processing is performed to crystallize the amorphous film. Subsequently, thermal processing is carried out in an oxidizing ambient containing a halogen element to form a thermal oxide film. At this time, the crystallinity is improved. Also, gettering of the nickel element proceeds. This crystalline silicon film consists of crystals grown radially from a number of points. Consequently, the thin-film transistor having excellent characteristics can be obtained.

Abstract: A semiconductor thin film having extremely superior crystallinity and a semiconductor device using the semiconductor thin film having high performance are provided. The semiconductor thin film is manufactured in such a manner that after an amorphous semiconductor thin film is crystallized by using a catalytic element, a heat treatment is carried out in an atmosphere containing a halogen element to remove the catalytic element. The thus obtained crystalline semiconductor thin film has substantially {110} orientation. The concentration of C, N, and S remaining in the final semiconductor thin film is less than 5×1018 atoms/cm3, and the concentration of O is less than 1.5×1019 atoms/cm3.

Abstract: A bottom-gate type thin-film transistor free from alignment shift of the gate electrode and from damage caused by injection of impurities. The crystal grains of a polycrystalline silicon thin-film are anisotropically grown to form a prescribed angle relative to the gate length direction. The angle between the gate length direction and the longitudinal direction of the grains is adjusted according to use of the liquid crystal display unit. The bottom-gate transistor includes an undercoat insulating layer containing impurities on the substrate. Impurities are diffused from the undercoat layer to the semiconductor layer by laser-annealing the amorphous silicon.

Abstract: With regard to a semiconductor apparatus thermally stable in a post process and suitable for fabricating a gate insulator having a laminated structure with various high permittivity oxides and a process of producing the same, in order to achieve high function formation of a gate insulator 8, a silicon nitride film specific inductive capacity of which is approximately twice as much as that of silicon oxide and which is thermally stable and is not provided with Si—H bond, is used as at least a portion of the gate insulator 8. Further, an effective thickness of a gate insulator forming a multilayered structure insulator laminated with a metal oxide having high dielectric constant, in conversion to silicon oxide, can be thinned to less than 3 nm while restraining leakage current.

Abstract: The present invention provides a water-soluble luminescent quantum dot, a biomolecular conjugate thereof and a composition comprising such a quantum dot or conjugate. Additionally, the present invention provides a method of obtaining a luminescent quantum dot, a method of making a biomolecular conjugate thereof, and methods of using a biomolecular conjugate for ultrasensitive nonisotopic detection in vitro and in vivo.

Abstract: A semiconductor thin film having extremely superior crystallinity and a semiconductor device using the semiconductor thin film having high performance are provided. The semiconductor thin film is manufactured in such a manner that after an amorphous semiconductor thin film is crystallized by using a catalytic element, a heat treatment is carried out in an atmosphere containing a halogen element to remove the catalytic element. The thus obtained crystalline semiconductor thin film has substantially {110} orientation. The concentration of C, N, and S remaining in the final semiconductor thin film is less than 5×1018 atoms/cm3, and the concentration of O is less than 1.5×1019 atoms/cm3.

Abstract: The invention relates to a MOSFET with a doped silicon source layer and a doped polycrystalline silicon gate layer and a doped silicon drain layer and to a method of fabricating the layers of such a transistors, in which an otherwise possible interaction between closely spaced layers or structural components of decreased size is eliminated or at least substantially reduced by incorporation in at least one layer of the MOSFET of an element from Group IV in a predetermined concentration.

Abstract: A high quality semiconductor device comprising at least a semiconductor film having a microcrystal structure is disclosed, wherein said semiconductor film has a lattice distortion therein and comprises crystal grains at an average diameter of 30 Å to 4 &mgr;m as viewed from the upper surface of said semiconductor film and contains oxygen impurity and concentration of said oxygen impurity is not higher than 7×1019 atoms.cm−3 at an inside position of said semiconductor film. Also is disclosed a method for fabricating semiconductor devices mentioned hereinbefore, which comprises depositing an amorphous semiconductor film containing oxygen impurity at a concentration not higher than 7×1019 atoms.cm−3 by sputtering from a semiconductor target containing oxygen impurity at a concentration not higher than 5×1018 atoms.

Abstract: An Ta film for use in forming a source electrode and a drain electrode and an amorphous silicon film for use in forming an amorphous silicon semiconductor layer with impurity are continuously etched without setting an etching selectivity ratio. As a result, the source electrode, the drain electrode and the amorphous silicon semiconductor can be formed by a single etching process, and in the meantime, surface protrusions and recessions can be formed in a back channel region on the order of several hundreds of Å reflecting the crystal grain diameters of the Ta film for use in forming the source electrode and the drain electrode. The resulting protrusions and recessions offers an effect of suppressing an increase in OFF-state current value of the thin film transistor, and according to the foregoing method, the thin film transistor can be manufactured through a reduced number of steps at lower cost.

Abstract: A thin film transistor includes: a) a thin film transistor layer comprising a source region, a channel region and a drain region; the thin film transistor layer further comprising a drain offset region positioned between the drain region and the channel region; b) the channel region being substantially polycrystalline and having a first average crystalline grain size; and c) the drain offset region being substantially polycrystalline and having a second average crystalline grain size, the second average crystalline grain size being larger than the first average crystalline grain size. A method for forming such a construction using polycrystalline materials, preferably polysilicon, and an amorphizing silicon implant with subsequent recrystallization is also disclosed.

Abstract: A method of making a semiconductor device and the device. The device, according to a first embodiment, is fabricated by providing a silicon (111) surface, forming on the surface a dielectric layer of crystalline silicon nitride and forming an electrode layer on the dielectric layer of silicon nitride. The silicon (111) surface is cleaned and made atomically flat. The dielectric layer if formed of crystalline silicon nitride by placing the surface in an ammonia ambient at a pressure of from about 1×10−7 to about 1×10−5 Torr at a temperature of from about 850° C. to about 1000° C. The electrode layer is heavily doped silicon. According to a second embodiment, there is provided a silicon (111) surface on which is formed a first dielectric layer of crystalline silicon nitride having a thickness of about 2 monolayers.

Abstract: First, a polysilicon film is formed on a gate oxide film. Next, a polysilicon oxide film is formed on the polysilicon film. Thereafter, the polysilicon film is thermally treated to allow a crystal grain in the polysilicon film to grow from the gate oxide film and the polysilicon oxide film. In a MOS type semiconductor device manufactured in this manner has a gate electrode formed of a plurality of laminated polycrystalline silicon layers each having substantially a single crystal grain in a thickness direction of the gate electrode.

Abstract: A method for manufacturing a diode having a relatively improved on-off ratio. The diode is formed in a container in an insulative structure layered on a substrate of an integrated circuit. The container is then partially filled with a polysilicon material, by methods such as conformal deposition, leaving a generally vertical seam in the middle of the polysilicon material. An insulative material is deposited in the seam. The polysilicon material is appropriately doped and electrical contacts and conductors are added as required. The diode can be coupled to a chalcogenide resistive element to create a chalcogenide memory cell.

Abstract: A monolithically integrated, multi-layer device is fabricated with single crystal films of desired orientation grown from arrayed nucleation sites on amorphous and/or non-single crystal surfaces. Examples of devices which can be produced are CMOS and bipolar devices in single crystal (100) and (111) Si films on amorphous surfaces such as SiO2 or Si3N4 in processed ULSIC wafers. These devices can be integrated along the 3rd dimension. Thus, 3-dimensional IC's can be fabricated. Similarly, high performance CMOS devices in SiGe films, MESFET, HEMT and optical devices in compound semiconductor films, can be fabricated within processed ULSIC wafers. Further, Si—, GaAs—, and other compound semiconductor-based devices in the respective single crystal films with different orientations deposited selectively in a given level, and in multilevel IC's, can be manufactured.

Abstract: The present invention relates to a method of crystallizing an amorphous silicon thin film by thermal annealing the amorphous silicon thin film vapor deposited on a substrate in order to form a polycrystalline silicon thin film, and a semiconductor device fabricated by the method. According to the present invention, it is constructed such that a light-absorbing layer having absorbance of light much higher than that of the substrate or the amorphous silicon thin film is formed around the amorphous silicon thin film and is heated by a lamp when crystallizing the amorphous silicon thin film vapor deposited on the substrate by rapid annealing. Therefore, the temperature of the amorphous silicon thin film can be raised while restraining the increase in temperature of the substrate to the utmost. Accordingly, the amorphous silicon thin film can be crystallized without deformation of the substrate.

Abstract: A process for fabricating a highly stable and reliable semiconductor, comprising: coating the surface of an amorphous silicon film with a solution containing a catalyst element capable of accelerating the crystallization of the amorphous silicon film, and heat treating the amorphous silicon film thereafter to crystallize the film.

Abstract: In case of growing a polycrystalline silicon layer (10) by catalytic CVD on a substrate (4) such as glass substrate, quartz substrate or silicon substrate having formed an oxide film on its surface, the total pressure of the growth atmosphere is maintained in the range from 1.33×10−3 Pa to 4 Pa at least in the initial period of the growth, or alternatively, partial pressure of oxygen and moisture in the grow that atmosphere is maintained in the range from 6.65×10−10 to 2×10−6 Pa at least in the initial period of the growth. Thus, the maximum oxygen concentration of the grown polycrystalline silicon layer (10) becomes not higher than 3×1018 atoms/cm−3 at least in a region of the polycrystalline silicon layer with the thickness of 10 nm from the boundary with the substrate (4). It is thus ensured to grow a high-quality polycrystalline silicon layer having a quality required for use as a TFT polycrystalline silicon layer by catalytic CVD.

Abstract: A crystalline silicon film is formed on a substrate containing OH group at 50-2,000 ppm and chlorine at 10-1,000 ppm at a process temperature range of 640°-980° C. by utilizing nickel. A thermal oxidation film is formed on the crystalline silicon film at a process temperature within the above range in an atmosphere containing HCl. By virtue of the action of chlorine, nickel is gettered into the thermal oxidation film. By removing the thermal oxidation film, a crystalline silicon film is obtained which has superior crystallinity and a low nickel concentration.

Abstract: Disclosed is a polysilicon film having high crystal orientation, low in nonuniformity in the crystal grain sizes, having the surface protrusion suppressed and, thus, adapted for use in a liquid crystal display. For manufacturing such an excellent polysilicon film, a native oxide layer formed on a surface of the amorphous silicon film is completely removed by using a hydrofluoric acid solution, followed by immersing the amorphous silicon film in an H2O2 solution for a short time so as to newly form an extremely thin oxide layer on the surface of the amorphous silicon film, prior to a crystallizing processing performed by a laser beam irradiation.

Abstract: A polycrystalline film of silicon including silicon grains having an aspect ratio, d/t, of more than 1:1, wherein “d” is the grain diameter and “t” is the grain thickness. The polycrystalline film of silicon can be used to form an electronic device, such as a monolithically integrated solar cell having ohmic contacts formed on opposed surfaces or on the same surface of the film. A plurality of solar cells can be monolithically integrated to provide a solar cell module that includes an electrically insulating substrate and at least two solar cells disposed on the substrate in physical isolation from one another. Methods for manufacturing the film, solar cell and solar cell module are also disclosed. The simplified structure and method allow for substantial cost reduction on a mass-production scale, at least in part due to the high aspect ratio silicon grains in the film.

Abstract: An a-Si film is patterned into a linear shape (ribbon shape) or island shape on a glass substrate. The upper surface of the a-Si film or the lower surface of the glass substrate is irradiated and scanned with an energy beam output continuously along the time axis from a CW laser in a direction indicated by an arrow, thereby crystallizing the a-Si film. This implements a TFT in which the transistor characteristics of the TFT are made uniform at high level, and the mobility is high particularly in a peripheral circuit region to enable high-speed driving in applications to a system-on glass and the like.

Abstract: A practical operational amplifier circuit is formed using thin film transistors.

Abstract: A practical operational amplifier circuit is formed using thin film transistors. An operational amplifier circuit is formed by thin film transistors formed on a quartz substrate wherein 90% or more of n-channel type thin film transistors have mobility at a value of 260 cm2/Vs or more and wherein 90% or more of p-channel type thin film transistors have mobility at a value of 150 cm2/Vs or more. The thin film transistors have active layers formed using a crystalline silicon film fabricated using a metal element that promoted crystallization of silicon. The crystalline silicon film is a collection of a multiplicity of elongate crystal structures extending in a certain direction, and the above-described characteristics can be achieved by matching the extending direction and the moving direction of carriers.

Abstract: An SRAM cell is arranged in a semiconductor device. A metal oxide semiconductor field effect transistor is arranged in the SRAM cell. An interlayer insulating film is formed on the metal oxide semiconductor field effect transistor. A load resistor conductive layer is formed on the interlayer insulating film. In addition, a wiring conductive layer which connects the gate electrode of the metal oxide semiconductor field effect transistor to the load resistor conductive layer is provided. The resistance of the wiring conductive layer is lower than the resistance of the load resistor conductive layer. A side wall is formed between the load resistor conductive layer and the wiring conductive layer.

Abstract: The solution (for example, a nickel acetate solution) containing a metal element such as nickel which accelerates the crystallization of silicon is applied to an amorphous silicon film by spin coating using a mask, to retain nickel in contact with the surface of the amorphous silicon film. Then, heating treatment is performed to crystallize selectively the amorphous silicon film, so that an amorphous region and a crystalline region are formed in the silicon film. In this state, the silicon film is heated to diffuse the metal element from the crystalline region to the amorphous region, thereby decreasing a concentration of the metal element in the crystalline region.

Abstract: After an amorphous semiconductor thin film is crystallized by utilizing a catalyst element, the catalyst element is removed by performing a heat treatment in an atmosphere containing a halogen element. A resulting crystalline semiconductor thin film has features that it exhibits {110} orientation and that almost all crystal lattices have continuity at a crystal boundary. This type of grain boundaries greatly contribute to improving the carrier mobility, and make it possible to realize semiconductor devices having very high performance.

Abstract: A process for the formation of shaped Group III-V semiconductor nanocrystals comprises contacting the semiconductor nanocrystal precursors with a liquid media comprising a binary mixture of phosphorus-containing organic surfactants capable of promoting the growth of either spherical semiconductor nanocrystals or rod-like semiconductor nanocrystals, whereby the shape of the semiconductor nanocrystals formed in said binary mixture of surfactants is controlled by adjusting the ratio of the surfactants in the binary mixture.

Abstract: In a semiconductor element comprising microcrystalline semiconductor, a semiconductor junction is provided within a microcrystal grain. Further, in a semiconductor element comprising microcrystalline semiconductor, microcrystal grains of different grain diameters are provided as a mixture to form a semiconductor layer. Thereby, discontinuity of a semiconductor junction is lessened to thereby improve the characteristics, durability, and heat resisting properties of a semiconductor element. Distortion in a semiconductor layer is also reduced.

Abstract: A thin-film transistor (TFT) which has a crystalline silicon active layer of excellent reliability and characteristics, and a method of fabricating such a TFT inexpensively are provided. In a TFT which has at least two low density impurity regions and a source/drain adjacent to a channel-forming region, catalyst elements which cause amorphous silicon to crystallize are included in the source/drain, and the density of said catalyst elements in the interface between the channel-forming region and the low-density impurity regions is less than that in the source/drain.

Abstract: A technique for forming a film of material (12) from a donor substrate (10). The technique has a step of introducing energetic particles (22) through a surface of a donor substrate (10) to a selected depth (20) underneath the surface, where the particles have a relatively high concentration to define a donor substrate material (12) above the selected depth. An energy source is directed to a selected region of the donor substrate to initiate a controlled cleaving action of the substrate (10) at the selected depth (20), whereupon the cleaving action provides an expanding cleave front to free the donor material from a remaining portion of the donor substrate.

Abstract: In order to obtain a thin-film transistor having high characteristics using a metal element for accelerating the crystallization of silicon, a nickel element is selectively added to the surface of an amorphous silicon film (103) in regions (101) and (102) and regions (108) to (110), and a heat treatment is carried out to grow crystals (horizontal growth) in directions parallel to the substrate as indicated by arrows (104) to (107). At this point, the regions (108) to (110) having a width of 5 &mgr;m or less serve as stopper regions so that horizontal growth starting from the regions (101) and (102) stops there. In this way, the horizontal growth regions can be formed with high controllability. Then a circuit such as a shift register can be constructed with a region having the same crystal growth form.

Abstract: A method of manufacturing a polycrystalline silicon film having a particular field effect mobility is disclosed. A first polycrystalline silicon film is formed on a transparent insulation substrate. The surface of the silicon film is oxidized, and an amorphous silicon film is formed on the first polycrystalline silicon film and oxide layer. The amorphous silicon film is subjected to a solid phase growth process to be converted to a second polycrystalline silicon film. The field effect mobility of the second polycrystalline silicon film can be adjusted to a desired value by controlling the relative thicknesses of the first and second polycrystalline silicon films.

Abstract: A process for fabricating a highly stable and reliable semiconductor, comprising: coating the surface of an amorphous silicon film with a solution containing a catalyst element capable of accelerating the crystallization of the amorphous silicon film, and heat treating the amorphous silicon film thereafter to crystallize the film.

Abstract: A semiconductor device having a plurality of crystalline silicon clusters. The semiconductor device is formed on an insulating surface and includes crystalline silicon clusters anchored with each other with substantially no grain boundary therebetween.

Abstract: A method for annealing amorphous silicon film to produce polycrystalline film suitable for thin-film transistors fabricated on glass substrates is provided. The method involves using the selective location of nickel on a predetermined region of silicon to define the pattern of the lateral growth front as the silicon is crystallized. The method defines the resistivity of the silicide formed. The method also defines a specific range of nickel thicknesses to form the nickel silicide. A minimum thickness ensures that a continuous layer of nickel silicide exists on the growth front to promote an isotropic lateral growth front to form a crystalline film having high electron mobility. A maximum thickness limit reduces the risk of nickel silicide enclaves in the crystalline film to degrade the leakage current. Strategic placement of the nickel helps prevent nickel silicide contamination of the transistor channel regions, which degrade the leakage current.