With High Resistivity (e.g., "intrinsic") Layer Between P And N Layers (e.g., Pin Diode) Patents (Class 257/656)
  • Patent number: 5329150
    Abstract: A semiconductor light wave detector which has a first layer of a highly doped n-type semiconducting substrate, a second layer of a highly doped n-type semiconducting material, a third layer of a distinct intrinsic semiconducting material and a fourth layer of a highly doped n-type semiconducting material similar to the second layer. First and second electrical connections are provided to the fourth layer and to at least one of the first and second layers. A plurality of pairs of Dirac-delta doped monoatomic layers are in the third layer, with the first monoatomic layer of each pair being a layer of donors and with the second monoatomic layer of each pair being acceptors spaced from the donor layer and positioned on the side thereof facing the fourth layer.
    Type: Grant
    Filed: February 8, 1993
    Date of Patent: July 12, 1994
    Assignee: Max Planck Gesellschaft zur Foerderung der Wissenschaften e.V.
    Inventors: Erdmann Schubert, Klaus Ploog, Albrecht Fischer
  • Patent number: 5313087
    Abstract: A polysilicon layer is provided with a p-type impurity, and masked with an oxide mask to define a p-type region of the polysilicon layer. A second impurity is then provided into first unmasked regions of the polysilicon layer. A second oxide mask is deposited and anisotropically etched to form spacers adjacent to the first oxide mask. The spacers define two diffusion barrier regions of the polysilicon layer adjacent to the p-type region. An n-type impurity is then provided into second unmasked regions of the polysilicon layer to form two n-type regions adjacent the diffusion barrier regions. The diffusion barrier regions prevent cross diffusion of the p-type and the n-type impurities within the polysilicon layer, while also being of sufficient dimensions to permit normal p/n operations.
    Type: Grant
    Filed: September 30, 1993
    Date of Patent: May 17, 1994
    Assignee: Micron Technology, Inc.
    Inventors: Hiang C. Chan, Pierre C. Fazan, Bohr-Winn Shih
  • Patent number: 5306925
    Abstract: According to the present invention, there is provided a nonlinear optical element including a p-i-n type photodiode (i layer is a light absorbing layer) provided with a barrier layer preventing the going-through of a majority carrier. In the nonlinear optical element of the present invention, since the charges are accumulated with the stop of carrier moving, there occur a deformation in energy band and change in internal electric field. Optical bistability can be attained even without an external circuit. Further, with a plurality of incident light, only one element can exhibit optical bistability therefor because there is no need to dispose an external circuit. According to a method of the present invention, it is possible to control bistability for one light by overlapping another light input to a carrier diffusing region generated by the one light.
    Type: Grant
    Filed: February 12, 1993
    Date of Patent: April 26, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yuji Abe, Yasunori Tokuda
  • Patent number: 5300791
    Abstract: A light emitting diode is provided with a window layer of ZnSSe semiconductor material having a second conductivity type. The second conductivity type ZnSSe window layer has a low electrical resistivity so that it can be used as a current spreading layer, and a bandgap higher than that of the active layer so that it is transparent to light emitted from the active layers. The second conductivity type ZnSSe window layer can be doped with a donor concentration of more than 10.sup.18 cm.sup.-3. Furthermore, its lattice constant is close to that of the active layers and confining layers so that deterioration in optical characteristic due to lattice mismatch is minimized.
    Type: Grant
    Filed: September 29, 1992
    Date of Patent: April 5, 1994
    Assignee: Industrial Technology Research Institute
    Inventors: Tzer-Perng Chen, Chin-Yuan Chen, Jyi-Ren Deng, Ming-Jiunn Jou, Biing-Jye Lee, Jenn-Yu Kao
  • Patent number: 5294843
    Abstract: A freewheeling diode device (10) for a commutation branch includes a first diode (12) with a soft recovery behavior and a second diode (14) with a snappy recovery behavior. The second diode (14) is connected in parallel to the first diode (12).
    Type: Grant
    Filed: October 26, 1992
    Date of Patent: March 15, 1994
    Assignee: Semikron Elektronik GmbH
    Inventors: Werner Tursky, Josef Lutz
  • Patent number: 5270556
    Abstract: A semiconductor device includes a layer on a substrate in which a two-dimensional electron gas is produced, source and drain electrodes disposed opposite each other on the substrate, and a gate electrode including a plurality of lower gate electrodes and an upper gate electrode. The lower gate electrodes are spaced at prescribed intervals in a direction perpendicular to a direction connecting the source and drain electrodes and connected to the layer only at their bottom surfaces. The upper gate electrode is disposed on the lower gate electrodes and electrically connects the lower gate electrodes to each other. When a bias voltage is applied to the gate electrode, a depletion layer spreads below the lower gate electrodes and the two-dimensional electron gas is concentrated beneath regions where the lower gate electrodes are absent, producing a quasi one-dimensional electron gas.
    Type: Grant
    Filed: July 30, 1992
    Date of Patent: December 14, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Teruyuki Shimura
  • Patent number: 5256887
    Abstract: A photovoltaic cell for use in a single junction or multijunction photovoltaic device, which includes a p-type layer of a semiconductor compound including silicon, an i-type layer of an amorphous semiconductor compound including silicon, and an n-type layer of a semiconductor compound including silicon formed on the i-type layer. The i-type layer including an undoped first sublayer formed on the p-type layer, and a boron-doped second sublayer formed on the first sublayer.
    Type: Grant
    Filed: July 19, 1991
    Date of Patent: October 26, 1993
    Assignee: Solarex Corporation
    Inventor: Liyou Yang
  • Patent number: 5243204
    Abstract: There are provided silicon carbide light emitting diodes having a p-n junction which is constituted by a p-type silicon carbide single-crystal layer and an n-type silicon carbide single-crystal layer formed thereon. In cases where light emission caused by recombination of free excitons is substantially utilized, at least a part of the n-type silicon carbide layer adjacent to the interface of the p-n junction is doped with a donor impurity at a concentration of 5.times.10.sup.16 cm.sup.-3 or lower. In cases where light emission caused by acceptor-associated recombination is substantially utilized, the p-type silicon carbide layer is doped with an acceptor impurity and at least a part of the n-type silicon carbide layer adjacent to the interface of the p-n junction is doped with a donor impurity at a concentration of 1.times.10.sup.18 cm.sup.-3 or higher. Also provided are a method for producing such silicon carbide light emitting diodes and a method for producting another silicon carbide light emitting diode.
    Type: Grant
    Filed: May 17, 1991
    Date of Patent: September 7, 1993
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akira Suzuki, Katsuki Furukawa, Yoshihisa Fujii
  • Patent number: 5237197
    Abstract: A VLSI radiation/particle detector includes detecting elements based on one or more PIN diodes which are biased for collecting the charge generated by incident radiation or ionizing particles, and readout circuitry integrated on the same chip for detecting the collected charge. The junction of the PIN diode and the well containing the readout circuitry are separated far from each other such that the bias voltage required on the well to direct most generated charge to the collection electrodes can be reduced, and these can be made smaller to improve the detector's spatial resolution.
    Type: Grant
    Filed: September 23, 1991
    Date of Patent: August 17, 1993
    Assignee: University of Hawaii
    Inventors: Walter Snoeys, Sherwood I. Parker
  • Patent number: 5225706
    Abstract: In a matrix array of photosensitive elements, each photosensitive point is provided with a photosensitive element (pin photodiode) in series with a capacitor between a row lead and a column lead. It is proposed to make use of a simplified photosensitive element in which an end semiconductor layer is suppressed such as, for example, the n-layer of a pin photodiode or the n-layer of a five-layer phototransistor of the nipin type. The dielectric of the capacitor then comes directly into contact with an intrinsic semiconductor layer in which electrons accumulate. These electrons reconstitute the equivalent of an n-type doped layer.
    Type: Grant
    Filed: February 25, 1991
    Date of Patent: July 6, 1993
    Assignee: Thomson-CSF
    Inventors: Jean L. Berger, Marc Arques
  • Patent number: 5216260
    Abstract: An optically bistable semiconductor device which has a doped or undoped gallium arsenide substrate and a series of alternating n-type and p-type Dirac-delta doped monoatomic layers formed on the substrate. Each Dirac-delta doped monoatomic layer is separated from the next adjacent Dirac-delta doped monoatomic layer by a layer of pure, undoped intrinsic semiconductor material such as gallium arsenide.
    Type: Grant
    Filed: June 27, 1991
    Date of Patent: June 1, 1993
    Assignee: Max-Planck Gesellschaft zur Foerderung der Wissenschaften e.V.
    Inventors: Erdmann Schubert, Klaus Ploog, Albrecht Fischer
  • Patent number: 5216275
    Abstract: A semiconductor power device wherein the reverse voltage across the p.sup.+ -regions(s) and the n.sup.+ -regions(s) is sustained by a composite buffer layer, shortly as CB-layer. The CB-layer contains two kinds of semiconductor regions with opposite types of conduction. These two kinds of regions are alternatively arranged, viewed from any cross-section parallel to the interface between the layer itself and the n.sup.+ (or p.sup.+)-region. Whereas the hitherto-used voltage sustaining layer contains only one kind of semiconductor with single type of conduction in the same sectional view. Design guidelines are also provided in this invention. The relation between the on-resistance in unit area Ron and the breakdown voltage V.sub.B of the CB-layer invented is Ron ocV.sub.B.sup.113 which represents a breakthrough to the conventional voltage sustaining layer, whereas the other performances of the power devices remain almost unchanged.
    Type: Grant
    Filed: September 17, 1991
    Date of Patent: June 1, 1993
    Assignee: University of Electronic Science and Technology of China
    Inventor: Xingbi Chen
  • Patent number: 5212398
    Abstract: In an integrated circuit device including a bipolar transistor, MOSFET, and protective diode for the MOSFET, all formed over a semiconductor substrate, the protective diode for holding an adequate electrostatic breakdown voltage for a gate oxide layer of the MOSFET is provided by forming a second conductivity type buried area continuous with, and in contact with, a second conductivity type region at a boundary between the first conductivity type semiconductor substrate and a first conductivity type second semiconductor layer. By doing so, a substantive junction depth Xj is made deeper as a whole with respect to the second conductivity type region. It is, therefore, possible to obtain a protective diode of adequate electrostatic breakdown-voltage characteristic which does not adversely affect the operation of the MOSFET even if a relatively thin semiconductor layer is employed.
    Type: Grant
    Filed: August 21, 1992
    Date of Patent: May 18, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taira Matsunaga, Bunshiro Yamaki
  • Patent number: 5181083
    Abstract: A PIN diode with a low voltage peak at the switching on comprises a P-type anode region (4) formed on a first surface of a low doped N-type substrate (1) and a cathode region (2) formed on the second surface of the substrate. The PIN diode comprises on a portion of the first surface an additional N.sup.+ -type region (7) in contact with the anode region for forming a junction with the latter. The additional region is connected to the cathode region.
    Type: Grant
    Filed: July 15, 1991
    Date of Patent: January 19, 1993
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Robert Pezzani