Entirely Of Metal Except For Feedthrough Patents (Class 257/708)
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Patent number: 6181560Abstract: A component for forming a chip package includes a flat insulative plate. A heat sink is embedded in a central portion of the plate, and a plurality of electrically conductive leads are embedded in peripheral portions of the insulative plate. The leads extend from the top surface of the plate to the bottom surface of the plate, and may also be exposed on side edges of the plate. A recess for receiving a chip may be formed at a central portion of the plate. A chip package utilizing the plate would include a chip mounted on the heat sink, a plurality of wires or solder bumps that connect bond pads on the chip to corresponding leads in the plate, and an insulating material that covers the chip. The insulating material could be a molding resin, or a separate cover plate that covers the chip. In the case of a cover plate, the cover plate may also include an embedded heat sink and embedded leads that can be connected to the embedded leads of the insulative plate.Type: GrantFiled: October 5, 1999Date of Patent: January 30, 2001Assignee: Hyundai Electronics Industries Co., Ltd.Inventor: Sun Dong Kim
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Patent number: 6153829Abstract: An electronic package that may include a first bond pad and a second bond pad located on a bond shelf. The bond shelf may have an edge. The package may have a first conductive bus that may be connected to the first bond pad by a first conductive strip that extends along the edge of the bond shelf. The package may also have a second conductive bus that may be connected to the second bond pad by a second conductive strip that extends along the edge of the bond shelf.Type: GrantFiled: September 15, 1998Date of Patent: November 28, 2000Assignee: Intel CorporationInventors: Elissa E. Carapella, Mark J. Palmer
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Patent number: 6150708Abstract: An integrated circuit employing both sides of a base substrate or wafer and a method of making the same are provided. In one aspect, the integrated circuit includes a base substrate that has a first side and a second side opposite the first side. The first side has a first semiconductor layer and a first isolation structure positioned thereon wherein the first side surrounds the first semiconductor layer. The second side has a second semiconductor layer and a second isolation structure positioned thereon wherein the second isolation structure surrounds the second semiconductor layer. A first circuit device is positioned on the first semiconductor layer. A second circuit device is positioned on the second semiconductor layer. The method enables simultaneous processing of both sides of a given wafer. Fabrication efficiency is increased through higher throughput and much higher yields per wafer.Type: GrantFiled: November 13, 1998Date of Patent: November 21, 2000Assignee: Advanced Micro Devices, Inc.Inventors: Mark I. Gardner, H. Jim Fulford, Charles E. May
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Patent number: 6150716Abstract: A package for mounting an integrated circuit chip to a circuit board or the like is provided. The package includes a chip carrier which has a metal substrate including first and second opposed faces. A dielectric coating is provided on at least one of the faces, which preferably is less than about 20 microns in thickness, and preferably has a dielectric constant from about 3.5 to about 4.0. Electrical circuitry is disposed on the dielectric coating, said circuitry including chip mounting pads, connection pads and circuit traces connecting the chip mounting pads to the connection pads. An IC chip is mounted by flip chip or wire bonding or adhesive connection on the face of the metal substrate which has the dielectric coating thereon. In any case, the IC chip is electrically connected to the chip mounting pads either by the solder ball or wire bond connections.Type: GrantFiled: January 15, 1997Date of Patent: November 21, 2000Assignee: International Business Machines CorporationInventors: Stephen Wesley MacQuarrie, Wayne Russell Storr, James Warren Wilson
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Patent number: 6130821Abstract: A multi-chip assembly (100) uses a clip (110) to retain multiple integrated circuits (124-130) to an assembly substrate (140). The use of a thermal medium between the integrated circuits and the heat sinks (120, 122) allows the assembly to be disassembled for rework purposes. The clip contains edge clamps (112), alignment rails (114), and alignment features (116, 316, 416) to properly orient the clip, heat sink, integrated circuits, and assembly substrate.Type: GrantFiled: December 3, 1998Date of Patent: October 10, 2000Assignee: Motorola, Inc.Inventor: Mark Allen Gerber
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Patent number: 6091022Abstract: A header structure for a semiconductor pressure transducer includes a cylindrical glass member located within a tubular housing having a closed end. A tubular core member extends through a central axial hole in the glass member. The core member has a sealed end proximate the closed end of the housing and an opposite end. A plurality of electrically conductive terminal pins extend through the glass member in surrounding relation to the core member and exit the housing through a plurality of holes in the closed end. A semiconductor die is mounted adjacent the opposite end of the core member and is electrically connected to the surrounding terminal pins by wire leads.Type: GrantFiled: December 17, 1998Date of Patent: July 18, 2000Assignee: Honeywell Inc.Inventor: Joel J. Bodin
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Patent number: 6084296Abstract: A method for providing pre-placed, pre-brazed feed throughs in the substrate of a hermetic package corresponding to the terminal leads of the encased circuit COTS components. The substrate may include directly bonded copper (DBC) regions forming circular shapes where the holes for the special connectors of the present invention will be located. These holes will correspond to the leads of the COTS component that will be mounted to it. Holes are laser or mechanically drilled into the substrate inside the circular shapes formed in the DBC. To form the feed through, a bushing, such as a blind copper rivet, is brazed in the hole, with the open end thereof oriented toward the component-side of the substrate. These open ends can accept the leads of the COTS component, like the holes of a conventional PC circuit board.Type: GrantFiled: July 9, 1998Date of Patent: July 4, 2000Assignee: Satcon Technology CorporationInventors: Gary M. Colello, Dennis E. Hartzell
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Patent number: 6078101Abstract: In a high-power microwave hybrid integrated circuit comprising package-free semiconductor devices 5 with contact pads, a dielectric substrate 1 containing holes 3 and a topological pattern on its front side and a shielding metallization 2 on its opposite side, a metallic header 4 with projections 6 adjoining the shielding metallization 2 of the dielectric substrate 1 and passing through the holes 3 thereof, said semiconductor devices 5 being mounted on the projections 6 of the header 4 such that their surfaces with the contact pads flush level with a front side of the dielectric substrate 1, a part of said contact pads being connected to the topological pattern of the metallization and a part thereof being connected to the projections 6 of the header 4, the improvements consisting in that the metallic header 4 is provided with holes 3 where its projections 6 are mounted, said projections 6 being fabricated in the form of inserts rigidly secured in said holes 3 and made of material with a thermal conductivityType: GrantFiled: April 28, 1999Date of Patent: June 20, 2000Assignee: Samsung Electronics Co., Ltd.Inventors: Eduard Volfovich Aizenberg, Vladimir Iljich Bejl, Yurij Petrovich Klyuev
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Patent number: 6075289Abstract: A thermally enhanced semiconductor package includes a sheet metal cap having flexible flanges provided with solder contacts for reliable attachment to a circuit board. The package assembly further includes a semiconductor chip with a contact-bearing front surface facing forwardly, and chip bonding contacts overlying the front face of the chip. The flange bonding contacts are coplanar with the chip bonding contacts, or can be brought into coplanar alignment by flexure of the cap. The package can be surface-mounted to a circuit board by placing the package onto pads of solder paste, and then heating the assembly to melt the solder paste in order to join the bonding contacts on the chip and on the flange to corresponding contacts on the circuit board.Type: GrantFiled: November 4, 1996Date of Patent: June 13, 2000Assignee: Tessera, Inc.Inventor: Thomas H. Distefano
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Patent number: 6057599Abstract: In a power microwave hybrid integrated circuit, a recess (10) is formed on the back side of a board (5) under a projection (2) of a base (1), the recess (10) having holes (11) of a definite size in the bottom thereof, while the upper portion of the projection (2) of the base (1) not occupied with a chip (3) is electrically connected to the bottom of the recess (10), a grounding of a portion of bonding pads (4) of the chip (3) being performed through the holes (11) in the bottom of the recess (10), the spacing between the chip (3) and the walls of a hole (8) for mounting the chip (3) being less than 150 .mu.m and the grounding hole (11) being less than 150 .mu.m.Type: GrantFiled: May 26, 1998Date of Patent: May 2, 2000Assignee: Samsung Electronics Co., Ltd.Inventors: Viktor Anatolievich Iovdalsky, Eduard Volfovich Aizenberg, Vladimir Iliich Beil
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Patent number: 6034425Abstract: A micro ball grid array package is devised for a multiple-chip module (MCM). The IC chips in the package are butted together to save space. The bonding pads for the lower IC chip or chips are placed along the edges not butted with one another. The bonding pads of the chips are wire-bonded to a printed wiring plate, which has via holes through the printed wiring plate for connection to the ball grid array at the other side of the printed wiring plate and for surface mounting to a printed circuit board. A heat dissipating plate may be placed at the top of the IC chips away from the ball grid array.Type: GrantFiled: March 17, 1999Date of Patent: March 7, 2000Assignee: ChipMOS Technologies Inc.Inventors: Kuo-Ning Chiang, Wen-Hwa Chen, Kuo-Tai Tseng
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Patent number: 6034424Abstract: A low-capacitance package having a wide hole, an L-shaped lead pin, other linear lead pins, an insulating material filling in the hole for fixing the L-shaped lead pin and another pin in the hole. Projecting from the hole, the horizontal part of the L-shaped pin is separated from the insulating material and stands higher than the surface of the package. A semiconductor device chip is fixed directly on the horizontal part of the L-shaped pin.Type: GrantFiled: July 29, 1997Date of Patent: March 7, 2000Assignee: Sumitomo Electric Industries, Ltd.Inventors: Yasushi Fujimura, Yoshiki Kuhara
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Patent number: 5998858Abstract: A secure electronic data module containing a monolithic semiconductor chip of the type having a memory that is protected by a combination of hardware and software mechanisms such that unauthorized access to the data stored in the memory is prevented. The monolithic semiconductor chip comprises a plurality of solder bumps for attaching the chip to a substrate that may be a printed circuit board or another chip; a multi-level interlaced power and ground lines using minimum geometries; and a detection circuit block for detecting an external trip signal that may be produced by a pre-specified change in an operating condition brought on by unauthorized accessing, or an internal trip signal that may be produced by shorting of power and ground lines or by a change in an oscillator's frequency, also associated with or appurtenant to unauthorized accessing of the secure memory.Type: GrantFiled: July 19, 1996Date of Patent: December 7, 1999Assignee: Dallas Semiconductor CorporationInventors: Wendell L. Little, Stephen M. Curry, Steven N. Grider, Mark L. Thrower, Steven N. Hass, Michael L. Bolan, Ricky D. Fieseler, Bradley M. Harrington
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Patent number: 5963434Abstract: In a liquid crystal display (LCD) unit for a cellular phone or the like, the conventional reflection tape attached to the lightguide is eliminated in favor of a reflection strip disposed on a reflection area of the printed circuit board (PCB). The reflection strip serves to reflect light from the PCB back to the LCD display area and/or the keys of the keypad. By eliminating the reflection tape, manufacturing is made easier and manufacturing costs are reduced.Type: GrantFiled: February 27, 1998Date of Patent: October 5, 1999Assignee: Ericsson Inc.Inventors: Anders Jonsson, Jeffrey F. Brady
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Patent number: 5942796Abstract: An electronic device structure includes a ceramic base and a ceramic lid. The base has a ceramic body with sides and a bottom defining an interior cavity of the ceramic body. There is a first body aperture through the bottom of the ceramic body, a first metallic base pad affixed to an exterior of the bottom of the ceramic body and overlying the first body aperture, a second aperture through the bottom of the ceramic body, and a second metallic base pad affixed to an exterior of the bottom of the ceramic and overlying the second aperture. The second base pad has a second base pad aperture therethrough aligned with the second aperture. A bonding button is positioned within the interior cavity and overlying the second aperture. The bonding button is formed of a bonding pad in the interior of the ceramic and an integral connector extending through the second aperture and the second base pad aperture and affixed to the second base pad.Type: GrantFiled: November 17, 1997Date of Patent: August 24, 1999Assignee: Advanced Packaging Concepts, Inc.Inventors: Ben Mosser, Kenneth Jones
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Patent number: 5905304Abstract: A surface mount semiconductor package includes washing grooves disposed on a bottom surface of a plastic housing. The package also employs locking elements for locking the plastic housing to a metal pad on which a semiconductor device is mounted, where the locking elements include a cross bar between terminals, slots disposed on the metal pad which include barbs and dove-tail grooves disposed on the metal pad. The metal pad includes a waffled surface for improved coupling to a substrate. The package includes terminals having offset portions for providing spaces for the plastic housing material to fill for improved encapsulation of the terminals. The metal pad extends beyond the lateral edges of the plastic housing for improved heat dissipation and for providing a surface to couple to a heatsink.Type: GrantFiled: July 15, 1997Date of Patent: May 18, 1999Assignee: International Rectifier CorporationInventors: Peter R. Ewer, Arthur Woodworth
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Patent number: 5880524Abstract: An apparatus for spreading the heat generated by a semiconductor device. In one embodiment, a semiconductor device, such as a CPU, is mounted to a package substrate. A cover is attached to the package substrate creating a space therebetween for accommodating the semiconductor device. The package cover includes an external top surface and an external bottom surface and an inner cavity that comprises a heat pipe. The semiconductor device is thermally coupled to the bottom external surface of the cover.Type: GrantFiled: May 5, 1997Date of Patent: March 9, 1999Assignee: Intel CorporationInventor: Hong Xie
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Patent number: 5877553Abstract: In a packaging arrangement suitable for semiconductor devices, a semiconductor chip is mounted on a surface of an aluminum base with a bonding layer interposed therebetween. The aluminum base has a capability to favorably dissipate heat from the semiconductor chip. The bonding layer consists of a resilient and heat conductive material such as silicone resin mixed with silver powder so that thermal strain of the metal base is accommodated by the resiliency of the bonding layer, and is prevented from adversely affecting the electronic component chip even though the aluminum base demonstrates a substantially more significant thermal expansion than the semiconductor chip. It is therefore possible to achieve a high reliability in the packaging of semiconductor devices at a minimum cost.Type: GrantFiled: October 31, 1996Date of Patent: March 2, 1999Assignee: NHK Spring Co., Ltd.Inventors: Osamu Nakayama, Koji Ishikawa
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Patent number: 5654676Abstract: A voltage controlled oscillator module (100) (400) provides tuning capability for the VCO in a shielded environment. The module includes a trimmable capacitor (110) (410) having metal plates (112, 114), (412, 414, 416) capacitively coupled through the substrate. One of the metal plates (114) (416) is a trimmable plate which can be trimmed to tune the VCO frequency. The trimmable metal plate (114) (416) remains exposed on the bottom surface (108) (408) of the substrate (104) (404) so that the frequency of the VCO can be tuned while the reminder of the oscillator circuitry (102) (402) on the top surface (106) (406) is encapsulated by a ground shield (116) (418).Type: GrantFiled: June 10, 1996Date of Patent: August 5, 1997Assignee: Motorola, Inc.Inventors: Branko Avanic, Anthony J. Suppelsa, David C. Everest, III
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Patent number: 5650755Abstract: A voltage controlled oscillator module assembly (300) minimizes microphonics in a low profile package. Included within the module (300) are a substrate (302), VCO circuitry (308), and a ground shield (314) encapsulating the VCO circuitry. Included within the VCO circuitry (308) is at least one resonator (310) which is solderable on at least two of its surfaces. One surface of the resonator (310) is soldered to the substrate (302) while another surface of the resonator is soldered to the shield (314). An improved ground is thus provided to the resonator (310) which reduces the occurrences of microphonics while providing a low profile package for the module (300).Type: GrantFiled: March 18, 1996Date of Patent: July 22, 1997Assignee: Motorola, Inc.Inventors: Branko Avanic, Anthony J. Suppelsa, David C. Everest, III
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Patent number: 5635754Abstract: The radiation shielded and packaged integrated circuit semiconductor device includes a lid secured to a base to enclose the integrated circuit die within, wherein the lid and the base are each constructed from a high-Z material to prevent radiation from penetrating therethrough. Another embodiment includes a die attach slug constructed from a high-Z material disposed between the integrated circuit die and a base, in combination with a high-Z material lid to substantially block incident radiation.Type: GrantFiled: January 13, 1995Date of Patent: June 3, 1997Assignee: Space Electronics, Inc.Inventors: David J. Strobel, David R. Czajkowski
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Patent number: 5367196Abstract: There is provided a molded plastic electronic package having improved thermal dissipation. A heat spreader, formed from aluminum or an aluminum alloy, is partially encapsulated in the molding resin. Forming a black anodization layer on the surface of the heat spreader improves both thermal dissipation and adhesion to the molding resin.Type: GrantFiled: September 17, 1992Date of Patent: November 22, 1994Assignee: Olin CorporationInventors: Deepak Mahulikar, Jeffrey S. Braden, Szuchain F. Chen
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Patent number: 5365108Abstract: A power semiconductor assembly, particularly a semiconductor switch assembly which has a number of discrete emitter connection pads, comprised of a metal matrix composite housing and a copper or aluminum post with a cross-sectional area sufficiently large to carry the rated current providing a single-point, external connection to all emitter pads. The post passes through and is supported by an insulating ceramic insert such as aluminum oxide in the wall of the metal matrix composite housing. The post is hollowed out in the region where it passes through the ceramic insert in order to reduce the mechanical stress between the post and the insulating insert as a result of the mismatch in their thermal expansion coefficients. Buses on either side of the semiconductor die provide surfaces for connection from the post to the discrete emitter connection pads on the die.Type: GrantFiled: November 19, 1992Date of Patent: November 15, 1994Assignee: Sundstrand CorporationInventors: W. Kyle Anderson, Richard J. Hoppe, William J. Durako, Jr., Mark Metzler, Lawrence Hughes, Stephen E. Jackson
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Patent number: 5338971Abstract: An electronic device structure which comprises a metal plate, a semiconductor material chip attached to the plate, terminal leads, interconnection wires between the leads and metallized regions of the chip, and a plastic body which encapsulates the whole with the exception of a surface of the plate and part of the leads. This structure has highly reliable means of electrical connection between at least one metallized region and the metal plate which comprise at least one metal beam resting onto the plate and being attached thereto by studs integral with the plate, and at least one wire welded between a metallized region of the chip and the metal beam between the studs. At least a portion of the beam and its connection wire are encapsulated within the plastics body.Type: GrantFiled: November 27, 1992Date of Patent: August 16, 1994Assignee: SGS-Thomson Microelectronics, S.r.l.Inventors: Paolo Casati, Marziano Corno, Giuseppe Marchisi
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Patent number: 5241452Abstract: Disclosed is a heat-sink equipped package in which a heat sink has a plurality of flat plates arranged in a row, and both end plates have a rectangular shape, while those plates located between the end plates are each an inverted trapezoid having the bottom side shorter than the top side. This structure of the heat sink allows air to easily flow through the bottom portions of the plates. The cooling air therefore leaks outside less, and passes through the spacings between the plates, increasing the cooling performance of the heat sink and improving the cooling efficiency of the package.Type: GrantFiled: September 10, 1992Date of Patent: August 31, 1993Assignee: NEC CorporationInventor: Sakae Kitajo
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Patent number: 5216283Abstract: A semiconductor device is disclosed having an electronic component mounted to a mounting surface opposite a heat transfer surface of a die support member. The electronic component includes a plurality of bonding pads each electrically coupled to a plurality of package leads by a number of inner leads. A package body encloses the electronic component, the inner leads, the proximal ends of the package leads and the mounting surface of the die support member. The package body includes an opening exposing a portion of the heat transfer surface of the die support member. An insertable thermally conductive heat sink extends into the opening in the package body making thermal contact with the heat transfer surface of the die support member. A thermally conductive electrically insulating adhesive joins the heat sink to the package body securing the heat sink to the package body. In the assembly process, the package body is formed prior to attachment of the heat sink.Type: GrantFiled: May 3, 1990Date of Patent: June 1, 1993Assignee: Motorola, Inc.Inventor: Paul T. Lin