In Combination With Capacitor Element (e.g., Dram) Patents (Class 257/71)
  • Patent number: 10319797
    Abstract: An organic light-emitting display apparatus includes: a substrate including a display area and a peripheral area at an outer side of the display area; a pixel electrode disposed in the display area of the substrate; a pixel-defining layer disposed on the pixel electrode and exposing at least a portion of the pixel electrode; an intermediate layer disposed on the pixel electrode; an opposite electrode disposed on the intermediate layer; a first conductive layer disposed in the peripheral area of the substrate and including at least one opening; a first block structure and a second block structure disposed on the first conductive layer and separated from each other with the at least one opening therebetween; and an encapsulation structure disposed on the opposite electrode in the display area and the peripheral area.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: June 11, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Changmok Kim, Jinho Kwack
  • Patent number: 10304395
    Abstract: In one embodiment, a display device includes a pair of substrates including a display area in which pixels are arranged, pixel electrodes and a memories provided in the pixels, signal lines supplied with digital signals, switching elements connecting the memories and the signal lines, scanning lines supplied with scanning signals, and first and second driver units. The first and second driver units are provided in a peripheral area. The first driver unit includes first circuit units connected to the signal lines. The first circuit units include first and second circuits. The first and second circuits are arranged in a second direction intersecting with a first direction, and are out of alignment in the first direction.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: May 28, 2019
    Assignee: Japan Display Inc.
    Inventor: Takehiro Shima
  • Patent number: 10276601
    Abstract: According to one embodiment, a display device includes an insulating substrate, a first transistor including a first semiconductor layer of silicon and a first electrode, a first insulating layer provided above the first semiconductor layer, a second transistor including a second semiconductor layer of an oxide semiconductor, a second electrode and a conductive layer electrically connected to the second semiconductor layer, and a second insulating layer provided above the first insulating layer and the second semiconductor layer, the first electrode being electrically connected to the first semiconductor layer in a first hole, and the second electrode being in contact with the conductive layer in a second hole.
    Type: Grant
    Filed: August 22, 2017
    Date of Patent: April 30, 2019
    Assignee: Japan Display Inc.
    Inventors: Noriyoshi Kanda, Arichika Ishida, Masayoshi Fuchi
  • Patent number: 10269925
    Abstract: The present invention provides a manufacture method of a Low Temperature Poly-silicon TFT substrate and a Low Temperature Poly-silicon TFT substrate, in which by locating one heat sink layer under the amorphous silicon layer in advance, the difference of the crystallizations of the polysilicons in the drive area and the display area can exist after implementing an Excimer Laser Annealing process to the amorphous silicon layer, and in the drive area, the polysilicon with the larger lattice dimension is formed to promote the electron mobility; the fractured crystals can be achieved in the crystallization process of the display area to form the polysilicon with the smaller lattice dimension for ensuring the uniformity of the grain boundary and raising the uniformity of the current, and thus, the electrical property demands for the different TFTs can be satisfied to raise the light uniformity of the OLED.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: April 23, 2019
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zhandong Zhang, Fuhsiung Tang
  • Patent number: 10262606
    Abstract: According to one embodiment, a display device includes a pair of substrates including a display area in which pixels are arranged, pixel electrodes and memories provided in the pixels, signal lines supplied with digital signals, switching elements connecting the memories and the signal lines, scanning lines supplied with scanning signals, a first driver unit, and a second driver unit. The first driver unit is provided in a peripheral area around the display area, and supplies the digital signal to the signal line. The second driver unit is provided in the peripheral area, and supplies the scanning signal to the scanning line. In the display device, at least a part of the first driver unit is provided between the display area and the second driver unit.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: April 16, 2019
    Assignee: Japan Display Inc.
    Inventor: Takehiro Shima
  • Patent number: 10228788
    Abstract: A performance of a display device having an input device is improved. A display device includes: an electro-optical layer; a first driving electrode and a second driving electrode which drives the electro-optical layer; a driver chip which outputs a video signal; a switch circuit which is arranged outside the driver chip, which selects a potential to be supplied to the second driving electrode, and which includes a first switch element and a second switch element; a shift register circuit connected to the switch circuit; and a detection circuit which detects that an object is close or in contact. Each of the first switch element and the second switch element is selectively turned ON or OFF by the shift register circuit. The detection circuit is electrically connected to the first switch element and the second switch element.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: March 12, 2019
    Assignee: Japan Display Inc.
    Inventors: Tadayoshi Katsuta, Koji Noguchi, Daisuke Ito, Yasuyuki Teranishi
  • Patent number: 10209507
    Abstract: An electrowetting display device comprises a first support plate comprising a first electrode and a second support plate. A seal connects the first support plate to the second support plate. A first fluid and a second fluid, immiscible with the first fluid, are located between the first and second support plates. A second electrode is in electrical contact with the second fluid. An electrical connector connects the first electrode to the second electrode. A barrier structure at least partly surrounds the electrical connector. The electrical connector and the barrier structure are separated from the first fluid and the second fluid by the seal.
    Type: Grant
    Filed: June 21, 2016
    Date of Patent: February 19, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Toru Sakai, Abhishek Kumar, Jeroen Cornelis Van Der Gaag
  • Patent number: 10128224
    Abstract: A circuit board comprises a mother substrate including first and second scribing regions, the first scribing region extending in first direction, the second scribing region extending in second direction, the first and second directions crossing each other, the mother substrate including chip regions defined by the first and second scribing regions, and a through via penetrating the chip regions of the mother substrate. The mother substrate comprises a first alignment pattern protruding from a top surface of the mother substrate. The first alignment pattern is disposed on at least one of the scribing regions.
    Type: Grant
    Filed: July 7, 2017
    Date of Patent: November 13, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-Sik Park, Dong-Wan Kim, Jung-Hoon Han
  • Patent number: 10096663
    Abstract: A manufacturing method of an array substrate, an array substrate and a display device are provided. The manufacturing method of the array substrate comprises: forming a first conductive thin film (100) on a base substrate (1); and patterning the first conductive thin film (100), to form a pattern of a cathode (11) on a first region (11) of the base substrate (1), and form a pattern of a gate electrode (4) on a second region (12) of the base substrate (1). Complexity and process time of a fabrication process of an array substrate can be reduced, a fabrication process of an organic electroluminescent panel can be simplified, and production cost can be reduced, by forming a cathode layer of a light-emitting diode and a gate electrode layer of a thin film transistor in different regions of the base substrate at the same time by one patterning process.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: October 9, 2018
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zheng Liu, Xiaoyong Lu, Xiaolong Li, Chien Hung Liu, Chunping Long
  • Patent number: 10095077
    Abstract: In a plurality of pixels of an electro-optical device, a storage capacitor includes a first storage capacitor, and a second storage capacitor stacked on the first storage capacitor and electrically connected thereto in parallel. In the first storage capacitor and the second storage capacitor, in which the first capacitor electrode, the second capacitor electrode, the third capacitor electrode, and the fourth capacitor electrode are stacked, the second capacitor electrode and the fourth capacitor electrode are each integrally formed in a first pixel and a second pixel, out of the plurality of pixels, and electrically connected to a capacitor line at one point.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: October 9, 2018
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Osamu Nakajima
  • Patent number: 10042211
    Abstract: The disclosure provides a liquid crystal display panel, an array substrate and a manufacturing method thereof. In the method, controllable resistance spacer layers are formed on at least one of a source doped region and a drain doped region of a low temperature polysilicon active layer, wherein when a turn-on signal is not applied to the gate layer, the controllable resistance spacer layers serve as a blocking action for a flowing current, and when the turn-on signal is applied to the gate layer, the controllable resistance spacer layers serve as a conducting action for the flowing current, such that a contact region formed of the controllable resistance spacer layers is connected the corresponding source layer and the corresponding drain through the controllable resistance spacer layers. Therefore, the disclosure is capable of effectively decreasing a leakage of a thin film transistor.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: August 7, 2018
    Assignees: Shenzhen China Star Optoelectronics Technology Co., Ltd, Wuhan China Star Optoelectronics Technology Co., Ltd
    Inventor: Juncheng Xiao
  • Patent number: 10014255
    Abstract: A method of increasing the surface area of a contact to an electrical device that in one embodiment includes forming a contact stud extending through an intralevel dielectric layer to a component of the electrical device, and selectively forming a contact region on the contact stud. The selectively formed contact region has an exterior surface defined by a curvature and has a surface area that is greater than a surface area of the contact stud. An interlevel dieletric layer is formed on the intralevel dielectric layer, wherein an interlevel contact extends through the interlevel dielectric layer into direct contact with the selectively formed contact region.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: July 3, 2018
    Assignee: International Business Machines Corporation
    Inventors: Lawrence A. Clevenger, Baozhen Li, Kirk D. Peterson, Terry A. Spooner, Junli Wang
  • Patent number: 9997581
    Abstract: An organic light-emitting diode display includes a substrate in which an emission area and a non-emission area are defined; a thin film transistor disposed in the non-emission area on the substrate; passivation layer disposed on the thin film transistor; a first storage capacitor electrode and a second storage capacitor electrode superposed thereon, having the passivation layer interposed therebetween, in the emission area; an overcoat layer disposed on the second storage capacitor electrode; and an anode disposed on the overcoat layer, coming into contact with one side of the second storage capacitor electrode through an overcoat layer contact hole penetrating the overcoat layer and, coming into contact with part of the thin film transistor through a passivation layer contact hole disposed in the overcoat layer contact hole and penetrating the passivation layer.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: June 12, 2018
    Assignee: LG Display Co., Ltd.
    Inventors: Yongmin Kim, Jeongoh Kim, Jungsun Beak, Kyoungjin Nam, Jeonggi Yun
  • Patent number: 9978777
    Abstract: A TFT array panel of a display device includes a first substrate, a first electrode disposed on the first substrate, a first insulating layer including a first hole, the first insulating layer disposed on the first electrode, a second insulating layer disposed on the first insulating layer and including a second hole corresponding to the first hole, and a capping layer including a first inner portion, the capping layer disposed on an inner lateral surface forming the second hole, where an end portion of the first inner portion disposed in the second hole is separated from the first electrode.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: May 22, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Tae An Seo, Su Bin Bae, Yu-Gwang Jeong, Hyun Min Cho, Shin Il Choi, Jin Hwan Choi
  • Patent number: 9935037
    Abstract: A multi-stacked device includes a lower device having a lower substrate, a first insulating layer on the lower substrate, and a through-silicon-via (TSV) pad on the first insulating layer, an intermediate device having an intermediate substrate, a second insulating layer on the intermediate substrate, and a first TSV bump on the second insulating layer, an upper device having an upper substrate, a third insulating layer on the upper substrate, a second TSV bump on the third insulating layer, and a TSV structure passing through the upper substrate, the third insulating layer, the second insulating layer, and the intermediate substrate to be connected to the first TSV bump, the second TSV bump, and the TSV pad. An insulating first TSV spacer between the intermediate substrate and the TSV structure and an insulating second TSV spacer between the upper substrate and the TSV structure are spaced apart along a stacking direction.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: April 3, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Pil-kyu Kang, Ho-jin Lee, Byung-lyul Park, Tae-yeong Kim, Seok-ho Kim
  • Patent number: 9893094
    Abstract: Solved is a problem of attenuation of output amplitude due to a threshold value of a TFT when manufacturing a circuit with TFTs of a single polarity. In a capacitor (105), a charge equivalent to a threshold value of a TFT (104) is stored. When a signal is inputted thereto, the threshold value stored in the capacitor (105) is added to a potential of the input signal. The thus obtained potential is applied to a gate electrode of a TFT (101). Therefore, it is possible to obtain the output having a normal amplitude from an output terminal (Out) without causing the amplitude attenuation in the TFT (101).
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: February 13, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Patent number: 9871087
    Abstract: An organic light-emitting diode display can include a substrate in which an emission area and a non-emission area are defined; a first transparent conductive layer, a light shielding layer, a buffer layer and a semiconductor layer sequentially laminated on the non-emission area; a gate electrode superposed on the center region of the semiconductor layer, having a gate insulating layer interposed therebetween; a drain electrode coming into contact with one side of the semiconductor layer, having an interlevel insulating layer covering the gate electrode interposed therebetween, and formed of a second transparent conductive layer and a metal layer laminated thereon; a first storage capacitor electrode disposed under the interlevel insulating layer in the emission area and formed of the first transparent conductive layer; and a second storage capacitor electrode superposed on the first storage capacitor electrode, having the interlevel insulating layer interposed therebetween, and formed of the second transparen
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: January 16, 2018
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Jeonggi Yun, Jeongoh Kim, Jungsun Beak, Kyoungjin Nam, Yongmin Kim
  • Patent number: 9698338
    Abstract: According to one embodiment, a method of manufacturing a magnetic memory device includes a stack structure formed of a plurality of layers including a magnetic layer, the method includes forming a lower structure film including at least one layer, etching the lower structure film to form a lower structure of the stack structure, forming an upper structure film including at least one layer on a region including the lower structure, and etching the upper structure film to form an upper structure of the stack structure on the lower structure.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: July 4, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masatoshi Yoshikawa, Satoshi Seto, Shuichi Tsubata, Kazuhiro Tomioka
  • Patent number: 9673333
    Abstract: A method for fabricating a Polysilicon Thin-Film Transistor is provided. The method includes forming a polysilicon active layer, forming a first gate insulation layer and a first gate electrode sequentially on the active layer, conducting a first ion implantation process on the active layer by using the first gate electrode as a mask to form two doped regions at ends of the active layer, forming a second gate insulation layer and a second gate electrode sequentially on the first gate insulation layer and the first gate electrode, and conducting a second ion implantation process on the active layer by using the second gate electrode as another mask to form two source/drain implantation regions at two outer sides of the doped regions of the active layer. Accordingly, impurity concentration of the two doped regions is smaller than that of the two source/drain implantation regions.
    Type: Grant
    Filed: February 22, 2016
    Date of Patent: June 6, 2017
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Zheng Liu, Xiaoyong Lu, Xiaolong Li, Yu-Cheng Chan
  • Patent number: 9659976
    Abstract: Deterioration of display quality due to a difference of leak current in each pixel is suppressed. A pixel 30G includes a pixel capacitor 36 and a switching element 14 which controls supplying and blocking of voltage with respect to the pixel capacitor 36, and modulates irradiation light of a first wavelength (530 nm) according to the voltage of the pixel capacitor 36. A pixel 30R includes the pixel capacitor 36 and the switching element 14 that controls supplying and blocking of voltage with respect to the pixel capacitor 36, and modulates irradiation light of a second wavelength (620 nm) which is longer than the first wavelength according to the voltage of the pixel capacitor 36. A capacitance value of the pixel capacitor 36 of the pixel 30G is larger than a capacitance value of the pixel capacitor 36 of the pixel 30R.
    Type: Grant
    Filed: January 15, 2014
    Date of Patent: May 23, 2017
    Assignee: Seiko Epson Corporation
    Inventors: Hirotaka Kawata, Junichi Taira
  • Patent number: 9653708
    Abstract: A display comprises a first substrate, a second substrate opposite to the first substrate, an electrode structure, and a light-emitting combination (LEC) layer positioned between the first and second substrates, wherein the LEC layer comprises a light emitting material and a LC material, and a horizontal or vertical electric field is generated when a voltage is applied to that electrode structure. One of exemplified displays has an electrode structure comprising a first electrode and a second electrode oppositely disposed, and the LEC layer is positioned between the first and second electrodes, wherein a vertical electric field is generated when a voltage is applied. The device can further comprise an electron injection layer and a hole transport layer. Another exemplified display has an electrode structure arranged on one side of the first substrate, and a horizontal electric field is generated when a voltage is applied.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: May 16, 2017
    Assignee: INNOLUX CORPORATION
    Inventors: Hsu-Kuan Hsu, Chien-Hung Chen, Hong-Yuan Chen, Mei-Chi Hsu, Pi-Ying Chuang, Chu-Hong Lai
  • Patent number: 9638976
    Abstract: The invention discloses a liquid crystal display device, a thin film transistor array substrate and a method of fabricating the same. The thin film transistor array substrate includes: a substrate including a plurality of photo-sensitive spacer areas, a plurality of thin film transistors arranged on the substrate, each of which includes a source and a drain, and a first planarizing layer overlying the plurality of thin film transistors. Multiple planarizing layer openings are arranged in the first planarizing layer in areas corresponding to the drains of the thin film transistors; a pixel electrode layer is arranged on the first planarizing layer and in contact with the drains; and a second planarizing layer is arranged on the pixel electrode layer and fills the planarizing layer openings.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: May 2, 2017
    Assignees: XIAMEN TIANMA MICRO-ELECTRONICS CO., LTD., TIANMA MICRO-ELECTRONICS CO., LTD.
    Inventor: Liang Wen
  • Patent number: 9640564
    Abstract: A thin film transistor substrate including a thin film transistor and a capacitor formed of a pair of electrodes, which includes: a first electrode above a substrate; a first insulating film above the first electrode; a second electrode above the first insulating film; a second insulating film above the second electrode; and a semiconductor layer above the second insulating film, in which the capacitor includes the first electrode as one of the pair of electrodes and the second electrode as the other of the pair of electrodes, and the thin film transistor includes the second electrode as a gate electrode, the second insulating film as a gate insulating film, and the semiconductor layer as a channel layer.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: May 2, 2017
    Assignee: JOLED INC.
    Inventors: Eiichi Sato, Shinya Ono
  • Patent number: 9638972
    Abstract: An array substrate, a manufacturing method thereof and a display panel are disclosed. The array substrate includes: a base substrate, gate scanning lines, a gate-insulating layer, an active layer, data lines, a passivation layer, and pixel electrodes; the array substrate further includes: a bridge structure and a connection line corresponding to each data line; the bridge structure is located on the passivation layer and is provided in a same layer as the pixel electrodes; each connection line is located on the base substrate and is connected with the data line, through the bridge structure in an LED region and in a region under a scribe line of a counter substrate. Therefore the problem of defective display caused by breakage of data lines can be solved, and the display effect of a liquid crystal display device can be improved.
    Type: Grant
    Filed: December 3, 2013
    Date of Patent: May 2, 2017
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Xi Chen, Yuchun Feng, Jianfeng Yuan, Linlin Wang
  • Patent number: 9634076
    Abstract: An organic light-emitting display apparatus includes a substrate; a thin film transistor (TFT) on the substrate; a first interlayer insulating layer between a gate electrode and the source electrode and between a drain electrode and the source electrode of the TFT and including an inorganic material; a second interlayer insulating layer between the first interlayer insulating layer and the source electrode and between the first interlayer insulating layer and the drain electrode and including an organic material; a first organic layer on the source electrode and the drain electrode; a capacitor, a second electrode, and the first interlayer insulating layer between the first electrode and the second electrode; a pixel electrode in an aperture in the second interlayer insulating layer adjacent to the thin film transistor and the capacitor and coupled to the source electrode or the drain electrode; an organic emission layer; and an opposite electrode.
    Type: Grant
    Filed: May 14, 2015
    Date of Patent: April 25, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventor: Chungi You
  • Patent number: 9620568
    Abstract: The present invention provide a display substrate, a fabricating method thereof, and a display apparatus, and belongs to the field of display technology. The display substrate comprises a plurality of pixels, each of the pixels is divided into a plurality of light emitting units, each of the light emitting units comprises an anode, a cathode, a carrier transport layer, and a light emitting layer, wherein at least one of the plurality of light emitting units comprises a light emitting layer and at least one process auxiliary layer; the process auxiliary layer and the light emitting layer in other light emitting units are formed into an integral portion from a same material in a film forming process. Display resolution can be improved in the present invention.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: April 11, 2017
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Guang Yan, Changyen Wu, Li Sun
  • Patent number: 9620536
    Abstract: An LTPS array substrate includes a plurality of LTPS thin-film transistors and a bottom transparent conductive layer, a protective layer, and a top transparent conductive layer. Each LTPS thin-film transistor includes a substrate, a patternized light shield layer, a buffering layer, a patternized poly-silicon layer, a gate insulation layer, a gate line, and a common electrode line, an insulation layer, a drain and a source, and a planarization layer that are formed to sequentially stack on each other. The light shield layer covers the scan line and the source/drain. A patternized third metal layer is between the bottom transparent conductive layer and the protective layer and includes a first zone and a second zone intersecting the first zone. The first zone shields the source line. A portion of the second zone overlaps a side portion of the light shield layer that is close to the source/drain electrode.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: April 11, 2017
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd
    Inventors: Peng Du, Yutong Hu
  • Patent number: 9607863
    Abstract: Integrated circuit packages with cavity are disclosed. A disclosed integrated circuit package includes a first die. A second die may be coupled to the first die by attaching the first die to a top surface of the second die. A blocking element such as a barrier structure may be formed that surrounds the second die. A cavity may be formed between the blocking element and the first die that encloses the second die. The barrier structure may help prevent underfill material from entering the cavity during underfill deposition processes. A heat spreading lid may cover the first die, second die and package substrate.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: March 28, 2017
    Assignee: Altera Corporation
    Inventor: Myung June Lee
  • Patent number: 9601525
    Abstract: Solved is a problem of attenuation of output amplitude due to a threshold value of a TFT when manufacturing a circuit with TFTs of a single polarity. In a capacitor (105), a charge equivalent to a threshold value of a TFT (104) is stored. When a signal is inputted thereto, the threshold value stored in the capacitor (105) is added to a potential of the input signal. The thus obtained potential is applied to a gate electrode of a TFT (101). Therefore, it is possible to obtain the output having a normal amplitude from an output terminal (Out) without causing the amplitude attenuation in the TFT (101).
    Type: Grant
    Filed: April 14, 2016
    Date of Patent: March 21, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Patent number: 9588385
    Abstract: A liquid crystal display, including: a first substrate and a second substrate; a liquid crystal layer; a first data line disposed on the first substrate; a pixel electrode disposed on the first substrate; and a common electrode disposed on the first substrate and overlapping at least a portion of the pixel electrode and the first data line. One of the pixel electrode and the common electrode includes a plurality of branch electrodes spaced apart from each other and the other of has an at least approximately planar shape that is substantially parallel to a surface of at least one of the first substrate and the second substrate. The display can also include a passivation layer having a dielectric constant of about 3.5 or less, and including a first portion disposed between the common electrode and the first data line.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: March 7, 2017
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sung-Hoon Kim, Yoon-Sung Um, Joo-Seok Yeom
  • Patent number: 9564582
    Abstract: A method for fabricating an MRAM bit that includes depositing a spacer layer that protects the tunneling barrier layer during processing is disclosed. The deposited spacer layer prevents byproducts formed in later processing from redepositing on the tunneling barrier layer. Such redeposition may lead to product failure and decreased manufacturing yield. The method further includes non-corrosive processing conditions that prevent damage to the layers of MRAM bits. The non-corrosive processing conditions may include etching without using a halogen-based plasma. Embodiments disclosed herein use an etch-deposition-etch sequence that simplifies processing.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: February 7, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Mahendra Pakala, Mihaela Balseanu, Jonathan Germain, Jaesoo Ahn, Lin Xue
  • Patent number: 9559328
    Abstract: Provided is an organic light-emitting display apparatus including a substrate; a first electrode formed on the substrate; an emission layer formed on the first electrode; and a second electrode formed on the emission layer, wherein the first electrode includes a first layer including silver (Ag); and a second layer disposed on the first layer and comprising oxide of non-silver metal.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: January 31, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventors: Changoh Jeong, Hyuneok Shin, Sukyoung Yang, Chanwoo Yang, Dongmin Lee
  • Patent number: 9551910
    Abstract: An active matrix substrate 5 is provided with: a plurality of source wiring lines and a plurality of gate wiring lines, which are arranged in a matrix pattern; and picture elements, each of which has a thin film transistor provided in the vicinity of a part where each source wiring line and each gate wiring line intersect each other, and a picture element electrode 26 connected to the thin film transistor. In the active matrix substrate, a base member 5a is provided such that the source wiring lines and the gate wiring lines intersect each other, and on the base member 5a, the connecting portion 28a of an auxiliary capacitor electrode and the connecting portion 29a of an auxiliary capacitor wiring line are connected to each other by having therebetween a nitride film 33 composed of a high melting point metal material.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: January 24, 2017
    Assignee: UNIFIED INNOVATIVE TECHNOLOGY, LLC
    Inventor: Hijiri Nakahara
  • Patent number: 9461033
    Abstract: In an element substrate of an electro-optical device, MOS transistors (electrostatic protection element) are provided on an opposite side to a light transmitting substrate with respect to the insulating film, and heat dissipation layers that overlap drain regions of the MOS transistor in a plan view are provided between the light transmitting substrate and the insulating film. In addition, the heat dissipation layers are connected to the drain regions through contact holes which are formed in the insulating film.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: October 4, 2016
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Minoru Moriwaki
  • Patent number: 9449997
    Abstract: An electro-optical device includes an element substrate main body, a first capacitance electrode that is arranged above the element substrate main body, and has a first metal film and a second metal film which is stacked onto the first metal film, a first protective insulating film that is arranged so as to cover a side wall of the first metal film, and expose at least a portion of a side wall of the second metal film, a dielectric film that is arranged throughout the side wall of the second metal film which is exposed from the first protective insulating film, and over the second metal film, and a second capacitance electrode that is arranged throughout the dielectric film on the second metal film, and over the dielectric film which is arranged in the side wall of the second metal film exposed from the first protective insulating film.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: September 20, 2016
    Assignee: Seiko Epson Corporation
    Inventors: Takafumi Egami, Shin Oyamada
  • Patent number: 9373652
    Abstract: Provided are a display apparatus and a method of manufacturing the display apparatus. The display apparatus includes: a substrate having a major surface; and a capacitor disposed over the substrate. The capacitor includes a first electrode, and a second electrode disposed over the first electrode. The second electrode includes a first region, a second region and an opening when viewed in a direction perpendicular to the major surface. The first region has a first thickness, and a second region has a second thickness that is greater than the first thickness.
    Type: Grant
    Filed: July 22, 2015
    Date of Patent: June 21, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventors: Guanghai Jin, Nayoung Kim
  • Patent number: 9356016
    Abstract: A semiconductor device includes a semiconductor substrate, a transistor, a conductive contact and a capacitor. The transistor is formed on the semiconductor substrate, and the transistor includes a gate, a source and a drain. The conductive contact is formed on and in contact with at least one of the source and the drain. The capacitor includes a first electrode and a second electrode spaced apart from first electrode. At least one of the first and second electrodes extends on substantially the same level as the conductive contact or the gate. A method of forming the semiconductor device is provided as well.
    Type: Grant
    Filed: October 17, 2014
    Date of Patent: May 31, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chin-Shan Wang, Jian-Hong Lin, Shun-Yi Lee
  • Patent number: 9349784
    Abstract: An organic light-emitting display apparatus includes: a substrate; a thin film transistor formed on the substrate; a pixel electrode connected to at least one of the source or drain electrodes; a pixel-defining layer having a first opening exposing at least a portion of the pixel electrode and a second opening adjacent to the first opening; an intermediate layer formed on the pixel electrode, including an organic emission layer, and having a first hole corresponding to the second opening; an opposite electrode formed on the intermediate layer; and first and second auxiliary electrodes formed below the pixel-defining layer, at least portions of the first and second auxiliary electrodes are exposed through the second opening, where ends of the first and second auxiliary electrodes are spaced apart from each other, and where the opposite electrode contacts the ends of the and second first auxiliary electrodes which are exposed through the first hole.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: May 24, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventors: Wonkyu Lee, Hyunchul Kim, Wonmo Park
  • Patent number: 9343485
    Abstract: Solved is a problem of attenuation of output amplitude due to a threshold value of a TFT when manufacturing a circuit with TFTs of a single polarity. In a capacitor (105), a charge equivalent to a threshold value of a TFT (104) is stored. When a signal is inputted thereto, the threshold value stored in the capacitor (105) is added to a potential of the input signal. The thus obtained potential is applied to a gate electrode of a TFT (101). Therefore, it is possible to obtain the output having a normal amplitude from an output terminal (Out) without causing the amplitude attenuation in the TFT (101).
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: May 17, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Patent number: 9343583
    Abstract: A thin film transistor, a thin film transistor array panel including the same, and a method of manufacturing the same are provided, wherein the thin film transistor includes a channel region including an oxide semiconductor, a source region and a drain region connected to the channel region and facing each other at both sides with respect to the channel region, an insulating layer positioned on the channel region, and a gate electrode positioned on the insulating layer, wherein an edge boundary of the gate electrode and an edge boundary of the channel region are substantially aligned.
    Type: Grant
    Filed: April 3, 2015
    Date of Patent: May 17, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yong Su Lee, Yoon Ho Khang, Dong Jo Kim, Hyun Jae Na, Sang Ho Park, Se Hwan Yu, Chong Sup Chang
  • Patent number: 9336712
    Abstract: To alleviate an afterimage phenomenon caused by a hysteresis characteristic of a drive transistor. Current driven type light emitting elements 3 are provided for each of pixels 6 that are arranged in a matrix shape, and current of the light emitting elements 3 is controlled using drive TFTs 2 that operate by receiving data voltage on a gate. At least two power supply voltages (PVDDa, PVDDb) for supply to each pixel are provided, one being set to a voltage such that current corresponding to a data voltage flows in the drive TFT 2, the other being set to a voltage beyond a variation range of data voltage and that reverse biases the drive TFT 2, and the two power supply voltages are switched and supplied to each pixel 6.
    Type: Grant
    Filed: July 1, 2010
    Date of Patent: May 10, 2016
    Assignee: Global OLED Technology LLC
    Inventors: Seiichi Mizukoshi, Nobuyki Mori, Kazuyoshi Kawabe, Makoto Kohno
  • Patent number: 9245905
    Abstract: A method of manufacturing a flat panel display device includes forming a first gate electrode and a second gate electrode on a substrate. The method includes forming a gate insulating layer on the substrate covering the gate electrodes. The method includes forming a first active layer and a second active layer on the gate insulating layer. The method includes forming an active insulation layer on the gate insulating layer to cover the first active layer. The active insulation layer includes a first hole and a second hole exposing portions of the first active layer. The method includes forming a first source electrode and a first drain electrode on the active insulation layer respectively filling the first hole and the second hole. The method includes forming a second source electrode and a second drain electrode to contact portions of the second active layer.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: January 26, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Sang Il Park
  • Patent number: 9245908
    Abstract: A method of manufacturing a thin film transistor (TFT) array substrate is disclosed. In one aspect, the method includes forming an active layer on a substrate, forming a first insulating layer on the substrate to cover the active layer, and forming a first gate electrode on the first insulating layer in an area corresponding to the active layer, doping the active layer with ion impurities, forming a second insulating layer on the first insulating layer to cover the first gate electrode, performing an annealing process on the active layer, forming a lower electrode of a capacitor on the second insulating layer, forming a third insulating layer on the second insulating layer to cover the lower electrode, wherein the third insulating layer has a dielectric constant that is greater than those of the first and second insulating layers, and forming an upper electrode of the capacitor on the third insulating layer.
    Type: Grant
    Filed: April 2, 2014
    Date of Patent: January 26, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jeong-Ho Lee, Su-Yeon Sim, Ju-Won Yoon, Seung-Min Lee, Wang-Woo Lee, Il-Jeong Lee, Jung-Kyu Lee, Choong-Youl Im
  • Patent number: 9178005
    Abstract: An organic light emitting display includes a base substrate, a first transistor, an insulation layer having a first contact hole and a second contact hole, a first electrode, an organic layer, a second electrode and a pixel definition layer having a third contact hole. The second electrode may be connected to the first transistor through the second contact hole, and the second electrode may be connected to other devices. The second electrode may be connected to a switching device.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: November 3, 2015
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Jeong-Hwan Kim
  • Publication number: 20150144910
    Abstract: An array substrate for a display device includes a first thin film transistor (TFT) including a first semiconductor layer, a first gate electrode corresponding to the first semiconductor layer, a first source electrode and a first drain electrode; a second TFT including a second semiconductor layer, a second gate electrode corresponding to the second semiconductor layer, a second source electrode and a second drain electrode; a first transparent capacitor electrode connected to the first drain electrode; a first passivation layer on the first transparent capacitor electrode; a second transparent capacitor electrode on the first passivation layer and connected to the second drain electrode, the second transparent capacitor electrode overlapping the first transparent capacitor electrode; a second passivation layer on or over the first passivation layer and the second transparent capacitor electrode; and a first electrode on the second passivation layer and connected to the second transparent capacitor electrode
    Type: Application
    Filed: November 13, 2014
    Publication date: May 28, 2015
    Inventors: Jung-Sun Beak, Min-Joo Kim, Jeong-Oh Kim, Jeong-Gi Yun, Yong-Min Kim
  • Patent number: 9040974
    Abstract: Provided is an organic light-emitting display apparatus. The organic light-emitting display apparatus including: pixels arranged in a display region of a substrate and at intersections between scanning lines and data lines; a first initialization main line arranged along a first side of the display region of the substrate; a second initialization main line arranged along a second side of the display region of the substrate; an initialization power line electrically connected to the pixels and to the first initialization main line and the second initialization main line; and a first electrical connection portion comprising a doped semiconductor layer of which a first portion is connected to the first initialization main line and a second portion is connected to the initialization power line.
    Type: Grant
    Filed: November 14, 2013
    Date of Patent: May 26, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jong-Hyun Park, Chun-Gi You, Seong-Kweon Heo, Kyung-Hoon Park
  • Patent number: 9041154
    Abstract: A semiconductor memory device includes a substrate having thereon a memory array region and a periphery circuit region. A first dielectric layer covers the memory array region and the periphery circuit region on the substrate. A second dielectric layer covers the memory array region and the periphery circuit region on the first dielectric layer. At least a capacitor structure is provided in the memory array region. The capacitor structure includes an electrode material layer embedded in the second dielectric layer. The semiconductor memory device further includes a contact structure comprising the electrode material layer.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: May 26, 2015
    Assignee: NANYA TECHNOLOGY CORP.
    Inventors: Chien-An Yu, Chih-Huang Wu
  • Patent number: 9040995
    Abstract: A semiconductor device includes a pixel electrode and a transistor which includes a first gate electrode, a first insulating layer over the first gate electrode, a semiconductor layer over the first insulating layer, a second insulating layer over the semiconductor layer, and a second gate electrode. The pixel electrode and the second gate electrode are provided over the second insulating layer. The first gate electrode has a region overlapping with the semiconductor layer with the first insulating layer provided therebetween. The second gate electrode has a region overlapping with the semiconductor layer with the second insulating layer provided therebetween. A first region is at least part of a region where the second gate electrode overlaps with the semiconductor layer. A second region is at least part of a region where the pixel electrode is provided. The second insulating layer is thinner in the first region than in the second region.
    Type: Grant
    Filed: March 21, 2014
    Date of Patent: May 26, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Publication number: 20150138471
    Abstract: An array substrate including a plurality of pixel cells, at least one common electrode line, at least one data line, and at least one first scanning line and second scanning line parallel to the first scanning line is disclosed. The first scanning line and the second scanning line intersect with the data line. The pixel cell includes a first pixel electrode, a second pixel electrode, a first transistor, a second transistor, a third transistor, and a control circuit. In addition, a liquid crystal display is also disclosed. By adding one control circuit, the color shift effect in wide viewing angle is enhanced and the image sticking is eliminated.
    Type: Application
    Filed: August 19, 2013
    Publication date: May 21, 2015
    Applicant: Shenzhen China Star Optoelectronics Technology Co. Ltd.
    Inventor: Chengcai Dong
  • Publication number: 20150137128
    Abstract: The present disclosure disclosed a thin-film transistor array substrate and a method for repairing the same. The array substrate comprises: a substrate; a plurality of common lines, configured on the substrate; a plurality of scan lines and data lines, arranged on the substrate with each scan line and data line perpendicular to each other, to form a plurality of pixel areas; a plurality of pixel elements including a main pixel electrode, a sub pixel electrode, and a charge sharing unit including a charge capacitor which provides a voltage difference between the main pixel electrode and the sub pixel electrode. When the charge capacitor is defective, an upper electrode or a lower electrode of the defective capacitor is disconnected from a circuit connected thereto. The method enables the repairing process faster and simpler, which is different from the traditional repairing means. The pixel element repaired can still work normally.
    Type: Application
    Filed: January 17, 2014
    Publication date: May 21, 2015
    Inventors: Zhiguang Yi, Tsung Lung Chang