Abstract: An organic light emitting display includes a base substrate, a first transistor, an insulation layer having a first contact hole and a second contact hole, a first electrode, an organic layer, a second electrode and a pixel definition layer having a third contact hole. The second electrode may be connected to the first transistor through the second contact hole, and the second electrode may be connected to other devices. The second electrode may be connected to a switching device.

Abstract: An array substrate for a display device includes a first thin film transistor (TFT) including a first semiconductor layer, a first gate electrode corresponding to the first semiconductor layer, a first source electrode and a first drain electrode; a second TFT including a second semiconductor layer, a second gate electrode corresponding to the second semiconductor layer, a second source electrode and a second drain electrode; a first transparent capacitor electrode connected to the first drain electrode; a first passivation layer on the first transparent capacitor electrode; a second transparent capacitor electrode on the first passivation layer and connected to the second drain electrode, the second transparent capacitor electrode overlapping the first transparent capacitor electrode; a second passivation layer on or over the first passivation layer and the second transparent capacitor electrode; and a first electrode on the second passivation layer and connected to the second transparent capacitor electrode

Abstract: A semiconductor memory device includes a substrate having thereon a memory array region and a periphery circuit region. A first dielectric layer covers the memory array region and the periphery circuit region on the substrate. A second dielectric layer covers the memory array region and the periphery circuit region on the first dielectric layer. At least a capacitor structure is provided in the memory array region. The capacitor structure includes an electrode material layer embedded in the second dielectric layer. The semiconductor memory device further includes a contact structure comprising the electrode material layer.

Abstract: A semiconductor device includes a pixel electrode and a transistor which includes a first gate electrode, a first insulating layer over the first gate electrode, a semiconductor layer over the first insulating layer, a second insulating layer over the semiconductor layer, and a second gate electrode. The pixel electrode and the second gate electrode are provided over the second insulating layer. The first gate electrode has a region overlapping with the semiconductor layer with the first insulating layer provided therebetween. The second gate electrode has a region overlapping with the semiconductor layer with the second insulating layer provided therebetween. A first region is at least part of a region where the second gate electrode overlaps with the semiconductor layer. A second region is at least part of a region where the pixel electrode is provided. The second insulating layer is thinner in the first region than in the second region.

Abstract: Provided is an organic light-emitting display apparatus. The organic light-emitting display apparatus including: pixels arranged in a display region of a substrate and at intersections between scanning lines and data lines; a first initialization main line arranged along a first side of the display region of the substrate; a second initialization main line arranged along a second side of the display region of the substrate; an initialization power line electrically connected to the pixels and to the first initialization main line and the second initialization main line; and a first electrical connection portion comprising a doped semiconductor layer of which a first portion is connected to the first initialization main line and a second portion is connected to the initialization power line.

Abstract: The present disclosure disclosed a thin-film transistor array substrate and a method for repairing the same. The array substrate comprises: a substrate; a plurality of common lines, configured on the substrate; a plurality of scan lines and data lines, arranged on the substrate with each scan line and data line perpendicular to each other, to form a plurality of pixel areas; a plurality of pixel elements including a main pixel electrode, a sub pixel electrode, and a charge sharing unit including a charge capacitor which provides a voltage difference between the main pixel electrode and the sub pixel electrode. When the charge capacitor is defective, an upper electrode or a lower electrode of the defective capacitor is disconnected from a circuit connected thereto. The method enables the repairing process faster and simpler, which is different from the traditional repairing means. The pixel element repaired can still work normally.

Abstract: An array substrate including a plurality of pixel cells, at least one common electrode line, at least one data line, and at least one first scanning line and second scanning line parallel to the first scanning line is disclosed. The first scanning line and the second scanning line intersect with the data line. The pixel cell includes a first pixel electrode, a second pixel electrode, a first transistor, a second transistor, a third transistor, and a control circuit. In addition, a liquid crystal display is also disclosed. By adding one control circuit, the color shift effect in wide viewing angle is enhanced and the image sticking is eliminated.

Abstract: An organic light emitting diode (OLED) display device and a method of fabricating the same are provided. The OLED display device includes a substrate having a thin film transistor region and a capacitor region, a buffer layer disposed on the substrate, a gate insulating layer disposed on the substrate, a lower capacitor electrode disposed on the gate insulating layer in the capacitor region, an interlayer insulating layer disposed on the substrate, and an upper capacitor electrode disposed on the interlayer insulating layer and facing the lower capacitor electrode, wherein regions of each of the buffer layer, the gate insulating layer, the interlayer insulating layer, the lower capacitor electrode, and the upper capacitor electrode have surfaces in which protrusions having the same shape as grain boundaries of the semiconductor layer are formed. The resultant capacitor has an increased surface area, and therefore, an increased capacitance.

Abstract: In a display apparatus including a switching transistor, a correction voltage for eliminating an effect of a variation in a characteristic of a driving transistor is stored in a storage capacitor. The switching transistor is disposed between one current terminal of the driving transistor and a light emitting element. The switching transistor turns off during the non-light emission period thereby to electrically disconnect the light emitting element from the one current terminal of the driving transistor thereby preventing a leakage current from flowing through the light emitting element during the period in which the correction unit operates, and thus preventing the correction voltage from having an error due to the leakage current.

Abstract: A variation in electrical characteristics, such as a negative shift of the threshold voltage or an increase in S value, of a fin-type transistor including an oxide semiconductor material is prevented. An oxide semiconductor film is sandwiched between a plurality of gate electrodes with an insulating film provided between the oxide semiconductor film and each of the gate electrodes. Specifically, a first gate insulating film is provided to cover a first gate electrode, an oxide semiconductor film is provided to be in contact with the first gate insulating film and extend beyond the first gate electrode, a second gate insulating film is provided to cover at least the oxide semiconductor film, and a second gate electrode is provided to be in contact with part of the second gate insulating film and extend beyond the first gate electrode.

Abstract: Provided is an array substrate including a base substrate, a thin film transistor having a semiconductor layer disposed on a first part of the base substrate. The semiconductor layer includes a source electrode and a drain electrode, a gate electrode disposed on the semiconductor layer and insulated from the semiconductor layer. A light-blocking layer disposed between the base substrate and the thin film transistor. The light-blocking layer comprises a first layer continuously disposed on and around the first part of the base substrate, and a second layer formed on the first part of the base substrate without extending outside of the first part, the second layer being disposed on the first layer.

Abstract: Disclosed embodiments include a direct current to direct current (DC-DC) converter including one or more charge pumps and configured to receive an input voltage and a first clock signal and a second clock signal. The first clock signal and second clock signal may be non-overlapping, and each may alternate between a ground voltage and a first voltage. The DC-DC converter may be configured to produce an output voltage over the clock cycle that has a negative polarity with a magnitude substantially equal to a sum of magnitudes of the input voltage and an integer multiple of the first voltage, the integer multiple being equal to a number of the one or more charge pumps in the DC-DC converter.

Abstract: Disclosed is a semiconductor device 1000 including a substrate 1, a thin film diode 100 that is supported by the substrate 1 and has a first semiconductor layer 10 having a light-receiving region 10i, a thin film transistor 200 that is supported by the substrate 1 and has a second semiconductor layer 20, and a metal layer 22a that has an inclined surface 23 that is inclined to the surface of the substrate 1, in which the thin film diode 100 can detect light that enters the light-receiving region 10i and has a prescribed wavelength, in which both the first semiconductor layer 10 and the second semiconductor layer 20 are composed of the same semiconductor film, and in which the inclined surface 23 of the metal layer 22a faces at least a part of the side faces 3R and 3L of the first semiconductor layer 10. This constitution enables an increase in the amount of light absorbed by the thin film diode and an improvement in the effective light reception sensitivity of an optical sensor part.

Abstract: In a light emitting device, luminance irregularities caused by fluctuation in threshold of TFTs for supplying a current to EL elements among pixels hinder the light emitting device from improving the image quality. A voltage equal to the threshold of a TFT 110 is held in capacitor means 111 in advance. When a video signal is inputted from a source signal line, the voltage held in the capacitor means is added to the signal, which is then applied to a gate electrode of the TFT 110. Even when threshold is fluctuated among pixels, each threshold is held in the capacitor means 111 of each pixel, and therefore, influence of the threshold fluctuation can be removed. Since the threshold is stored in the capacitor means 111 alone and the voltage between two electrodes is not changed while a video signal is written, fluctuation in capacitance value has no influence.

Abstract: A display panel includes a first substrate structure, a second substrate structure and a non-self-luminous display medium layer. The first substrate structure includes a first substrate, a first common electrode, a pixel electrode and a first alignment film. The second substrate structure is disposed opposite to the first substrate structure. The second substrate structure includes a second substrate, a second common electrode and a second alignment film. The non-self-luminous display medium layer is interposed between the first alignment film and the second alignment film. A first capacitance is formed between the first common electrode and the pixel electrode, a second capacitance is formed between the pixel electrode and the second common electrode, and a ratio of the second capacitance to the first capacitance is substantially between 0.7 and 1.3.

Abstract: A flexible display device includes a flexible base substrate, a semiconductor pattern, a gate insulation layer, and a gate electrode on the base substrate, the gate insulation layer between the semiconductor pattern and the gate electrode, a conductive pattern including a source electrode and a drain electrode, the source and drain electrodes overlapping respective sides of the semiconductor pattern, an insulation interlayer on the gate insulation layer, between the gate electrode and the conductive pattern, and having at least one stress relief opening at a region exposed by the conductive pattern, and a protection layer on the insulation interlayer and filling the stress relief opening.

Abstract: Disclosed are a thin film transistor substrate and a method of repairing a signal line of the thin film transistor substrate. The thin-film transistor substrate includes: a scan line for transferring a scan signal; a light-emission control line for transferring a light-emission control signal; and a capacitor including a first electrode and a second electrode, wherein the second electrode may be provided with a plurality of divided regions, al plurality of bridges coupling the plurality of divided regions to each other, and a plurality of protrusions which overlap at least one of the scan line and the light-emission control line.

Abstract: An organic light emitting diode display device capable of improving capacitance Cst of a storage capacitor and transmittance and a method of fabricating the same are disclosed. The organic light emitting diode display device includes a driving thin film transistor (TFT) formed on the substrate, a passivation film formed to cover the TFT driver, a color filter formed on the passivation film in a luminescent region, a planarization film formed to cover the color filter, a transparent metal layer formed on the planarization film, an insulating film formed on the transparent metal layer, a first electrode connected to the TFT driver and overlapping the transparent metal layer while interposing the insulating film therebetween, an organic light emitting layer and a second electrode which are sequentially formed on the first electrode. The transparent metal layer, the insulating film, and the first electrode constitute a storage capacitor in the luminescent region.

Abstract: A thin film transistor array substrate including a first TFT including a first active layer, a gate electrode, a first source electrode and a first drain electrode, a second TFT including a second active layer, a floating gate electrode, a control gate electrode, a second source electrode, and a second drain electrode, a capacitor including a first electrode and a second electrode, and a capping layer contacting a portion of the first electrode, the capping layer and the second electrode being on a same layer, is disclosed. A method of manufacturing thin film transistor array substrate is also disclosed.

Abstract: A TFT array substrate is disclosed. The TFT array substrate includes a TFT area, which includes a TFT first electrode layer, a TFT second electrode layer, a TFT insulation layer, and a TFT etching stop layer. The TFT array substrate also includes also includes a storage capacitor, which includes a capacitor first electrode layer, a capacitor second electrode layer, a capacitor insulation layer, and a capacitor etching stop layer. The TFT first electrode layer and the capacitor first electrode layer are formed in a shared first electrode layer, the TFT second electrode layer and the capacitor second electrode layer are formed in a shared second electrode layer, the TFT insulation layer and the capacitor insulation layer are formed in a shared insulation layer, and the TFT etching stop layer and the capacitor etching stop layer are formed in a shared etching stop layer.

Abstract: A capacitor structure of gate driver in panel (GIP) includes a first metal layer, a first dielectric layer, a second metal layer, a second dielectric layer, a first and second transparent capacitor electrode layers. The first dielectric layer covers the first metal layer. The second metal layer is disposed on the first dielectric layer and coupled to the first metal layer. The second dielectric layer covers the second metal layer. The first transparent capacitor electrode layer is disposed on the first dielectric layer and connected to the second metal layer. The second transparent capacitor electrode layer is disposed on the second dielectric layer and coupled to the first metal layer, in which the second and first transparent capacitor electrode layers are arranged to be stacked in a thickness direction and mutually opposed across the second dielectric layer therebetween.

Abstract: A thin film transistor array panel includes a plurality of pixels on a substrate. Each pixel of the plurality of pixels includes a driving and a switching thin film transistor. The driving thin film transistor includes a first semiconductor including first source and drain regions, a first gate electrode overlapping the first semiconductor, a gate insulating layer between the first semiconductor and the first gate electrode, an oxide layer between the first semiconductor and the gate insulating layer, and first source and drain electrodes. The switching thin film transistor includes a second semiconductor including second source and drain regions, a second gate electrode overlapping the second semiconductor, and second source and drain electrodes. The switching thin film transistor includes the gate insulating layer between the second semiconductor and the second gate electrode. The gate insulating layer contacts an upper portion of the second semiconductor.

Abstract: A load, a transistor which controls a current value supplied to the load, a capacitor, a power supply line, and first to third switches are provided. After a threshold voltage of the transistor is held by the capacitor, a potential in accordance with a video signal is inputted and a voltage that is the sum of the threshold voltage and the potential is held. Accordingly, variation in current value caused by variation in threshold voltage of the transistor can be suppressed. Therefore, a desired current can be supplied to a load such as a light emitting element. In addition, a display device with a high duty ratio can be provided by changing a potential of the power supply line.

Abstract: A thin film transistor (TFT) array substrate is provided that includes a TFT on a substrate. The TFT can include an active layer, gate electrode, source electrode, drain electrode, first insulating layer between the active layer and the gate electrode, and second insulating layer between the gate electrode and the source and drain electrodes. A pixel electrode is disposed on the first and second insulating layers. A capacitor including a lower electrode is disposed on a same layer as the gate electrode and an upper electrode. A third insulating layer directly between the second insulating layer and the pixel electrode and between the lower electrode and the upper electrode. A fourth insulating layer covers the source electrode, the drain electrode, and the upper electrode, and exposes the pixel electrode and can further expose a pad electrode.

Abstract: A highly reliable display device which has high aperture ratio and includes a transistor with stable electrical characteristics is manufactured. The display device includes a driver circuit portion and a display portion over the same substrate. The driver circuit portion includes a driver circuit transistor and a driver circuit wiring. A source electrode and a drain electrode of the driver circuit transistor are formed using a metal. A channel layer of the driver circuit transistor is formed using an oxide semiconductor. The driver circuit wiring is formed using a metal. The display portion includes a pixel transistor and a display portion wiring. A source electrode and a drain electrode of the pixel transistor are formed using a transparent oxide conductor. A semiconductor layer of the pixel transistor is formed using the oxide semiconductor. The display portion wiring is formed using a transparent oxide conductor.

Abstract: A thin film transistor (TFT) array substrate includes a TFT including an active layer, a gate electrode, a source electrode, a drain electrode, a first gate insulating layer and a second gate insulating layer formed between the active layer and the gate electrode, and an interlayer insulating layer formed between the gate electrode and the source electrode and the drain electrode; a pixel electrode formed in an opening of the interlayer insulating layer, the pixel electrode including transparent conductive oxide; a translucent electrode formed in a region corresponding to the pixel electrode, between the first gate insulating layer and the second gate insulating layer; and a capacitor including a lower electrode formed from the same layer as the active layer, and an upper electrode formed from the same layer as the translucent electrode.

Abstract: An object is to reduce the manufacturing cost of a semiconductor device. An object is to improve the aperture ratio of a semiconductor device. An object is to make a display portion of a semiconductor device display a higher-definition image. An object is to provide a semiconductor device which can be operated at high speed. The semiconductor device includes a driver circuit portion and a display portion over one substrate. The driver circuit portion includes: a driver circuit TFT in which source and drain electrodes are formed using a metal and a channel layer is formed using an oxide semiconductor; and a driver circuit wiring formed using a metal. The display portion includes: a pixel TFT in which source and drain electrodes are formed using an oxide conductor and a semiconductor layer is formed using an oxide semiconductor; and a display wiring formed using an oxide conductor.

Abstract: A display device with low manufacturing cost, with low power consumption, capable of being formed over a large substrate, with a high aperture ratio of a pixel, and with high reliability is provided. The display device includes a transistor electrically connected to a light-transmitting pixel electrode and a capacitor. The transistor includes a gate electrode, a gate insulating film over the gate electrode, and a first multilayer film including an oxide semiconductor over the gate insulating film. The capacitor includes the pixel electrode and a conductive electrode formed of a second multilayer film which overlaps with the pixel electrode with a predetermined distance therebetween, and has the same layer structure as the first multilayer film. A channel formation region of the transistor is at least one layer, which is not in contact with the gate insulating film, of the first multilayer film.

Abstract: A semiconductor device having a high aperture ratio and including a capacitor capable of increasing the charge capacity is provided. A semiconductor device includes a transistor over a substrate, a first light-transmitting conductive film over the substrate, an oxide insulating film covering the transistor and having an opening over the first light-transmitting conductive film, a nitride insulating film over the oxide insulating film and in contact with the first light-transmitting conductive film in the opening, a second light-transmitting conductive film connected to the transistor and having a depressed portion in the opening, and an organic resin film with which the depressed portion of the second light-transmitting conductive film is filled.

Abstract: An array substrate and a liquid crystal panel are disclosed. Each of the pixel cells of the array substrate includes a voltage compensation circuit. When the scanning signals are inputted to the corresponding first scanning line of a farther pixel cell, the voltage compensation circuit of a current pixel cell operates on the second pixel electrode of the current pixel cell. As such, a ratio of a voltage difference between the second pixel electrode and the common electrode to the voltage difference between the first pixel electrode and the common electrode when the positive polarity is inversed is the same with the ratio when the negative polarity is inversed. In this way, the low color shift effect is enhanced.

Abstract: A metal oxide bilayer second electrode for a MIM DRAM capacitor is formed wherein the layer of the electrode that is in contact with the dielectric layer (i.e. bottom layer) has a desired composition and crystal structure. An example is crystalline MoO2 if the dielectric layer is TiO2 in the rutile phase. The other component of the bilayer (i.e. top layer) is a sub-oxide of the same material as the bottom layer. The top layer serves to protect the bottom layer from oxidation during subsequent PMA or other DRAM fabrication steps by reacting with any oxygen species before they can reach the bottom layer of the bilayer second electrode.

Abstract: When writing a signal current from a current source to a current source circuit, noise occurs in some cases in a wiring through which a current flows, which may cause a potential of the wiring to be outside the normal range. As the potential does not turn back within the normal range easily at this time, writing to the current source circuit is delayed. According to the invention, when the potential becomes outside the normal range due to noise occurring in a wiring through which a current flows when writing a signal current from a current source to a current source circuit, a current is supplied from other than the current source, thereby the potential of the wiring can turn back within the normal range rapidly.

Abstract: A light-emitting device includes a drive transistor for controlling the quantity of current supplied to a light-emitting element, a capacitor element electrically connected to a gate electrode of the drive transistor, and an electrical continuity portion for electrically connecting the drive transistor and the light-emitting element, these elements being disposed on a substrate. The electrical continuity portion is disposed on the side opposite to the capacitor element with the drive transistor disposed therebetween.

Abstract: An array substrate, a method for fabricating the same and a display device are disclosed. The array substrate includes a base substrate, and further includes a metal shield layer, a semiconductor layer, a gate insulation layer, a gate metal layer, an interlayer dielectric layer, a source-drain metal layer and a pixel electrode layer sequentially formed on the base substrate. At least one first via hole penetrating to the metal shield layer is formed in the interlayer dielectric layer and the gate insulation layer. The source-drain metal layer is formed in the at least one first via hole and on the interlayer dielectric layer having the at least one first via hole.

Abstract: A semiconductor device capable of high-speed operation. The semiconductor device includes a first transistor, a second transistor, and a capacitor. One of a source and a drain of the first transistor is supplied with a first signal. One of a source and a drain of the second transistor is supplied with a first potential. A gate of the second transistor is supplied with a second signal. A first electrode of the capacitor is electrically connected to the other of the source and the drain of the first transistor. A second electrode of the capacitor is electrically connected to the other of the source and the drain of the second transistor. In a first period, the first signal is low and the second signal is high. In a second period, the first signal is high and the second signal is either low or high.

Abstract: A semiconductor device having a normal function means is provided, in which the amplitude of an output signal is prevented from being decreased even when a digital circuit using transistors having one conductivity is employed. By turning OFF a diode-connected transistor 101, the gate terminal of a first transistor 102 is brought into a floating state. At this time, the first transistor 102 is ON and its gate-source voltage is stored in a capacitor. Then, when a potential at the source terminal of the first transistor 102 is increased, a potential at the gate terminal of the first transistor 102 is increased as well by bootstrap effect. As a result, the amplitude of an output signal is prevented from being decreased.

Abstract: A method of manufacturing a thin film transistor (TFT) array substrate is disclosed. In one aspect, the method includes forming an active layer on a substrate, forming a first insulating layer on the substrate to cover the active layer, and forming a first gate electrode on the first insulating layer in an area corresponding to the active layer, doping the active layer with ion impurities, forming a second insulating layer on the first insulating layer to cover the first gate electrode, performing an annealing process on the active layer, forming a lower electrode of a capacitor on the second insulating layer, forming a third insulating layer on the second insulating layer to cover the lower electrode, wherein the third insulating layer has a dielectric constant that is greater than those of the first and second insulating layers, and forming an upper electrode of the capacitor on the third insulating layer.

Abstract: In a flat panel display (FPD) and a method of manufacturing the same, the FPD includes a substrate, a semiconductor layer formed on the substrate, a wiring line formed on the substrate so as to be separated from the semiconductor layer, an insulating layer formed on the semiconductor layer and the wiring line, a gate electrode formed on the insulating layer formed on the semiconductor layer and extended to a top of the wiring line, and a source electrode and a drain electrode coupled to a source region and a drain region, respectively, of the semiconductor layer. Capacitance is formed by the gate electrode and the wiring line.

Abstract: By controlling the luminance of light emitting element not by means of a voltage to be impressed to the TFT but by means of controlling a current that flows to the TFT in a signal line drive circuit, the current that flows to the light emitting element is held to a desired value without depending on the characteristics of the TFT. Further, a voltage of inverted bias is impressed to the light emitting element every predetermined period. Since a multiplier effect is given by the two configurations described above, it is possible to prevent the luminance from deteriorating due to a deterioration of the organic luminescent layer, and further, it is possible to maintain the current that flows to the light emitting element to a desired value without depending on the characteristics of the TFT.

Abstract: The disclosure relates to a semiconductor device including a semiconductor body, having a first surface, a gate electrode structure, which includes polycrystalline silicon, of an IGFET in a first trench extending from the first surface into the semiconductor body. The device also includes a semiconductor element, which is different from the gate electrode structure of the IGFET and includes polycrystalline silicon, in a second trench extending from the first surface into the semiconductor body, wherein the polycrystalline silicon of the IGFET and of the semiconductor element different therefrom ends below a top side of an insulation layer adjoining the first surface of the semiconductor body.

Abstract: An OLED apparatus including a thin film transistor including an activation layer, a gate electrode insulated from the activation layer and including a lower gate electrode and an upper gate electrode, an interlayer insulation film covering the gate electrode, and a source and drain electrode on the insulation film and contacting the activation layer; an OLED including a pixel electrode electrically connected to the thin film transistor, an intermediate layer including an emissive layer, and an opposite electrode; a blister prevention layer on a same level as the activation layer; a gate insulation layer covering the activation layer and the blister prevention layer and insulating the activation layer from the gate electrode; and an interconnection unit including first and second layers on a portion of the gate insulation layer overlying the blister prevention layer, wherein the blister prevention layer protects the interconnection unit on the gate insulation layer from blistering.

Abstract: The present invention provides an array substrate and a liquid crystal display panel. Wherein, in the array substrate, each pixel unit comprises a first pixel electrode, a second pixel electrode, and a third pixel electrode. And each pixel unit comprises a first control circuit and a second control circuit. The first control circuit affects the first pixel electrode, so that the first pixel electrode is under the state of displaying the image corresponding to the black screen in the 3D display mode. The second control circuit affects the second pixel electrode and the third pixel electrode to change the voltage difference between the second pixel electrode and the third pixel electrode. By the above way, the present invention can minimize the color difference in wide viewing angle, improve the opening ratio in the 2D display mode, and reduce the crosstalk of the two eyes signal in the 3D display mode. Furthermore, it can reduce the amount of the data drivers and reduce the costs.

Abstract: Solved is a problem of attenuation of output amplitude due to a threshold value of a TFT when manufacturing a circuit with TFTs of a single polarity. In a capacitor (105), a charge equivalent to a threshold value of a TFT (104) is stored. When a signal is inputted thereto, the threshold value stored in the capacitor (105) is added to a potential of the input signal. The thus obtained potential is applied to a gate electrode of a TFT (101). Therefore, it is possible to obtain the output having a normal amplitude from an output terminal (Out) without causing the amplitude attenuation in the TFT (101).

Abstract: In at least one embodiment, a TFT includes: a first capacitor formed of a first capacitor electrode connected to a source electrode and a second capacitor electrode; a second capacitor formed of a third capacitor electrode and a fourth capacitor electrode; a first lead-out line; a second lead-out line connected to a gate electrode; a third lead-out line; a fourth lead-out line; a first interconnection; and a second interconnection. This realizes a TFT which can be easily saved from being a defective product even if leakage occurs in a capacitor connected to a TFT body section.

Abstract: The present invention provides a light emitting diode including a lower semiconductor layer formed on a substrate; an upper semiconductor layer disposed above the lower semiconductor layer, exposing an edge region of the lower semiconductor layer; a first electrode formed on the upper semiconductor layer; an insulation layer interposed between the first electrode and the upper semiconductor layer, to supply electric current to the lower semiconductor layer; a second electrode formed on another region of the upper semiconductor layer, to supply electric current to the upper semiconductor layer. The first electrode includes an electrode pad disposed on the upper semiconductor layer and an extension extending from the electrode pad to the exposed lower semiconductor layer. The insulation layer may have a distributed Bragg reflector structure.

Abstract: The present invention relates to the field of display technology, and provides a pixel circuit, a driving method thereof, and a display device, so as to compensate for the TFT threshold voltage drift, thereby to improve the brightness non-uniformity of the display device and prolong the service life thereof. The pixel circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a first storage capacitor, a second storage capacitor, and a light-emitting element. The present invention is adapted to manufacture a display panel.

Abstract: A pixel circuit and a method for driving the same, a display panel and a display apparatus are configured to improve the lifespan of the pixel circuit.

Abstract: An active device array substrate includes a flexible substrate, a gate electrode, a dielectric layer, a channel layer, a source electrode, a drain electrode, and a pixel electrode. The flexible substrate has a transistor region and a transparent region adjacent to each other. The gate electrode is disposed on the transistor region. The dielectric layer covers the flexible substrate and the gate electrode. A portion of the dielectric layer disposed on the gate electrode has a first thickness. Another portion of the dielectric layer disposed on the transparent region has a second thickness less than the first thickness. The channel layer is disposed above the gate electrode. The source electrode and the drain electrode are electrically connected to the channel layer. The pixel electrode is disposed on the dielectric layer which is disposed on the transparent region. The pixel electrode is electrically connected to the drain electrode.

Abstract: A semiconductor device including: one or more pieces of first wiring having a main wiring section and a bifurcation wiring section; one or a plurality of pieces of second wiring having a trunk wiring section and a plurality of branch wiring sections within a gap region between the main wiring section and the bifurcation wiring section; one or a plurality of transistors each divided and formed into a plurality of pieces, the plurality of branch wiring sections individually functioning as a gate electrode and the one or plurality of transistors having a source region formed within the main wiring section and within the bifurcation wiring section and having a drain region formed between the plurality of branch wiring sections; and one or a plurality of pieces of third wiring electrically connected to the drain region of the one or plurality of transistors.

Abstract: An integrated FinFET and deep trench capacitor structure and methods of manufacture are disclosed. The method includes forming at least one deep trench capacitor in a silicon on insulator (SOI) substrate. The method further includes simultaneously forming polysilicon fins from material of the at least one deep trench capacitor and SOI fins from the SOI substrate. The method further includes forming an insulator layer on the polysilicon fins. The method further includes forming gate structures over the SOI fins and the insulator layer on the polysilicon fins.