Abstract: A display device includes: a gate line (GL); a semiconductor pattern (SP) on the GL; a data line (DL); a voltage division reference line (VDRL); and first to third switching elements (SWE) overlapping the SP. The first SWE includes a first source electrode (SE) connected to the DL, a first drain electrode (DE) spaced apart from the first SE, and a first gate electrode (GE) connected to the GL. The second SWE includes a second SE connected to the DL, a second DE spaced apart from the second SE, and a second GE connected to the GL. The third SWE includes a third SE connected to the VDRL, a third DE connected to the second SE, and a third GE connected to the GL. The first SE, the first DE, the second SE, and the second DE are sequentially arranged across and on the SP in a first direction.

Abstract: A thin-film transistor (TFT), an array substrate, a manufacturing method thereof and a display device are provided. The TFT includes an active layer, a gate electrode, a first source/drain electrode and a second source/drain electrode. The active layer includes a first channel region and a second channel region, a first source/drain area between the first channel region and the second channel region, and a second source/drain area opposite to the first source/drain area through the first channel region or the second channel region. The gate electrode includes a first gate electrode and a second gate electrode which are respectively overlapped with the first channel region and the second channel region. The first source/drain electrode and the second source/drain electrode are respectively electrically connected with the first source/drain area and the second source/drain area of the active layer.

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

Abstract: A liquid crystal device as an electrooptical device includes a TFT as a transistor, a pixel electrode provided correspondingly to the TFT, a storage capacitor in which a first capacitance electrode, a capacitance insulating layer, and a second capacitance electrode are stacked in order, and a contact portion as a first contact portion configured to electrically connect a semiconductor layer of the TFT and the pixel electrode. In the liquid crystal device, the second capacitance electrode includes a first conductive layer and a second conductive layer stacked on the first conductive layer, and the contact portion is configured of the second conductive layer and is provided so as to be in contact with a drain region of the semiconductor layer.

Abstract: An organic light-emitting display apparatus including an organic light-emitting diode emitting visible light, a driving thin film transistor driving the organic light-emitting diode, and a compensation thin film transistor. The compensation thin film transistor includes a compensation gate electrode, a compensation semiconductor layer, a compensation source electrode, and a compensation drain electrode. The compensation gate electrode includes a first gate electrode, and a second gate electrode electrically connected to the first gate electrode. The compensation drain electrode is electrically connected to the driving gate electrode of the driving thin film transistor.

Abstract: An active matrix substrate (1001) has multiple pixel areas. At least one pixel area includes a pixel TFT (20), a pixel electrode (15), a first circuit TFT (10), and drive circuit wiring lines (L1 to L3) that are connected to the first circuit TFT. The pixel TFT (20) and the first circuit TFT (10) are oxide semiconductor TFTs. The pixel electrode (15) is formed from an upper transparent conductive film. The drive circuit wiring line includes a transparent wiring line portion (L1 and L2) that is formed from a lower transparent conductive film which is positioned closer to a substrate 1 than the upper transparent conductive film. At least one of a source electrode (8) and a drain electrode (9) of the first circuit TFT (10) is formed from the lower transparent conductive film.

Abstract: A transistor substrate may include a base substrate, and a switching transistor and a driving transistor provided on the base substrate. The driving transistor includes: an active pattern provided on the base substrate and including a source region, a drain region spaced apart from the source region, and a channel region provided between the source region and the drain region; a gate electrode at least partially overlapping the active pattern; a gate insulating film provided between the active pattern and the gate electrode; a source electrode insulated from the gate electrode and connected to the source region; a drain electrode insulated from the gate electrode and connected to the drain region; and at least one dummy hole adjacent to the channel region.

Abstract: Disclosed is an OLED thin film packaging structure, including: a TFT substrate, an OLED, a first barrier layer, a first buffer layer, and a second barrier layer. The OLED is disposed on the TFT substrate. The first barrier layer is disposed on four sides and an upper surface of the OLED. The first buffer layer is disposed on an upper surface of the first barrier layer, and the second barrier layer covers the first barrier layer and the first buffer layer. An OLED thin film packaging method includes steps of: preparing a first barrier layer and a first buffer layer by using a first mask, and preparing a second barrier layer by using a second mask, thereby reducing a quantity of times for changing a mask, reducing a quantity of particles, and improving a thin film packaging effect.

Abstract: A unit pixel includes a circuit structure, first and second wiring patterns, an interlayer insulating layer, a planarization layer, and a light emission structure. The first wiring pattern disposed on the circuit structure has a first bump structure. The interlayer insulating layer covers the circuit structure and the first wiring pattern. The second wiring pattern disposed on the interlayer insulating layer overlaps the first wiring pattern and has a second bump structure. The planarization layer covers the interlayer insulating layer and the second wiring pattern and includes a via-hole exposing at least a portion of be second wiring pattern. The light emission structure contacts the second wiring pattern through the via-hole. The first and second wiring patterns and the interlayer insulating layer form a capacitor, the light emission structure includes an OLED, and the capacitor is directly connected to an anode of the OLED.

Abstract: A flexible display substrate is disclosed. The flexible display substrate includes a flexible substrate, a gate, a source and drain and a plurality of conductive wirings on the flexible substrate. Each conductive wiring is provided with a plurality of grooves in a bending area of the flexible display substrate, so that the damage resistance of the conductive wirings during bending is improved. A display device including the flexible display substrate and a method for fabricating the flexible display substrate are also disclosed.

Abstract: In a transmissive-type electro-optical device, a plurality of pixel electrodes each overlap with each of a plurality of openings surrounded by a plurality of first light-shielding portions extending in a first direction and a plurality of second light-shielding portions extending in a second direction. A width of the first light-shielding portion is greater than a width of the second light-shielding portion. In the opening, a size thereof in the second direction is smaller than a size thereof in the first direction. A center of each of the pixel electrodes is shifted toward the pre-tilt orientation along the second direction from a center of each of the openings.

Abstract: An organic electroluminescent device, a method for manufacturing the same, and a display device. The organic electroluminescent device includes: a base substrate comprising a plurality of pixel regions thereon; a pixel electrode layer; a planarization layer, formed with a protrusion on a surface of the planarization layer facing away from the base substrate and at a position corresponding to at least one side edge of a periphery of each pixel region; an anode layer, the anode layer being electrically connected to the pixel electrode layer through a via hole, and the anode layer covering the pixel region and covering a side surface of the protrusion facing the pixel region; a light emitting layer, a height of a surface of the light emitting layer being less than a height of the anode layer covering the side surface of the protrusion; a pixel definition layer; and a cathode layer.

Abstract: A display device includes: a plurality of pixels substantially in a matrix form including a plurality of pixel columns in a first direction and a plurality of pixel rows in a second direction intersecting the first direction; a plurality of data lines connected to the pixel columns, respectively; a plurality of scan lines extending in the second direction; and a power line which supplies a driving power voltage to the pixels. Each of the data lines includes a first sub-data line disposed at a side of a corresponding pixel column, and a second sub-data line disposed at an opposite side of the corresponding pixel column, and each of the pixels includes a first transistor and a display element connected to the first transistor, where the power line overlaps with at least a portion of the first transistor.

Abstract: An organic electroluminescent device, a method for manufacturing the same, and a display device. The organic electroluminescent device includes: a base substrate comprising a plurality of pixel regions thereon; a pixel electrode layer; a planarization layer, formed with a protrusion on a surface of the planarization layer facing away from the base substrate and at a position corresponding to at least one side edge of a periphery of each pixel region; an anode layer, the anode layer being electrically connected to the pixel electrode layer through a via hole, and the anode layer covering the pixel region and covering a side surface of the protrusion facing the pixel region; a light emitting layer, a height of a surface of the light emitting layer being less than a height of the anode layer covering the side surface of the protrusion; a pixel definition layer; and a cathode layer.

Abstract: In one embodiment, a display device includes a pair of substrates including a display area in which pixels are arranged, pixel electrodes and a memories provided in the pixels, signal lines supplied with digital signals, switching elements connecting the memories and the signal lines, scanning lines supplied with scanning signals, and first and second driver units. The first and second driver units are provided in a peripheral area. The first driver unit includes first circuit units connected to the signal lines. The first circuit units include first and second circuits. The first and second circuits are arranged in a second direction intersecting with a first direction, and are out of alignment in the first direction.

Abstract: According to one embodiment, a display device includes a pixel, a scanning line, a signal line, a pixel electrode, a first switching element, and a capacitance line producing capacitance together with the pixel electrode. The first switching element includes a first semiconductor layer connected to the signal line and the pixel electrode, and a first gate electrode opposed to the first semiconductor layer and connected to the scanning line. The capacitance line includes a first portion opposed to the scanning line and extending in an extension direction of the scanning line, a second portion connected to the first portion and opposed to the pixel electrode.

Abstract: An array substrate, a manufacturing method, a display panel and an electronic device are provided. The array substrate includes a substrate, and a gate line, an insulation layer, an active layer and a data line which are formed on the substrate. The insulation layer is provided on the gate line, the data line is provided on the gate line through the insulation layer and is crossed with the gate line, and the active layer is provided between the gate line and the data line in a direction perpendicular to the substrate, and a first shield layer is provided on the gate line through the insulation layer, and the first shield layer covers the gate line in the direction perpendicular to the substrate and is electrically insulated from the gate line, the active layer and the data line.

Abstract: The present disclosure provides a substrate, a display panel and a display device, for increasing the display viewing angle of the display device, reducing chromatic aberration, and improving product quality.

Abstract: The disclosure provides a liquid crystal display panel, an array substrate and a manufacturing method thereof. In the method, controllable resistance spacer layers are formed on at least one of a source doped region and a drain doped region of a low temperature polysilicon active layer. When a turn-on signal is not applied to the gate layer, the controllable resistance spacer layers serve as a blocking action for a flowing current; and when the turn-on signal is applied to the gate layer, the controllable resistance spacer layers serve as a conducting action for the flowing current, such that contact regions formed of the controllable resistance spacer layers are respectively connected with the corresponding source layer and the corresponding drain through the controllable resistance spacer layers. Therefore, the disclosure is capable of effectively decreasing a leakage of a thin film transistor.

Abstract: Subpixels of R, G, and B corresponding to a scanning line as a first conductive layer extended in a row direction and a data transfer line as a second conductive layer extended in a column direction are provided. A plurality of transistors in the subpixel of each of the colors is disposed along the column direction, and a reflective layer in the subpixel of at least one color is disposed along the row direction so as to overlap any transistor of subpixels of each display color. A center position of a disposition region of a reflective layer in one pixel unit including the subpixels of R, G, and B is different from a center position of a disposition region of a transistor in one pixel unit.

Abstract: A pixel circuit, a drive method, a display panel and a display device are provided. A switch transistor is arranged between a first power supply signal and an input terminal (a source) of a drive transistor. When a drive circuit is at a second detection period during which drive current of a light emitting element is detected, the switch transistor is controlled to be turned off, such that the first power supply signal is disconnected from the source of the drive transistor. In this case, no current flows through the light emitting element, and therefore the light emitting element does not emit light, thereby solving a problem in the conventional technology that the light emitting element is lighted and it is not dark in a dark state when drive current of the pixel circuit is detected.

Abstract: An organic light-emitting display apparatus includes: a substrate including a display area and a peripheral area at an outer side of the display area; a pixel electrode disposed in the display area of the substrate; a pixel-defining layer disposed on the pixel electrode and exposing at least a portion of the pixel electrode; an intermediate layer disposed on the pixel electrode; an opposite electrode disposed on the intermediate layer; a first conductive layer disposed in the peripheral area of the substrate and including at least one opening; a first block structure and a second block structure disposed on the first conductive layer and separated from each other with the at least one opening therebetween; and an encapsulation structure disposed on the opposite electrode in the display area and the peripheral area.

Abstract: In one embodiment, a display device includes a pair of substrates including a display area in which pixels are arranged, pixel electrodes and a memories provided in the pixels, signal lines supplied with digital signals, switching elements connecting the memories and the signal lines, scanning lines supplied with scanning signals, and first and second driver units. The first and second driver units are provided in a peripheral area. The first driver unit includes first circuit units connected to the signal lines. The first circuit units include first and second circuits. The first and second circuits are arranged in a second direction intersecting with a first direction, and are out of alignment in the first direction.

Abstract: According to one embodiment, a display device includes an insulating substrate, a first transistor including a first semiconductor layer of silicon and a first electrode, a first insulating layer provided above the first semiconductor layer, a second transistor including a second semiconductor layer of an oxide semiconductor, a second electrode and a conductive layer electrically connected to the second semiconductor layer, and a second insulating layer provided above the first insulating layer and the second semiconductor layer, the first electrode being electrically connected to the first semiconductor layer in a first hole, and the second electrode being in contact with the conductive layer in a second hole.

Abstract: The present invention provides a manufacture method of a Low Temperature Poly-silicon TFT substrate and a Low Temperature Poly-silicon TFT substrate, in which by locating one heat sink layer under the amorphous silicon layer in advance, the difference of the crystallizations of the polysilicons in the drive area and the display area can exist after implementing an Excimer Laser Annealing process to the amorphous silicon layer, and in the drive area, the polysilicon with the larger lattice dimension is formed to promote the electron mobility; the fractured crystals can be achieved in the crystallization process of the display area to form the polysilicon with the smaller lattice dimension for ensuring the uniformity of the grain boundary and raising the uniformity of the current, and thus, the electrical property demands for the different TFTs can be satisfied to raise the light uniformity of the OLED.

Abstract: According to one embodiment, a display device includes a pair of substrates including a display area in which pixels are arranged, pixel electrodes and memories provided in the pixels, signal lines supplied with digital signals, switching elements connecting the memories and the signal lines, scanning lines supplied with scanning signals, a first driver unit, and a second driver unit. The first driver unit is provided in a peripheral area around the display area, and supplies the digital signal to the signal line. The second driver unit is provided in the peripheral area, and supplies the scanning signal to the scanning line. In the display device, at least a part of the first driver unit is provided between the display area and the second driver unit.

Abstract: A performance of a display device having an input device is improved. A display device includes: an electro-optical layer; a first driving electrode and a second driving electrode which drives the electro-optical layer; a driver chip which outputs a video signal; a switch circuit which is arranged outside the driver chip, which selects a potential to be supplied to the second driving electrode, and which includes a first switch element and a second switch element; a shift register circuit connected to the switch circuit; and a detection circuit which detects that an object is close or in contact. Each of the first switch element and the second switch element is selectively turned ON or OFF by the shift register circuit. The detection circuit is electrically connected to the first switch element and the second switch element.

Abstract: An electrowetting display device comprises a first support plate comprising a first electrode and a second support plate. A seal connects the first support plate to the second support plate. A first fluid and a second fluid, immiscible with the first fluid, are located between the first and second support plates. A second electrode is in electrical contact with the second fluid. An electrical connector connects the first electrode to the second electrode. A barrier structure at least partly surrounds the electrical connector. The electrical connector and the barrier structure are separated from the first fluid and the second fluid by the seal.

Abstract: A circuit board comprises a mother substrate including first and second scribing regions, the first scribing region extending in first direction, the second scribing region extending in second direction, the first and second directions crossing each other, the mother substrate including chip regions defined by the first and second scribing regions, and a through via penetrating the chip regions of the mother substrate. The mother substrate comprises a first alignment pattern protruding from a top surface of the mother substrate. The first alignment pattern is disposed on at least one of the scribing regions.

Abstract: In a plurality of pixels of an electro-optical device, a storage capacitor includes a first storage capacitor, and a second storage capacitor stacked on the first storage capacitor and electrically connected thereto in parallel. In the first storage capacitor and the second storage capacitor, in which the first capacitor electrode, the second capacitor electrode, the third capacitor electrode, and the fourth capacitor electrode are stacked, the second capacitor electrode and the fourth capacitor electrode are each integrally formed in a first pixel and a second pixel, out of the plurality of pixels, and electrically connected to a capacitor line at one point.

Abstract: A manufacturing method of an array substrate, an array substrate and a display device are provided. The manufacturing method of the array substrate comprises: forming a first conductive thin film (100) on a base substrate (1); and patterning the first conductive thin film (100), to form a pattern of a cathode (11) on a first region (11) of the base substrate (1), and form a pattern of a gate electrode (4) on a second region (12) of the base substrate (1). Complexity and process time of a fabrication process of an array substrate can be reduced, a fabrication process of an organic electroluminescent panel can be simplified, and production cost can be reduced, by forming a cathode layer of a light-emitting diode and a gate electrode layer of a thin film transistor in different regions of the base substrate at the same time by one patterning process.

Abstract: The disclosure provides a liquid crystal display panel, an array substrate and a manufacturing method thereof. In the method, controllable resistance spacer layers are formed on at least one of a source doped region and a drain doped region of a low temperature polysilicon active layer, wherein when a turn-on signal is not applied to the gate layer, the controllable resistance spacer layers serve as a blocking action for a flowing current, and when the turn-on signal is applied to the gate layer, the controllable resistance spacer layers serve as a conducting action for the flowing current, such that a contact region formed of the controllable resistance spacer layers is connected the corresponding source layer and the corresponding drain through the controllable resistance spacer layers. Therefore, the disclosure is capable of effectively decreasing a leakage of a thin film transistor.

Abstract: A method of increasing the surface area of a contact to an electrical device that in one embodiment includes forming a contact stud extending through an intralevel dielectric layer to a component of the electrical device, and selectively forming a contact region on the contact stud. The selectively formed contact region has an exterior surface defined by a curvature and has a surface area that is greater than a surface area of the contact stud. An interlevel dieletric layer is formed on the intralevel dielectric layer, wherein an interlevel contact extends through the interlevel dielectric layer into direct contact with the selectively formed contact region.

Abstract: An organic light-emitting diode display includes a substrate in which an emission area and a non-emission area are defined; a thin film transistor disposed in the non-emission area on the substrate; passivation layer disposed on the thin film transistor; a first storage capacitor electrode and a second storage capacitor electrode superposed thereon, having the passivation layer interposed therebetween, in the emission area; an overcoat layer disposed on the second storage capacitor electrode; and an anode disposed on the overcoat layer, coming into contact with one side of the second storage capacitor electrode through an overcoat layer contact hole penetrating the overcoat layer and, coming into contact with part of the thin film transistor through a passivation layer contact hole disposed in the overcoat layer contact hole and penetrating the passivation layer.

Abstract: A TFT array panel of a display device includes a first substrate, a first electrode disposed on the first substrate, a first insulating layer including a first hole, the first insulating layer disposed on the first electrode, a second insulating layer disposed on the first insulating layer and including a second hole corresponding to the first hole, and a capping layer including a first inner portion, the capping layer disposed on an inner lateral surface forming the second hole, where an end portion of the first inner portion disposed in the second hole is separated from the first electrode.

Abstract: A multi-stacked device includes a lower device having a lower substrate, a first insulating layer on the lower substrate, and a through-silicon-via (TSV) pad on the first insulating layer, an intermediate device having an intermediate substrate, a second insulating layer on the intermediate substrate, and a first TSV bump on the second insulating layer, an upper device having an upper substrate, a third insulating layer on the upper substrate, a second TSV bump on the third insulating layer, and a TSV structure passing through the upper substrate, the third insulating layer, the second insulating layer, and the intermediate substrate to be connected to the first TSV bump, the second TSV bump, and the TSV pad. An insulating first TSV spacer between the intermediate substrate and the TSV structure and an insulating second TSV spacer between the upper substrate and the TSV structure are spaced apart along a stacking direction.

Abstract: Solved is a problem of attenuation of output amplitude due to a threshold value of a TFT when manufacturing a circuit with TFTs of a single polarity. In a capacitor (105), a charge equivalent to a threshold value of a TFT (104) is stored. When a signal is inputted thereto, the threshold value stored in the capacitor (105) is added to a potential of the input signal. The thus obtained potential is applied to a gate electrode of a TFT (101). Therefore, it is possible to obtain the output having a normal amplitude from an output terminal (Out) without causing the amplitude attenuation in the TFT (101).

Abstract: An organic light-emitting diode display can include a substrate in which an emission area and a non-emission area are defined; a first transparent conductive layer, a light shielding layer, a buffer layer and a semiconductor layer sequentially laminated on the non-emission area; a gate electrode superposed on the center region of the semiconductor layer, having a gate insulating layer interposed therebetween; a drain electrode coming into contact with one side of the semiconductor layer, having an interlevel insulating layer covering the gate electrode interposed therebetween, and formed of a second transparent conductive layer and a metal layer laminated thereon; a first storage capacitor electrode disposed under the interlevel insulating layer in the emission area and formed of the first transparent conductive layer; and a second storage capacitor electrode superposed on the first storage capacitor electrode, having the interlevel insulating layer interposed therebetween, and formed of the second transparen

Abstract: According to one embodiment, a method of manufacturing a magnetic memory device includes a stack structure formed of a plurality of layers including a magnetic layer, the method includes forming a lower structure film including at least one layer, etching the lower structure film to form a lower structure of the stack structure, forming an upper structure film including at least one layer on a region including the lower structure, and etching the upper structure film to form an upper structure of the stack structure on the lower structure.

Abstract: A method for fabricating a Polysilicon Thin-Film Transistor is provided. The method includes forming a polysilicon active layer, forming a first gate insulation layer and a first gate electrode sequentially on the active layer, conducting a first ion implantation process on the active layer by using the first gate electrode as a mask to form two doped regions at ends of the active layer, forming a second gate insulation layer and a second gate electrode sequentially on the first gate insulation layer and the first gate electrode, and conducting a second ion implantation process on the active layer by using the second gate electrode as another mask to form two source/drain implantation regions at two outer sides of the doped regions of the active layer. Accordingly, impurity concentration of the two doped regions is smaller than that of the two source/drain implantation regions.

Abstract: Deterioration of display quality due to a difference of leak current in each pixel is suppressed. A pixel 30G includes a pixel capacitor 36 and a switching element 14 which controls supplying and blocking of voltage with respect to the pixel capacitor 36, and modulates irradiation light of a first wavelength (530 nm) according to the voltage of the pixel capacitor 36. A pixel 30R includes the pixel capacitor 36 and the switching element 14 that controls supplying and blocking of voltage with respect to the pixel capacitor 36, and modulates irradiation light of a second wavelength (620 nm) which is longer than the first wavelength according to the voltage of the pixel capacitor 36. A capacitance value of the pixel capacitor 36 of the pixel 30G is larger than a capacitance value of the pixel capacitor 36 of the pixel 30R.

Abstract: A display comprises a first substrate, a second substrate opposite to the first substrate, an electrode structure, and a light-emitting combination (LEC) layer positioned between the first and second substrates, wherein the LEC layer comprises a light emitting material and a LC material, and a horizontal or vertical electric field is generated when a voltage is applied to that electrode structure. One of exemplified displays has an electrode structure comprising a first electrode and a second electrode oppositely disposed, and the LEC layer is positioned between the first and second electrodes, wherein a vertical electric field is generated when a voltage is applied. The device can further comprise an electron injection layer and a hole transport layer. Another exemplified display has an electrode structure arranged on one side of the first substrate, and a horizontal electric field is generated when a voltage is applied.

Abstract: An array substrate, a manufacturing method thereof and a display panel are disclosed. The array substrate includes: a base substrate, gate scanning lines, a gate-insulating layer, an active layer, data lines, a passivation layer, and pixel electrodes; the array substrate further includes: a bridge structure and a connection line corresponding to each data line; the bridge structure is located on the passivation layer and is provided in a same layer as the pixel electrodes; each connection line is located on the base substrate and is connected with the data line, through the bridge structure in an LED region and in a region under a scribe line of a counter substrate. Therefore the problem of defective display caused by breakage of data lines can be solved, and the display effect of a liquid crystal display device can be improved.

Abstract: A thin film transistor substrate including a thin film transistor and a capacitor formed of a pair of electrodes, which includes: a first electrode above a substrate; a first insulating film above the first electrode; a second electrode above the first insulating film; a second insulating film above the second electrode; and a semiconductor layer above the second insulating film, in which the capacitor includes the first electrode as one of the pair of electrodes and the second electrode as the other of the pair of electrodes, and the thin film transistor includes the second electrode as a gate electrode, the second insulating film as a gate insulating film, and the semiconductor layer as a channel layer.

Abstract: The invention discloses a liquid crystal display device, a thin film transistor array substrate and a method of fabricating the same. The thin film transistor array substrate includes: a substrate including a plurality of photo-sensitive spacer areas, a plurality of thin film transistors arranged on the substrate, each of which includes a source and a drain, and a first planarizing layer overlying the plurality of thin film transistors. Multiple planarizing layer openings are arranged in the first planarizing layer in areas corresponding to the drains of the thin film transistors; a pixel electrode layer is arranged on the first planarizing layer and in contact with the drains; and a second planarizing layer is arranged on the pixel electrode layer and fills the planarizing layer openings.

Abstract: An organic light-emitting display apparatus includes a substrate; a thin film transistor (TFT) on the substrate; a first interlayer insulating layer between a gate electrode and the source electrode and between a drain electrode and the source electrode of the TFT and including an inorganic material; a second interlayer insulating layer between the first interlayer insulating layer and the source electrode and between the first interlayer insulating layer and the drain electrode and including an organic material; a first organic layer on the source electrode and the drain electrode; a capacitor, a second electrode, and the first interlayer insulating layer between the first electrode and the second electrode; a pixel electrode in an aperture in the second interlayer insulating layer adjacent to the thin film transistor and the capacitor and coupled to the source electrode or the drain electrode; an organic emission layer; and an opposite electrode.

Abstract: An LTPS array substrate includes a plurality of LTPS thin-film transistors and a bottom transparent conductive layer, a protective layer, and a top transparent conductive layer. Each LTPS thin-film transistor includes a substrate, a patternized light shield layer, a buffering layer, a patternized poly-silicon layer, a gate insulation layer, a gate line, and a common electrode line, an insulation layer, a drain and a source, and a planarization layer that are formed to sequentially stack on each other. The light shield layer covers the scan line and the source/drain. A patternized third metal layer is between the bottom transparent conductive layer and the protective layer and includes a first zone and a second zone intersecting the first zone. The first zone shields the source line. A portion of the second zone overlaps a side portion of the light shield layer that is close to the source/drain electrode.

Abstract: The present invention provide a display substrate, a fabricating method thereof, and a display apparatus, and belongs to the field of display technology. The display substrate comprises a plurality of pixels, each of the pixels is divided into a plurality of light emitting units, each of the light emitting units comprises an anode, a cathode, a carrier transport layer, and a light emitting layer, wherein at least one of the plurality of light emitting units comprises a light emitting layer and at least one process auxiliary layer; the process auxiliary layer and the light emitting layer in other light emitting units are formed into an integral portion from a same material in a film forming process. Display resolution can be improved in the present invention.

Abstract: Integrated circuit packages with cavity are disclosed. A disclosed integrated circuit package includes a first die. A second die may be coupled to the first die by attaching the first die to a top surface of the second die. A blocking element such as a barrier structure may be formed that surrounds the second die. A cavity may be formed between the blocking element and the first die that encloses the second die. The barrier structure may help prevent underfill material from entering the cavity during underfill deposition processes. A heat spreading lid may cover the first die, second die and package substrate.

Abstract: Solved is a problem of attenuation of output amplitude due to a threshold value of a TFT when manufacturing a circuit with TFTs of a single polarity. In a capacitor (105), a charge equivalent to a threshold value of a TFT (104) is stored. When a signal is inputted thereto, the threshold value stored in the capacitor (105) is added to a potential of the input signal. The thus obtained potential is applied to a gate electrode of a TFT (101). Therefore, it is possible to obtain the output having a normal amplitude from an output terminal (Out) without causing the amplitude attenuation in the TFT (101).