Abstract: Carbon nanotube material is used in an integrated circuit substrate. According to an example embodiment, an integrated circuit arrangement (100) includes a substrate (110) with a carbon nanotube structure (120) therein. The carbon nanotube structure is arranged in one or more of a variety of manners to provide structural support and/or thermal conductivity. In some instances, the carbon nanotube structure is arranged to provide substantially all structural support for an integrated circuit arrangement. In other instances, the carbon nanotube structure is arranged to dissipate heat throughout the substrate. In still other instances, the carbon nanotube structure is arranged to remove heat from selected portions of the carbon nanotube substrate.

Abstract: The thermal energy transfer techniques of the disclosed embodiments utilize passive thermal energy transfer techniques to reduce undesirable side effects of trapped thermal energy at the circuit level. The trapped thermal energy may be transferred through the circuit with thermally conductive structures or elements that may be produced as part of a standard integrated circuit process. The localized and passive removal of thermal energy achieved at the circuit level rather just at the package level is both more effective and more efficient.

Abstract: A packaged semiconductor device comprises a package substrate comprising a first package substrate contact and a second package substrate contact, and a semiconductor die over the package substrate. The semiconductor device further includes electrical connections between signal contact pads of the die and the package substrate, and a heat spreader that comprises a first heat spreader portion which is electrically connected to a first signal contact pad and the first package substrate contact and provides an electrical conduction path and a thermal conduction path. A second heat spreader portion provides an electrical conduction path between a second signal contact pad and the second package substrate contact and a thermal conduction path between the die and package substrate. An insulating layer is positioned between the first and second heat spreader portions.

Abstract: A heat-release configuration includes a printed board on which a semiconductor component is mounted, a heat-release plate which is mounted on the semiconductor component, and configured to diffuse heat generated by the semiconductor component; and a supporting clamp which is mounted on the heat-release plate, and configured to fix the heat-release plate to the printed board via a hole provided in the printed board, the supporting clamp including a sectional L-shape in a horizontal direction having two flat surfaces substantially orthogonal to each other, the supporting clamp having on a lower side of each of the flat surfaces a leading end portion which is inserted into the hole of the printed board and a locking claw which is formed in the leading end portion and projects outside the L-shape.

Abstract: An integrated circuit die includes a substrate having an upper surface, at least one active device formed in a first area of the upper surface of the substrate, and a plurality of layers formed on the upper surface of the substrate above the at least one active device. A first stacked heat conducting structure is provided, spanning from a point proximate the first area of the upper surface of the substrate through the plurality of layers. A lateral heat conducting structure is formed above the uppermost layer of the plurality of layers and in thermal contact with the first stacked heat conducting structure. The invention advantageously facilitates the dissipation of heat from the integrated circuit die, particularly from high-power sources or other localized hot spots.

Abstract: A method and apparatus are provided for manufacturing a lead frame based, over-molded semiconductor package (7) with an exposed pad or power die flag (70) having multiple integrated THT heat spreader pins (71) configured for insertion into one or more vias (77) formed in a printed circuit board (78). The through hole heat spreader pins (71) may be formed as an integral part of the exposed pad (52) or may be solidly connected with the exposed pad (62).

Abstract: A power module includes: a sealing body including a semiconductor element having a plurality of electrode surfaces, a first conductor plate connected to one electrode surface of the semiconductor element via solder, and a sealing material for sealing the semiconductor element and the first conductor plate, the sealing body having at least a first surface and a second surface on the opposite side of the first surface; and a case for housing the sealing body. The case is configured by a first heat radiation plate opposed to the first surface of the sealing body, a second heat radiation plate opposed to the second surface of the sealing body, and an intermediate member that connects the first heat radiation plate and the second heat radiation plate. The intermediate member has a first thin section having thickness smaller than the thickness of the first heat radiation plate, more easily elastically deformed than the first heat radiation plate, and formed to surround the first heat radiation plate.

Abstract: A semiconductor power module includes an active element and a passive element serving as semiconductor elements each having a first electrode on a front surface and a second electrode on a back surface thereof, a heat pipe having a first region defined as arrangement parts of the active element and the passive element on its one end side and electrically connected to one of the first and second electrodes of the active element and the passive element arranged in the first region, a cooling fin arranged in a second region defined on the other end side of the heat pipe, and a heat pipe provided to sandwich the active element, the passive element, and the cooling fin arranged on the heat pipe along with the heat pipe and electrically connected to the other of the first and second electrodes of the active element and passive element.

Abstract: A heat sink includes a first adhesive layer, and a heat dissipation layer disposed on the first adhesive layer, and has ventilation ports that extend therethrough including through the first adhesive layer and the heat dissipation layer. The heat sink forms an outermost part of a semiconductor package. Thus, when the heat sink is bonded via its adhesive layer to underlying structure during a manufacturing process, the ventilation ports allow air to pass therethrough. As a result, air is not trapped in the form of bubbles between the heat sink and the underlying structure.

Abstract: One or more heating elements are disposed on a semiconductor substrate proximate a temperature sensitive circuit disposed on the substrate (e.g., bandgap circuit, oscillator). The heater element(s) can be controlled to heat the substrate and elevate the temperature of the circuit to one or more temperature points. One or more temperature measurements can be made at each of the one or more temperature points for calibrating one or more reference values of the circuit (e.g., bandgap voltage).

Abstract: In a manufacturing method of a package carrier, a substrate including a first metal layer, a second metal layer having a top surface and a bottom surface opposite to each other, and an insulating layer between the first and second metal layers is provided. The second metal layer has a greater thickness than the first metal layer. A first opening passing through the first metal layer and the insulating layer and exposing a portion of the top surface of the second metal layer is formed. The first metal layer is patterned to form a patterned conductive layer. Second openings are formed on the bottom surface of the second metal layer. The second metal layer is divided into thermal conductive blocks by the second openings that do not connect the first opening. A surface passivation layer is formed on the patterned conductive layer and the exposed portion of the top surface.

Abstract: To reduce the thermal stresses that may be caused by a difference in thermal expansion coefficients between a molded casing and an active side of a semiconductor device embedded in the molded casing, and thus reduce the number of corresponding failures caused by the thermal stresses, the active side of the semiconductor device is arranged face-down, towards a substrate supporting the semiconductor device. The semiconductor device includes a through via that electrically connects the active side of the semiconductor device to a passive side of the semiconductor device. A wire bond electrically connects the passive side of the semiconductor device to the substrate. To increase the dissipation of heat generated in the semiconductor device, a thermally conductive slug may be disposed in the substrate, and the active side of the semiconductor device may be attached to the thermally conductive slug.

Abstract: A semiconductor apparatus according to embodiments of the invention can include a first semiconductor device made of silicon, the first semiconductor devices being arranged collectively, whereby to form a first device group, and a second semiconductor device made of silicon carbide, the second semiconductor devices being arranged collectively, whereby to form a second device group. The apparatus can also include a wiring conductor connecting the first semiconductor device and the second semiconductor device, a cooling fin base comprising a projection formed thereon, whereby to dissipate heat generated from the first and second semiconductor devices, and the projections arranged under the second device group being spaced apart from each other more widely than the projections arranged under the first device group.

Abstract: Provided are a heat sink package in which a semiconductor package and a heat sink are bound to each other and a method of fabricating the same. The heat sink package includes a heat sink having a cavity on an upper surface thereof; a metal layer formed on the bottom surface of the cavity; a solder paste layer formed on the metal layer; a substrate on the solder paste layer; and a lead and a semiconductor chip mounted on the substrate.

Abstract: A light-emitting diode device includes a light-emitting diode, a power circuit portion for supplying electric power to the light-emitting diode, and a heat dissipating member for dissipating the heat generated from the light-emitting diode. The heat dissipating member is made of a thermal conductive sheet which contains a plate-like boron nitride particle. The thermal conductivity in a direction perpendicular to the thickness direction of the thermal conductive sheet is 4 W/m·K or more.

Abstract: A method for fabricating a thin package that encapsulates a capped MEMS device electrically coupled with one or more encapsulated semiconductor devices is provided. A wafer-level packaging methodology is used in which the capped MEMS device is electrically coupled to a package interconnect, which then allows for electrical coupling to the one or more encapsulated semiconductor devices, as well as external connections.

Abstract: A structure and method of fabricating the structure includes a semiconductor substrate having a top surface defining a horizontal direction and a plurality of interconnect levels stacked from a lowermost level proximate the top surface of the semiconductor substrate to an uppermost level furthest from the top surface. Each of the interconnect levels include vertical metal conductors physically connected to one another in a vertical direction perpendicular to the horizontal direction. The vertical conductors in the lowermost level being physically connected to the top surface of the substrate, and the vertical conductors forming a heat sink connected to the semiconductor substrate. A resistor is included in a layer immediately above the uppermost level. The vertical conductors being aligned under a downward vertical resistor footprint of the resistor, and each interconnect level further include horizontal metal conductors positioned in the horizontal direction and being connected to the vertical conductors.

Abstract: A power semiconductor module is fabricated by providing a base with a metal surface and an insulating substrate comprising an insulation carrier having a bottom side provided with a bottom metallization layer. An insert exhibiting a wavy structure is provided. The insert is positioned between the insulation carrier and metal surface, after which the metal surface is soldered to the bottom side metallization layer and insert by means of a solder packing all interstices between the metal surface and bottom side metallization layer with the solder.

Abstract: A heat dissipation substrate including a metal substrate, a metal layer, an insulating material layer and a patterned conductive layer is provided. The metal layer is disposed on the metal substrate and entirely covers the metal substrate. The metal layer has a first metal block and a second metal block surrounding the first metal block. A thickness of the first metal block is greater than a thickness of the second metal block. The insulating material layer is disposed on the second metal block. The patterned conductive layer is disposed on the insulating material layer and on the first metal block.

Abstract: Disclosed herein are a power package module and a method for fabricating the same, including: a base substrate; a plurality of high power chips and a plurality of low power chips electrically connected to the base substrate; and a plurality of metal lead plates electrically connecting the plurality of high power chips and the plurality of low power chips to the base substrate.

Abstract: By providing heat dissipation elements or heat pipes in temperature critical areas of a semiconductor device, enhanced performance, reliability and packing density may be achieved. The heat dissipation elements may be formed on the basis of standard manufacturing techniques and may be positioned in close proximity to individual transistor elements and/or may be used for shielding particular circuit portions.

Abstract: A circuit board and a semiconductor module with high endurance against thermal cycles, and which is hard to be broken under thermal cycles, even if thick metal circuit board and thick metal heat sink are used, corresponding to high power operation of a semiconductor chip are provided. This circuit board includes, an insulating-ceramic substrate, a metal circuit plate bonded to one face of the insulating-ceramic substrate, a metal heat sink bonded to another face of the insulating-ceramic substrate, wherein (t12?t22)/tc2/K<1.5, where, a thickness of the insulating ceramics substrate is tc, a thickness of the metal circuit plate is t1, a thickness of the metal heat sink is t2, and an internal fracture toughness value of the insulating ceramics substrate is K.

Abstract: Disclosed herein are a heat-radiating substrate and a method of manufacturing the same. The heat-radiating substrate includes: a base substrate with a heat sink, having a groove; an insulating layer formed on the base substrate by performing anodization thereon; and a circuit layer formed on the insulating layer, whereby the heat-radiating substrate with the heat-sink, made of metal material, is manufactured, thereby making it possible to protect devices weak against heat and thus solve the problem in view of reduced life span and degraded reliability.

Abstract: Provided are semiconductor devices having through electrodes and methods of fabricating the same. The method includes providing a substrate including top and bottom surfaces facing each other, forming a hole and a gap extending from the top surface of the substrate toward the bottom surface of the substrate, the gap surrounding the hole and being shallower than the hole, filling the hole with an insulating material, forming a metal interconnection line on the top surface of the substrate on the insulating material, recessing the bottom surface of the substrate to expose the insulating material, removing the insulating material to expose the metal interconnection line via the hole, filling the hole with a conductive material to form a through electrode connected to the metal interconnection line, recessing the bottom surface of the substrate again to expose the gap, and forming a lower insulating layer on the bottom surface of the substrate.

Abstract: A semiconductor devices includes a first die pad having the conductivity connected to one end of a DC power source, a second die pad having the conductivity connected to the other end of the DC power source, a first switching element provided on the first die pad, receiving DC power from the DC power source via the first die pad, and having a terminal opposite to the first die pad connected to a first output terminal, and a second switching element provided on the second die pad, receiving the DC power from the DC power source via the second die pad, and connected to the first output terminal, and having a terminal opposite to the second die pad.

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace, a substrate and an adhesive. The heat spreader includes a post and a base. The conductive trace includes a pad, a terminal, a conductive pattern and first and second vias. The substrate includes the conductive pattern and a dielectric layer. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The post extends upwardly from the base into an opening in the adhesive and an aperture in the substrate, and the base extends laterally from the post. The conductive trace provides signal routing between the pad and the terminal using the conductive pattern and the vias.

Abstract: A semiconductor module structure and a method of forming the semiconductor module structure are disclosed. The structure incorporates a die mounted on a substrate and covered by a lid. A thermal compound is disposed within a thermal gap between the die and the lid. A barrier around the periphery of the die extends between the lid and the substrate, contains the thermal compound, and flexes in response to expansion and contraction of both the substrate and the lid during cycling of the semiconductor module. More particularly, either the barrier is formed of a flexible material or has a flexible connection to the substrate and/or to the lid. The barrier effectively contains the thermal compound between the die and the lid and, thereby, provides acceptable and controlled coverage of the thermal compound over the die for heat removal.

Abstract: An integrated chip package includes at least one semiconductor chip. The at least one semiconductor chip includes a first surface and a second surface. The integrated chip package includes an intermediate substrate. The intermediate substrate is electrically coupled via conductive bumps to the first surface of the at least one semiconductor chip. The intermediate substrate includes at least one capacitor electrically coupled to the at least one semiconductor chip. The at least one capacitor includes a trench capacitor. The integrated chip package includes a package substrate. The package substrate includes a first surface electrically coupled to the intermediate substrate via a plurality of bonding wires.

Abstract: The present disclosure relates to structures of LED components that integrate thermoelectric devices with LEDs on LED emitter substrates for cooling the LEDs. The present disclosure also related to methods for integrating LED dies with thermoelectric elements. The LED component includes an LED emitter substrate with a cavity in a downward facing surface of the LED emitter substrate and thermal vias that extend from a bottom of the cavity to an area close to an upward facing surface of the LED emitter substrate. The device also includes thermoelectric elements disposed in the cavity where the thermoelectric elements connect with their corresponding thermal vias. The device further includes a thermoelectric substrate in the cavity to electrically connect to the thermoelectric elements. The device further includes an LED die on the upward facing surface of the LED emitter substrate such that the LED die is opposite the cavity.

Abstract: A galvanic isolation integrated circuit system includes a semiconductor substrate; a layer of thermally conductive material, e.g., CVD nano- or poly-diamond thin film or boron nitride CVD thin film, formed over the semiconductor substrate; a first integrated circuit structure formed over the layer of thermally conductive material; a second integrated circuit structure formed over the layer of thermally conductive material, the second integrated circuit structure being spaced apart from the first integrated circuit structure; and a galvanic isolation structure formed over the layer of thermally conductive material between the first and second integrated circuit structures and connected to the first integrated circuit structure and the second integrated circuit structure.

Abstract: Disclosed is a composition, in particular a dispersion, which contains nanofiber material in at least one organic matrix component, said nanofiber material being pre-treated in at least one method step for adjusting the physical properties of the composition.

Abstract: The package substrates with through silicon plugs (or vias) described above provide lateral and vertical heat dissipation pathways for semiconductor chips that require thermal management. Designs of through silicon plugs (TSPs) with high duty ratios can most effectively provide heat dissipation. TSP designs with patterns of double-sided combs can provide high duty ratios, such as equal to or greater than 50%. Package substrates with high duty ratios are useful for semiconductor chips that generate large amount of heat. An example of such semiconductor chip is a light-emitting diode (LED) chip.

Abstract: The present invention discloses a bonding method for a three-dimensional integrated circuit and the three-dimensional integrated circuit thereof. The bonding method comprises the steps of: providing a substrate; depositing a film layer on the substrate; providing a light source to light onto the film layer to form a graphic structure; forming a metal co-deposition layer by a first metal and a second metal that are co-deposited on the film layer; providing a first integrated circuit having the substrate, the film layer and the metal co-deposition layer sequentially; providing a second integrated circuit that having the metal co-deposition layer, the film layer and the substrate sequentially; and the first integrated circuit is bonded with the second integrated circuit at a predetermined temperature to form a three-dimensional integrated circuit.

Abstract: A semiconductor apparatus 10 includes a radiator 30 on which plural semiconductor modules 20 that include semiconductor elements 21 are mounted, the semiconductor apparatus 10 characterized by the radiator 30 including a first main surface 30B and a second main surface 30C configured to be located on the opposite side of the first main surface 30B. Semiconductor module mount-surfaces 30B1, 30B2, 30C1, 30C2 are arranged in the first main surface 30B and the second main surface 30C in a zigzag pattern in cross-sectional view; and the semiconductor modules 20 are mounted onto some or all of the semiconductor module mount-surfaces 30B1, 30B2, 30C1, 30C2.

Abstract: A power semiconductor device has the power semiconductor elements having back surfaces bonded to wiring patterns and surface electrodes, cylindrical communication parts having bottom surfaces bonded on the surface electrodes of the power semiconductor elements and/or on the wiring patterns, a transfer mold resin having concave parts which expose the upper surfaces of the communication parts and cover the insulating layer, the wiring patterns, and the power semiconductor elements. External terminals have one ends inserted in the upper surfaces of the communication parts and the other ends guided upward, and at least one external terminal has, between both end parts, a bent area which is bent in an L shape and is embedded in the concave part of the transfer mold resin.

Abstract: A semiconductor module includes a semiconductor device; a metal plate portion that includes a first surface on a side of the semiconductor device and has a fastening portion at an end thereof; a molded portion that is formed by molding a resin on the semiconductor device and the metal plate portion, a cooling plate portion that is a separate member from the metal plate portion, is provided on a side opposite to the first surface on the side of the semiconductor device, and includes fins on a side opposite to the side of the metal plate portion; wherein the fastening portion of the metal plate portion is exposed out of the molded portion, and the cooling plate portion includes a fastening portion at a position that corresponds to a position of the fastening portion of the metal plate portion.

Abstract: The present disclosure provides systems and methods for forming a semiconductor device. The semiconductor device includes a substrate having a first side and a second side opposite the first side. A first heat producing element is formed on the first side of the substrate. A second heat producing element is formed on the first side of substrate co-planar with, but not touching the first heat producing element. A heat spreader is coupled to the second side of the substrate using a thermal interface material. The heat spreader includes a first and second vapor chambers. The first vapor chamber is embedded in the heat spreader substantially opposite the first heat producing element. The second vapor chamber is embedded in the heat spreader substantially opposite the second heat producing element. As an example, the first heat producing element may be a light-emitting diode (LED) and the second heat producing element may be a driver circuit for the LED.

Abstract: A method and a package for circuit chip package having a bent structure. The circuit chip package includes: a substrate having a first coefficient of thermal expansion (CTE); a circuit chip, having a second CTE, mounted onto the substrate; a metal foil disposed on the circuit chip in thermal contact with the chip; a metal lid having (i) a third CTE that is different from the first CTE and (ii) a bottom edge region, where the metal lid is disposed on the metal foil in thermal contact with the metal foil; and an adhesive layer along the bottom edge of the metal lid, cured at a first temperature, bonding the lid to the substrate, producing an assembly which, at a second temperature, is transformed to a bent circuit chip package.

Abstract: In a hybrid integrated circuit device, a circuit board on which an island portion of a lead is fixedly attached and a control board on which a control element and the like are mounted are disposed in an overlapping manner. The circuit board and the control board are integrally encapsulated with an encapsulating resin. A transistor disposed on an upper surface of the circuit board and a control element mounted on an upper surface of the control board are also covered by the encapsulating resin. Thus, a module in which an inverter circuit and a control circuit are integrally encapsulated with resin is provided.

Abstract: A semiconductor device includes a first protection film for covering a first metal wiring. A second protection film is disposed on the first protection film, which is covered with a solder layer. Even if a crack is generated in the second protection film before the solder layer is formed on the second protection film, the crack is restricted from proceeding into the first protection film.

Abstract: Provided is a semiconductor device including a heat dissipating fin; an insulating sheet bonded to an upper surface of the heat dissipating fin, with a part of the upper surface being exposed; a heat spreader located on the insulating sheet; a power element located on the heat spreader; and a transfer molding resin located to cover a predetermined surface including the part of the upper surface of the heat dissipating fin, the insulating sheet, the heat spreader and the power element, wherein the upper surface of the heat dissipating fin has a protruding shape and/or recessed shape located so as to bind an edge of the insulating sheet.

Abstract: A semiconductor component includes a semiconductor element that has a plurality of signals, a wiring board that is disposed below the semiconductor element and that draws the plurality of signals of the semiconductor element, a heat conduction member that dissipates heat generated by the semiconductor element, a joining member that is disposed between the semiconductor element and the heat conduction member and that joins the heat conduction member to the semiconductor element, a support member formed with an opening so as to surround the semiconductor element that supports the heat conduction member, a first adhesive member that is disposed between the support member and the wiring board to bond the support member with the wiring board and a second adhesive member that is disposed between the support member and the heat conduction member to bond the support member with the heat conduction member.

Abstract: The semiconductor device has a unit stack body including a plurality of units stacked on one another. Each unit includes a power terminal constituted of a lead part and a connection part. The connection part is formed with a projection and a recess. When the units are stacked on one another, the projection of one unit is fitted to the recess of the adjacent unit, so that the power terminals of the respective unit are connected to one another.

Abstract: A BGA substrate which has a back surface to which a heat radiating plate is attached and an opening for accommodating a relay wiring substrate therein, which is provided in the center of its surface, is used. The relay wiring substrate to which an ASIC chip and a memory chip are flip-chip connected, is bonded to the heat radiating plate in the opening with a thermal conductive bonding material. Further, each of the back surfaces of the ASIC chip and the memory chip is connected to a metal cap for sealing the opening through a thermal conductive material interposed therebetween.

Abstract: A semiconductor package structure includes: a substrate comprising a plurality of power supply balls on a first surface of the substrate, a first metal conductor on a second surface of the substrate and at least one via coupling a power supply ball to the first metal conductor of the substrate; a die, comprising a plurality of bond pads on a first surface of the die, a first metal conductor on a second surface of the die and at least one via coupling a bond pad to the first metal conductor of the die; and a plurality of first wire bonds for coupling the first metal conductor of the substrate to the first metal conductor of the die.

Abstract: A semiconductor device has a semiconductor die mounted to a substrate. The semiconductor die and substrate are disposed within a mold chase with a releasing layer disposed over the semiconductor die. A MUF material is deposited around the semiconductor die, releasing layer, and substrate through an opening in the mold chase. The opening in the mold chase is located in an upper mold support of the mold chase. A recess is formed in the MUF material by removing the releasing layer. A TIM is formed in the recess of the MUF material. The TIM is substantially coplanar with the MUF material. A heat spreader is formed over the TIM material. The heat spreader can be formed within the recess of the MUF material over the TIM. A plurality of bumps is formed over a surface of the substrate opposite the semiconductor die.

Abstract: Provided are a light emitting device package and a lighting system comprising the same. The light emitting device package comprises a package body having a trench, a metal layer within the trench, and a light emitting device over the metal layer.

Abstract: In some embodiments, a semiconductor cooling apparatus includes a monolithic array of cooling elements. Each cooling element of the monolithic array of cooling elements is configured to thermally couple to a respective semiconductor element of an array of semiconductor elements. At least two of the semiconductor elements have a different height and each cooling element independently flexes to conform to the height of the respective semiconductor element.

Abstract: According to one embodiment, an electronic apparatus includes a housing, a circuit board in the housing, a heat sink, and a fixing portion. The circuit board includes a heating component. The heat sink has a plate shape and faces the heating component. The fixing portion is attached to the heat sink and fixed to the circuit board at least at two points.

Abstract: In a COF of an embodiment of the present invention, the smaller distance to edges of a heat-releasing member an area of the heat-releasing member has, the larger openings the area has. Accordingly, a volume per area (an area per length) of the heat-releasing member decreases toward the edges. The arrangement improves flexibility of the COF. This prevents a stress caused by bending the COF from concentrating at the edges. This makes it possible to prevent a line on an insulating film from being broken. Also, it becomes possible to prevent an anisotropic conductive resin from coming off which is used to bond the COF with a display panel in providing the COF in a display apparatus.