Abstract: A semiconductor package may include at least one semiconductor chip mounted on a substrate, a molding layer adapted to mold the at least one semiconductor chip, a heat slug, on the molding layer, having a structure in which a dielectric is provided between conductors, and a through mold via electrically connecting the heat slug to the substrate.

Abstract: A method of manufacturing a semiconductor device has forming a ferroelectric film over a substrate, placing the substrate having the ferroelectric film in a chamber substantially held in vacuum, introducing oxygen and an inert gas into the chamber, annealing the ferroelectric film in the chamber, and containing oxygen and the inert gas while the chamber is maintained sealed.

Abstract: A semiconductor device has: a radiator plate that is maintained at a predetermined potential; an SOI (Silicon On Insulator) chip mounted on the radiator plate; and thermal grease applied to an interface between the radiator plate and the SOI chip. The SOI chip has: a first silicon substrate forming a circuit element part; a second silicon substrate facing the radiator plate; and an insulating film formed between the first silicon substrate and the second silicon substrate. The first silicon substrate and the second silicon substrate are electrically connected to each other. The thermal grease is conductive and electrically connects the second silicon substrate and the radiator plate.

Abstract: The present invention relates to a device adapted in order to decrease stress on connection points between a heat generating source and a substrate. The device 13 comprises a larger heat-dissipating part 7, and at least one smaller heat-dissipating part 6. The larger part 7 is arranged with at least one cavity 8 for housing the at least one smaller part 6. The at least one smaller part 6 is adapted to be attached to at least one heat-generating source 2, and at the same time more mobile in the cavity 8 and/or less affected by changes in temperature than the larger part.

Abstract: As a substrate for a semiconductor device, a metal substrate is used, and the metal substrate is composed of a metal base body made of a first metal and a connecting metal layer made of a second metal for covering the metal base body. The substrate has a structure wherein a diffusion preventing layer for preventing diffusion of the first metal is provided on the connecting metal layer.

Abstract: In one embodiment the present invention provides for a high thermal conductivity highly structured resin that comprises a host highly structured resin matrix, and a high thermal conductivity filler 30. The high thermal conductivity fillers are from 1-1000 nm in length, and high thermal conductivity fillers have an aspect ratio of between 3-100. Particular highly structured highly structured resins include at least one of liquid crystal 40 polymers, interpenetrating networks, dendrimer type matrices, expanding polymers, ladder polymers, star polymers and structured organic-inorganic hybrids 60.

Abstract: The present application provides a method and semiconductor packaging structure comprising a conductive substrate having a first surface, a first lateral surface and a second lateral surface adjacent to the first surface. A first electrode line with two ends are provided on the first surface and the first lateral surface, and a second electrode line with two ends are provided on the first surface and a second lateral surface respectively. A semiconductor device is provided on the first surface of the conductive substrate which electrically connected to the first electrode line and the second electrode line, a protective plate with through holes covers the first surface, and a sheathing overlays the semiconductor device.

Abstract: A thermal interface device (100) includes a base member (102) and a pocket (104) which is filled with a thermally conductive material or medium such as diamond dust suspended in a solvent such as propylene glycol or a thermally conductive material such as thermally conductive rubber. The pocket (104) is hermitically sealed to the base member (102) in order to keep the thermally conductive material within the pocket. The filled pocket (104) forms a deformable “pillow” having a high thermal conductance. The deformable pocket (104) can contour to the shape of a device it is pressed against such as an electronic device undergoing testing.

Abstract: A semiconductor heat spreader from a unitary metallic plate is provided. The unitary metallic plate is formed into a panel, channel walls, at least two feet, and at least one external reversing bend. The channel walls depend from the panel to define a channel between the channel walls and the panel for receiving a semiconductor therein. The feet extend from respective channel walls for attachment to a substrate.

Abstract: The invention provides a semiconductor high-power light-emitting module including a heat-dissipating member, a heat-conducting device, and a diode light-emitting device. The heat-dissipating member includes an isolator member coupled to a first side of the heat-dissipating member. The heat-dissipating member has a second side opposite to the first side. The isolator member has a third side opposite to the first side. The environment temperature at the third side is higher than that at the second side. The heat-conducting device has a flat end and a contact portion tightly mounted on the heat-dissipating member. The diode light-emitting device is disposed on the flat end of the heat-conducting device. The semiconductor light-emitting module of the invention, applied to a headlamp of an automobile, has properties of saving electricity and long life, and furthermore the capability of integrating the heat-dissipating member into a shell of the automobile is both artistic and practical.

Abstract: Provided is a heat conductive sheet obtained by dispersing an inorganic filler in a thermosetting resin, in which the inorganic filler contains secondary aggregation particles formed by isotropically aggregating scaly boron nitride primary particles having an average length of 15 ?m or less, and the inorganic filler contains more than 20 vol % of the secondary aggregation particles each having a particle diameter of 50 ?m or more. The heat conductive sheet is advantageous in terms of productivity and cost and excellent in heat conductivity and electrical insulating properties.

Abstract: The present invention relates to a silicon substrate having through vias and a package having the same. The silicon substrate includes a substrate body, a plurality of through vias and at least one heat dissipating area. The substrate body has a surface, and the material of the substrate body is silicon. The through vias penetrate the substrate body, and each of the through vias has a conductive material therein. The heat dissipating area is disposed on the surface of the substrate body and covers at least two through vias. The heat dissipating area is made of metal, and the through vias inside the heat dissipating area have same electrical potential. Thus, the heat in the through vias is transmitted to the heat dissipating area, and since the area of the heat dissipating area is large, the silicon substrate has good heat dissipation efficiency.

Abstract: Provided is an electrode pad for mounting an electronic component on a surface of a circuit board. The electrode pad includes first and second electrode parts facing each other, and third and fourth electrode parts facing each other. The third and fourth electrode parts are disposed adjacent to the first and second electrode parts for forming corners of the electrode pad together with the first and second electrode parts. At least one of the first to fourth electrode parts includes a chamfered surface formed by cutting a corner of the at least one of the first to fourth electrode parts forming the corner of the electrode pad. Therefore, when the electrode pad is used for mounting an electronic component, the width of an outer electrode of the electronic component can be sufficiently increased, and thus the shape or size of the outer electrode can be easily adjusted.

Abstract: The invention provides a semiconductor element mounting substrate that, by virtue of an improvement in thermal conduction efficiency between the substrate and another member, can reliably prevent, for example, a light emitting element such as a semiconductor laser from causing a defective operation by heat generation of itself, by taking full advantage of high thermal conductivity of a diamond composite material.

Abstract: A semiconductor device has a conductive via formed around a perimeter of the semiconductor die. First and second conductive layers are formed on opposite sides of the semiconductor die and thermally connected to the conductive via. An insulating layer is formed over the semiconductor die. Openings in the insulating layer expose the first conductive layer and a thermal dissipation region of semiconductor die. A thermal via is formed through the insulating layer to the first conductive layer. A thermally conductive layer is formed over the thermal dissipation region and thermal via. A thermal conduction path is formed from the thermal dissipation region through the thermally conductive layer, thermal via, first conductive layer, conductive via, and second conductive layer. The thermal conduction path terminates in an external thermal ground point. The thermally conductive layer provides shielding for electromagnetic interference.

Abstract: An integrated circuit package system includes a conductive substrate. A heat sink and a plurality of leads are etched in the substrate to define a conductive film connecting the heat sink and the plurality of leads to maintain their spatial relationship. A die is attached to the heat sink and wire bonded to the plurality of leads. An encapsulant is formed over the die, the heat sink, and the plurality of leads. The conductive film is etched away to expose the encapsulant and the bottom surfaces of the heat sink and the plurality of leads. Wave soldering is used to form solder on at least the plurality of leads. Multiple heat sinks and hanging leads are provided.

Abstract: An electronic component module comprising at least one ceramic circuit carrier (2, 3) and a cooling device with at least one heat sink (4), a bonding region arranged between the ceramic circuit carrier (2, 3) and the cooling device adapted for bonding the circuit carrier (2, 3) to the cooling device (4). The bonding region (5, 7; 6, 8) comprises a bonding layer comprised of metal and a eutectic region (7, 8).

Abstract: A package for use in encapsulating an electronic device is disclosed. The package includes a dielectric frame having first and second sides with a pair of apertures extending through the dielectric frame. These apertures are separated by a raised shelf span extending inwardly from an internal perimeter of the dielectric frame. The raised shelf span defines a first thickness of the dielectric frame and a raised sidewall extending outwardly from the second side along an external perimeter of said dielectric frame defines a second thickness of said frame, with the second thickness being greater than the first thickness. Also provided is a metallic component having a flange and a pedestal that extends perpendicularly from the flange. The flange is bonded to the first side of the dielectric frame and extends across one of the pair of apertures with the pedestal extending into that aperture. A gap between the pedestal and the dielectric frame having a width of at least 0.015 inch.

Abstract: A packaged integrated circuit having a thermal pathway to exhaust heat from the integrated circuit. The integrated circuit is disposed on a package substrate, with an encapsulant disposed around the integrated circuit. A heat sink is disposed at least partially within the encapsulant, with at least a portion of one surface of the heat sink exposed outside of the encapsulant. The integrated circuit has an uppermost passivation layer, where the passivation layer is not electrically conductive, with a port disposed in the passivation layer. The port extends completely through the passivation layer to expose an underlying layer. A thermal pathway is disposed at least partially within the port, and makes thermal contact to both the underlying layer and the heat sink. The thermal transfer rate of the thermal pathway is greater than the thermal transfer rate either the passivation layer or the encapsulant.

Abstract: According to one embodiment, a printed circuit board comprises a printed wiring board, circuit component, reinforcing plate and first and second fixing portion. The printed wiring board includes first and second areas. A reinforcing plate secured to the other of the first and second surfaces in said at least one of the first and second areas. The first fixing portion is provided on a border line that defines the first and second areas. The first fixing portion can fix the reinforcing plate to both the first and second areas. The second fixing portion comprises a plurality of apertures arranged symmetrical with respect to the border line.

Abstract: The semiconductor device includes a substrate, a first semiconductor element, a second semiconductor element, a first heat sink and a second heat sink. The first and the second semiconductor elements are provided on the substrate. The maximum power consumption of the first semiconductor element is lower than that of the second semiconductor element. The first heat sink is fixed to the first semiconductor element. The second heat sink is fixed to the second semiconductor element. The first heat sink is spaced apart from the second heat sink.

Abstract: A semiconductor module having a semiconductor chip stack and a method for producing the same is disclosed. In one embodiment, a thermally conductive layer with anisotropically thermally conductive particles is arranged between the semiconductor chips. The anisotropically thermally conductive particles have a lower thermal conductivity in a direction vertically with respect to the layer or the film than in a direction of the layer or the film.

Abstract: In an embodiment, the invention provides a PLCC package comprising first and second lead frames, a plastic structural body, a light source, an encapsulant, and an optical lens. The first lead frame comprises two tongues and a reflector cup. The first and second lead frames are attached to the plastic structural body. The light source is mounted and electrically connected at the bottom of the inside of the reflector cup. The light source is also electrically connected to the second lead frame by a wire bond. The reflector cup is surrounded on at least four sides by the encapsulant, the encapsulant having a domed portion that functions as the optical lens, the encapsulant being an integral single piece structure.

Abstract: A method of forming a well-anchored carbon nanotube (CNT) array, as well as thermal interfaces that make use of CNT arrays to provide very high thermal contact conductance. A thermal interface is formed between two bodies by depositing a continuous array of carbon nanotubes on a first of the bodies so that, on mating the bodies, the continuous array is between surface portions of the first and second bodies. The thermal interface preferably includes a multilayer anchoring structure that promotes anchoring of the continuous array of carbon nanotubes to the first body. The anchoring structure includes a titanium bond layer contacting the surface portion of the first body, and an outermost layer with nickel or iron catalytic particles from which the continuous array of carbon nanotubes are nucleated and grown. Additional thermal interface materials (TIM's) can be used in combination with the continuous array of carbon nanotubes.

Abstract: A heat sink substrate has a composite structure including a three-dimensional network structure of SiC ceramic having pores infiltrated with Si, and has a thermal conductivity of not less than 150 W/m·K and an oxygen content of not greater than 7 ppm. The heat sink substrate is easily allowed to have an increased surface area. Further, the heat sink substrate has a higher thermal conductivity and a coefficient thermal expansion close to that of the SiC. Therefore, the heat sink substrate is superior in the efficiency of heat conduction from a semiconductor device. The heat sink substrate is produced by infiltrating a thermally melted Si into the pores of the three-dimensional network structure in a non-oxidative atmosphere in the presence of an oxygen absorber.

Abstract: An LED assembly can include a heat sink base, at least one LED die attached to the heat sink base, and a lens. One or more layers of phosphor can be formed upon the lens. A heat sink, such as a finned heat sink, can attach the heat sink base to the lens. Heat from the LED die can flow through the heat sink base to the heat sink, from which the heat can be dissipated. Similarly, heat from phosphors can flow through the lens to the heat sink, from which the heat can be dissipated. By removing heat from the LED die, more current can be used to drive the LED die, thus providing brighter light. By removing heat from the phosphors, desired colors can be more reliably provided.

Abstract: An anisotropic thermal conductive element that can conduct heat from a thermal source with high efficiency in the thickness direction which maintaining strength and a method of making the element. To achieve the above, an anisotropic thermal conductive element that can conduct heat from a heat source, a structure with a stack of graphite sheets having a contact surface across the thickness direction of the graphite sheets, and the stack of graphite sheets has the surroundings thereof coated to form a support parts. The coating process covers the structure of stacked graphite with a support part. A cutting process can be performed by cutting along the surface in the stacking direction after the coating process. After the cutting process, a surface treatment process can make a surface treatment to a section.

Abstract: There is provided an LED package having high heat dissipation efficiency. An LED package according to an aspect of the invention may include: a package body including a first groove portion being recessed into the package body and provided as a mounting area on the top of the package body; first and second lead frames arranged on a lower surface of the first groove portion while parts of the first and second lead frames are exposed; an LED chip mounted onto the lower surface of the first groove portion and electrically connected to the first and second lead frames; and a plurality of heat dissipation patterns provided on the bottom of the package body and formed of carbon nanotubes.

Abstract: A package for use in encapsulating an electronic device is disclosed. In some embodiments, the package includes the following: a dielectric frame having first and second sides, an aperture, a raised shelf portion defined along an internal perimeter of the dielectric frame and extending outwardly from the second side, the raised shelf portion defining a first thickness of the dielectric frame, and a raised sidewall extending outwardly from the second side along an external perimeter of the dielectric frame, the raised sidewall defining a second thickness of the frame, the second thickness being greater than the first thickness; a metallic component bonded to the dielectric frame and extending across the aperture; and a seam weldable, low-profile metallic seal ring bonded to the raised sidewall of the dielectric frame.

Abstract: A back-side lamination (BSL) is applied after thinning a microelectronic die. The BSL is configured to be a thermal-expansion complementary structure to a metal wiring interconnect layout that is disposed on the active side of the microelectronic die.

Abstract: An electronics package may include a housing and electronic circuitry carried thereby. The housing may include a first metallic material having a first coefficient of thermal expansion (CTE) and having an array of openings therein. The electronics package may also include a thermally conductive body within each of the openings in the array thereof to thereby define a heat sink for the electronic circuitry. Each of the thermally conductive bodies may include a second metallic material having a second CTE substantially different from the first CTE.

Abstract: One aspect of the invention includes a copper substrate; a catalyst on top of the copper substrate surface; and a thermal interface material that comprises a layer containing carbon nanotubes that contacts the catalyst. The carbon nanotubes are oriented substantially perpendicular to the surface of the copper substrate. A Raman spectrum of the layer containing carbon nanotubes has a D peak at ˜1350 cm?1 with an intensity ID, a G peak at ˜1585 cm?1 with an intensity IG, and an intensity ratio ID/IG of less than 0.7 at a laser excitation wavelength of 514 nm. The thermal interface material has: a bulk thermal resistance, a contact resistance at an interface between the thermal interface material and the copper substrate, and a contact resistance at an interface between the thermal interface material and a solid-state device. A summation of these resistances has a value of 0.06 cm2K/W or less.

Abstract: Some embodiments discussed herein include a semiconductor having a source region, a drain region and an array of fins operatively coupled to a gate region controlling current flow through the fins between the source region and the drain region. The semiconductor also has at least one cooling element formed at least in part of a material having a heat capacity equal to or larger than the heat capacity of the material of the source region, drain region and array of fins, the cooling elements being in close vicinity to fins of the array of fins electrically isolated from the fins of the array, the source region and the drain region.

Abstract: A leadless integrated circuit (IC) package comprising an IC chip mounted on a metal leadframe and a plurality of electrical contacts electrically coupled to the IC chip. The IC chip, the electrical contacts, and a portion of the metal leadframe are covered with an encapsulation compound, with portions of the electrical contacts exposed on a bottom surface of the encapsulation compound. The electrical contacts of the IC package having metal traces connecting bonding areas on a top surface thereof and contact areas on a bottom surface thereof, wherein at least some of the bonding areas are laterally disposed from the contact areas connected thereto.

Abstract: A free standing film includes: i. a matrix layer having opposing surfaces, and ii. an array of nanorods, where the nanorods are oriented to pass through the matrix layer and protrude an average distance of at least 1 micrometer through one or both surfaces of the matrix layer. A method for preparing the free standing film includes (a) providing an array of nanorods on a substrate, optionally (b) infiltrating the array with a sacrificial layer, (c) infiltrating the array with a matrix layer, thereby producing an infiltrated array, optionally (d) removing the sacrificial layer without removing the matrix layer, when step (b) is present, and (e) removing the infiltrated array from the substrate to form the free standing film. The free standing film is useful as an optical filter, ACF, or TIM, depending on the type and density of nanorods selected.

Abstract: An electronic device comprises a die with at least one defined hot-spot area; and at least one defined intermediate temperature area at a temperature lower than the temperature of the hot-spot area. The device also comprises a cooling structure comprising at least one bundle of first nanotubes for cooling the hot spot area and at least one bundle of additional nanotubes for cooling the intermediate temperature area, and having heat conductivity lower than the bundle of first nanotubes. The heat conductivity of both sets of the nanotubes is sufficient to decrease any temperature gradient between the defined hot spot area, the defined intermediate temperature area, and at least one lower temperature area on the die. The walls of the first nanotubes and the additional nanotubes are surrounded by a heat conducting matrix material operatively associated with the lower temperature area.

Abstract: A heat dissipating package structure includes a chip carrier; a semiconductor chip mounted and electrically connected to the chip carrier; an encapsulant formed on the chip carrier and for encapsulating the chip, with a non-active surface of the chip being exposed from the encapsulant; and a heat spreader having a hollow portion and attached to the encapsulant, wherein the chip is received in the hollow portion and the non-active surface of the chip is completely exposed to the hollow portion, such that heat generated by the chip can be directly dissipated out of the package structure. The present invention also provides a method for fabricating the heat dissipating package structure.

Abstract: The semiconductor package includes a dielectric layer, a trace layer, a conductive layer, a die and an underfill layer. The dielectric layer has first side and an opposing dielectric layer second side. Multiple vias extend through the dielectric layer from the dielectric layer first side to the dielectric layer second side. Multiple solder balls are disposed at the dielectric layer second side. Each of the solder balls is electrically coupled to a different one of the vias. The die is electrically coupled to the solder balls. The conductive layer is disposed between the dielectric layer second side and the die. The conductive layer defines a window there through for allowing the solder balls to electrically couple to the vias without contacting the conductive layer, i.e., no physical or electrical contact. The underfill layer is formed between the die and the conductive layer, while the trace layer is formed at the dielectric layer first side.

Abstract: An apparatus for spreading heat over a plurality of fins is provided. The apparatus includes a heat dissipating member composed of metal and having a plurality of fins on a first side of the heat dissipating member. The apparatus also includes a plurality of strips of thermal material having a thermal conductivity in a direction parallel to the heat dissipating member higher than a thermal conductivity of the heat dissipating member, the plurality of strips disposed on a side of the heat dissipating member opposite of the first side and configured to spread heat along the heat dissipating member.

Abstract: A structure of light emitting diode (LED) wafer-level chip scale packaging (WL-CSP) is disclosed. The process of making the same is also provided in this invention. The LED CSP utilizes the through hole metal filling to enhance heat conduction between the LED die and its carrier substrate. The CSP structure is achieved by bonding pre-processed through-hole-filling carrier substrate against the flip-chip LED wafer.

Abstract: An LED light emitter with heat sink holder and a method for manufacturing it are both disclosed. The LED light emitter with heat sink holder includes a heat sink holder and at least an LED chip. The heat sink holder is made of high thermal conductivity coefficient, and includes a reflecting mirror having a central portion and a reflecting portion surrounding the central portion. A normal of a top surface of the reflecting portion forms an acute angle relative to a normal of a top surface of the central portion. The LED chip is unitarily connected with a top surface of the central portion, and an electrode unit connecting with and Ohmic contacting the light emitting film for supplying power for the light emitting film. The LED light emitter with heat sink holder improves heat dissipation and working duration.

Abstract: The system includes a circuit board, a semiconductor module, a heat dissipator, and at least one thermal via. The circuit board has substantially flat opposing first and second sides. The semiconductor module includes multiple semiconductor devices. The semiconductor module is oriented substantially parallel to the circuit board near the first side, while the heat dissipator is disposed near the second side. The thermal via extends through the circuit board to thermally couple the semiconductor module to the heat dissipator, which may be a heat spreader, heat sink, cooling fan, or heat pipe.

Abstract: Heat sink structures employing carbon nanotube or nanowire arrays to reduce the thermal interface resistance between an integrated circuit chip and the heat sink are disclosed. Carbon nanotube arrays are combined with a thermally conductive metal filler disposed between the nanotubes. This structure produces a thermal interface with high axial and lateral thermal conductivities.

Abstract: A light emitting apparatus includes: a substrate including a first conductive type impurity; a first heatsink and a second heatsink on a first region and a second region of the substrate; second conductive type impurity regions on the substrate and electrically connected to the first heatsink and the second heatsink, respectively; a first electrode electrically connected to the first heatsink on the substrate; a second electrode electrically connected to the second heatsink on the substrate; and a light emitting device electrically connected to the first electrode and the second electrode on the substrate.

Abstract: A method of manufacture an integrated circuit packaging system includes: providing a substrate; attaching a first integrated circuit to the substrate by interconnects only along opposite sides of the first integrated circuit; and attaching a heat spreader to the substrate, the heat spreader extending over the first integrated circuit and between the opposite sides of the first integrated circuit.

Abstract: An integrated circuit package system is provided forming a substrate having an integrated circuit die thereon, thermally connecting a heat slug and a resilient thermal structure to the integrated circuit die, and encapsulating the resilient thermal structure.

Abstract: A semiconductor module (10) includes a heat sink (1), an electronic component (2), a semiconductor device (3), and a thermally-conductive sheet member (4). The thermally-conductive sheet member (4) covers a part of the semiconductor device (3) and has a lower part (4b) and a side part (4c). The lower part (4b) is in contact with a mounting face (11a) of the heat sink (1). The side part (4c) extends from the lower part (4b) and covers a first side surface (3c) of the semiconductor device (3). The electronic component (2) is disposed across the side part (4c) of the thermally-conductive sheet member (4) from the semiconductor device (3).

Abstract: An LED package having an anodized insulation layer which increases heat radiation effect to prolong the lifetime LEDs and maintains high luminance and high output, and a method therefor. The LED package includes an Al substrate having a reflecting region and a light source mounted on the substrate and connected to patterned electrodes. The package also includes an anodized insulation layer formed between the patterned electrodes and the substrate and a lens covering over the light source of the substrate. The Al substrate provides superior heat radiation effect of the LED, thereby significantly increasing the lifetime and light emission efficiency of the LED.

Abstract: Gallium nitride material devices and methods associated with the devices are described. The devices may be designed to provide enhanced thermal conduction and reduced thermal resistance. The increased thermal conduction through and out of the gallium nitride devices enhances operability of the devices, including providing excellent RF operation, reliability, and lifetime.

Abstract: A semiconductor package includes a carrier, a chip, a stiffener, a heat spreader and an active type heat-spreading element. The chip and the stiffener are disposed on the carrier. The heat spreader is disposed on the stiffener and includes a through opening. The active type heat-spreading element is disposed on the chip and located in the through opening.