Abstract: Circuit elements including a plurality of semiconductor devices and passive elements embedded in an insulating resin film are formed on a metal substrate having a surface roughness Ra of 0.3 to 10 ?m. This produces an anchoring effect occurs between the substrate and the insulating film, thereby improving the adhesiveness between the substrate and the insulating resin film.

Abstract: One example discloses a heat transfer device that can comprise a semiconductor material having a first region and a second region. The first region and the second region are doped to propel a charged carrier from the first region to the second region. The heat transfer device can also comprise an array of pointed tips thermoelectrically communicating with the second region. A heat sink faces the array, and a vacuum tunneling region is formed between the pointed tips and the heat sink. The heat transfer device further can further comprise a power source for biasing the heat sink with respect to the first region. The first region defines an N-type semiconductor material and the second region defines a P-type semiconductor material.

Abstract: A semiconductor device has a substrate. A die is attached to a first surface of the substrate. A heat sink is provided having an approximately planer member and support members extending from the planer member. The support members are attached to the first surface of the substrate to form a cavity over the die with the planer member positioned above the die. An encapsulant is provided for encapsulating the device, wherein an exterior surface of the planer member is exposed. A non-tapered opening is formed in the planer member. The encapsulant is injected through the opening to encapsulate the cavity and the encapsulant will partially fill the non-tapered opening.

Abstract: A heat-dissipating semiconductor package structure and a method for manufacturing the same is disclosed. The method includes: disposing on and electrically connecting to a chip carrier at least a semiconductor chip and a package unit; disposing on the top surface of the package unit a heat-dissipating element having a flat portion and a supporting portion via the flat portion; receiving the package unit and semiconductor chip in a receiving space formed by the flat portion and supporting portion of the heat-dissipating element; and forming on the chip carrier encapsulant for encapsulating the package unit, semiconductor chip, and heat-dissipating element. The heat-dissipating element dissipates heat generated by the package unit, provides EMI shielding, prevents delamination between the package unit and the encapsulant, decreases thermal resistance, and prevents cracking.

Abstract: A semiconductor component includes a semiconductor element that has a plurality of signals, a wiring board that is disposed below the semiconductor element and that draws the plurality of signals of the semiconductor element, a heat conduction member that dissipates heat generated by the semiconductor element, a joining member that is disposed between the semiconductor element and the heat conduction member and that joins the heat conduction member to the semiconductor element, a support member formed with an opening so as to surround the semiconductor element that supports the heat conduction member, a first adhesive member that is disposed between the support member and the wiring board to bond the support member with the wiring board and a second adhesive member that is disposed between the support member and the heat conduction member to bond the support member with the heat conduction member.

Abstract: The invention relates to an arrangement comprising at least one electronic component and a cooling body associated therewith. A support physically interposed between the electronic component and the cooling body and the support has at least one layer with at least one material of an electric strength of at least 10 kV/mm and a thermal conductivity of at least 5 W/mK. At least one recess and/or at least one protruding element is arranged in and/or on the layer of the support, and is configured in such a manner that it extends, along the surface of the layer of the support, through preferably all electrically possible pathways between the electronic component and the cooling body as compared to the condition of the layer of the support without the recess and/or without the protruding element.

Abstract: The present invention provides a method and apparatus for using light emitting diodes for curing and various solid state lighting applications. The method includes a novel method for cooling the light emitting diodes and mounting the same on heat pipe in a manner which delivers ultra high power in UV, visible and IR regions. Furthermore, the unique LED packaging technology of the present invention utilizes heat pipes that perform very efficiently in very compact space. Much more closely spaced LEDs operating at higher power levels and brightness are possible because the thermal energy is transported in an axial direction down the heat pipe and away from the light-emitting direction rather than a radial direction in nearly the same plane as the “p-n” junction.

Abstract: A semiconductor device (100A) with plastic encapsulation compound (102) and metal sheets (103a and 104) on both surfaces, acting as heat spreaders. One or more thermal conductors (103a) of preferably uniform height connect one sheet (103b) and the chip surface (101a); the number of conductors is scalable with the chip size. Each conductor consists of an elongated wire loop (preferably copper) with the wire ends attached to a pad (105), preferably both ends to the same pad. The major loop diameter is approximately normal to the first surface and the loop vertex in contact with the sheet (103b). The substrate (104, preferably a second metal sheet) covers at least portions of the second package surface and is thermally conductively connected to the chip.

Abstract: Discontinuous diamond particulate containing metal matrix composites of high thermal conductivity and methods for producing these composites are provided. The manufacturing method includes producing a thin reaction formed and diffusion bonded functionally graded interactive SiC surface layer on diamond particles. The interactive surface converted SiC coated diamond particles are then disposed into a mold and between the particles and permitted to rapidly solidify under pressure. The surface conversion interactive SiC coating on the diamond particles achieves minimal interface thermal resistance with the metal matrix which translates into good mechanical strength and stiffness of the composites and facilitates near theoretical thermal conductivity levels to be attained in the composite. Secondary working of the diamond metal composite can be performed for producing thin sheet product.

Abstract: A lead frame assembly includes at least one die paddle. The die paddle includes a first landing area for receiving a first semiconductor chip and a second landing area for receiving a second semiconductor chip. One or more steps are provided between the first landing area and the second landing area.

Abstract: An assembly comprises a stiffener, a circuit substrate and an IC chip. The stiffener has a surface with a first region and a second region. The circuit substrate covers at least a portion of the first region of the stiffener, while the IC chip overlies at least a portion of each of the first and second regions of the stiffener. The assembly further comprises a signal solder bump and a thermally conductive feature. The signal solder bump contacts the IC chip and the circuit substrate. The thermally conductive feature is disposed between, and is metallurgically bonded to, the integrated circuit chip and the second region of the stiffener. The thermally conductive feature provides an efficient thermal conductivity pathway between the IC chip and the stiffener.

Abstract: A double-face-cooled semiconductor module with an upper arm and a lower arm of an inverter circuit includes first and second heat dissipation members, each having a heat dissipation surface on one side and a conducting member formed on another side through an insulation member. On the conducting member on the first dissipation plate is provided with a fixing portion that fixes a collector surface of the semiconductor chip and a gate conductor connected to a gate terminal of the semiconductor module. The gate electrode terminal and the gate conductor are wire bonded. The conducting member on the second heat dissipation member is connected to an emitter surface of the semiconductor chip connected to the first heat dissipation member. The productivity and reliability are improved by most of formation operations for the upper and lower arms series circuit on one of the heat dissipation member.

Abstract: A semiconductor package includes a semiconductor device 30 and a molded upper heat sink 10. The heat sink has an interior surface 16 that faces the semiconductor device and an exterior surface 15 that is at least partially exposed to the ambient environment of the packaged device. An annular planar base 11 surrounds a raised or protruding central region 12. That region is supported above the plane of the base 11 by four sloped walls 13.1-13.4. The walls slope at an acute angle with respect to the planar annular base and incline toward the center of the upper heat sink 10. Around the outer perimeter of the annular base 11 are four support arms 18.1-18.4. The support arms are disposed at an obtuse angle with respect to the interior surface 16 of the planar annular base 11.

Abstract: The invention relates to an illumination device (1) comprising at least one preferably ceramic substrate plate (2), at least one luminous element (3) arranged on a front side (A) of the substrate plate (2) in particular at least one light emitting diode (LED) (3), and at least one preferably metallic heat sink (4) connected, in particular adhesively bonded and/or soldered, to a rear side (B) of the substrate plate (2) over a large area, wherein the coefficients of thermal expansion of substrate plate (2) and heat sink (4) differ at least by the factor 1.5, in particular by a factor greater than 2. The heat sink (4) has at least one preferably linear recess (6) on its side facing the rear side (B) of the substrate plate (2).

Abstract: An electronic package comprising a semiconductor device, a heat spreader layer, and a thermal interface material layer located between the semiconductor device and the heat spreader layer. The thermal interface material layer includes a resin layer having heat conductive particles suspended therein. A portion of the particles are exposed on at least one non-planar surface of the resin layer such that the portion of exposed particles occupies a majority of a total area of a horizontal plane of the non-planar surface.

Abstract: An LED-packaging arrangement, comprising: a first connection block with an enclosure groove at the bottom thereof; a second connection block with an enclosure groove at the bottom thereof; a light-emitting chip positioned at the top of the first connection block and via connection wires electrically coupled to the first and second connection blocks; a positioning/packaging body, and a transparent packaging body. Alternatively, a third connection block is provided with an enclosure groove at the bottom thereof. In this case, the electrical connection originally to the first connection block via the connection wire is changed to the third connection block. The first and second connection blocks are enclosed by the lower part of the positioning/packaging body in position such that the bottom surfaces of the first and second connection blocks are exposed. The upper part of the positioning/packaging body encloses the light-emitting chip so as to create a reflection cap.

Abstract: A heat spreader attached to a heat source that includes a semiconductor chip includes a silicon structure that provides a plurality of heat flux paths, including a lateral, in-plane heat flux path. The heat spreader is mounted in-plane with the heat source.

Abstract: A semiconductor element is provided with a heat dissipating path defined by a non-through hole in a first principal surface and that is filled with a conductive material. The semiconductor element is bonded to a heat sink with the conductive material disposed therebetween. Solder can be used as the conductive material, for example. By introducing molten solder into the non-through hole while having solder disposed between the semiconductor element and the heat sink, the heat dissipating path is provided and the heat sink is bonded to the semiconductor element.

Abstract: An apparatus to reduce a thermal penalty of a three-dimensional (3D) die stack for use in a computing environment is provided and includes a substrate installed within the computing environment, a first component to perform operations of the computing environment, which is coupled to the substrate in a stacking direction, a set of second components to perform operations of the computing environment, each of which is coupled to the first component and segmented with respect to one another to form a vacated region, a thermal interface material (TIM) disposed on exposed surfaces of the first and second components, and a lid, including a protrusion, coupled to the substrate to overlay the first and second components such that the protrusion extends into the vacated region and such that surfaces of the lid and the protrusion thermally communicate with the first and second components via the TIM.

Abstract: A heat sink for use with a high output LED light source is disclosed. The heat sink is used with an LED and conical reflector. The heat sink has a cylindrical back end holding the light emitting diode. The heat sink includes a conically shaped wall having an inner and outer surface and an open front end. The open front end has a rim with notches. The reflector has a front flat surface with arms which are fixed in the notches with a fastener. The heat sink includes a plurality of slits formed on the inner and outer surfaces extending between the back and front ends. A plurality of vanes extend radially from the inner surface. The heat sink is fabricated from a thermally conductive material. The conical shape of the heat sink, the slits and vanes increases exposed surface area to assist in dissipating heat generated from the LED.

Abstract: A semiconductor chip is mounted on a heat sink disposed inside a through-hole of a wiring board, electrodes of the semiconductor chip and connecting terminals of the wiring board are connected by bonding wires, a sealing resin is formed to cover the semiconductor chip and the bonding wires, and solder balls are formed on the lower surface of the wiring board, thereby constituting the semiconductor device. The heat sink is thicker than the wiring board. The heat sink has a protruded portion protruding to outside from the side surface of the heat sink, the protruded portion is located on the upper surface of the wiring board outside the through-hole, and the lower surface of the protruded portion contacts to the upper surface of the wiring board. When the semiconductor device is manufactured, the heat sink is inserted from the upper surface side of the wiring board.

Abstract: The present invention provides one single chip solution for a non-isolated DC-DC regulator. The advantage is high reliability, lower cost and smaller space on the motherboard. This integrated solution opens the door for a distributed architecture with few millimeter high 1?×1? regulator. Such regulators could be populated as QFP ICs are on all system boards. The present invention is based on a single VRM chip, PBGA multilayer board with processor signal pads and power points. The multilayer board periphery has SMD components such as ceramic capacitors, ICs, MOSFETs and a rectangular metal heat sink along with ferrite cores which sandwich the multilayer board and SMDs to form inductors for the multiphase solution.

Abstract: A semiconductor module with two cooling surfaces and method. One embodiment includes a first carrier with a first cooling surface and a second carrier with a second cooling surface. The first cooling surface is arranged in a first plane, the second cooling surface is arranged in a second plane, at an angle different from 0° relative to the first plane.

Abstract: A package board module wherein a semiconductor chip such as an LSI is mounted on the topside surface of a package board, and a package mounted module wherein the package board is mounted on the motherboard of a large-sized computer or the like. A stiffener for supporting the package board and/or a stiffener for supporting the motherboard each has a bimetal structure wherein a first member and a second member having mutually different thermal expansion coefficients are respectively adhered to each other, so as to cause the stiffeners to warp in harmony with the warpage of the package board and the motherboard caused by a temperature change, thereby preventing stress from arising in the solder-bonded portions.

Abstract: A semiconductor device including: an insulating substrate including a ceramic substrate having first and second principal surfaces, a first metallic conductor fixed on the first principal surface, and a second metallic conductor fixed on the second principal surface; a semiconductor element disposed on the first metallic conductor on the first principal surface; and a base plate connected to the second metallic conductor on the second principal surface, and on which the insulating substrate being disposed. The second metallic conductor includes a joint area connected to the second principal surface, and a non-joint area formed around the joint area.

Abstract: A load driving semiconductor apparatus includes: a driving transistor, which operates based on an input voltage from an external circuit; a power semiconductor device controlling power supply to a load in such a manner that the power semiconductor device supplies electric power to the load when the transistor operates, and the power semiconductor device stops supplying electric power to the load when the transistor stops operating; and a mounting board, on which the driving transistor and the power semiconductor device are mounted. The mounting board includes a heat radiation pattern for emitting heat generated in the power semiconductor device. The heat radiation pattern includes a heat receiving pattern, on which the driving transistor is mounted.

Abstract: A method and apparatus for packaging semiconductor dies for increased thermal conductivity and simpler fabrication when compared to conventional semiconductor packaging techniques are provided. The packaging techniques described herein may be suitable for various semiconductor devices, such as light-emitting diodes (LEDs), central processing units (CPUs), graphics processing units (GPUs), microcontroller units (MCUs), and digital signal processors (DSPs). For some embodiments, the package includes a ceramic substrate having an upper cavity with one or more semiconductor dies disposed therein and having a lower cavity with one or more metal layers deposited therein to dissipate heat away from the semiconductor dies. For other embodiments, the package includes a ceramic substrate having an upper cavity with one or more semiconductor dies disposed therein and having a lower surface with one or more metal layers deposited thereon for efficient heat dissipation.

Abstract: Various apparatuses and methods for forming integrated circuit packages are described. One aspect of the invention pertains to an integrated circuit package in which one or more integrated circuits are embedded in a substrate and covered with a layer of photo-imageable epoxy. The substrate can be made of various materials, including silicon, quartz and glass. An integrated circuit is positioned within a cavity in the top surface of the substrate. The epoxy layer is formed over the top surface of the substrate and the active face of the integrated circuit. An interconnect layer is formed over the epoxy layer and is electrically coupled with the integrated circuit.

Abstract: A method of producing a semiconductor package includes setting a radiator member on a semiconductor device that is mounted on a wiring board, said radiator member having a convex surface part on at least a part of a first surface thereof opposite to a second surface thereof to be bonded to the semiconductor device, and pressing the convex surface part of the radiator member towards the semiconductor device in order to align the radiator member and the semiconductor device automatically and to become substantially parallel to each other.

Abstract: A heat-conducting medium for placement between a heat source and heat sink to facilitate transfer of heat from the source to the sink is provided. The heat-conducting medium can include a flexible member made from an array of interweaving carbon nanotubes. The heat-conducting medium may also include an upper surface against which a heat source may be placed, an opposing lower surface and edges about the member designed for coupling to a heat sink toward which heat from the heat source can be directed. The heat-conducting medium may also include a pad placed on the upper surface to provide structural support to the member. A method for manufacturing the heat-conducting medium is also provided.

Abstract: Various apparatus and methods for improving the dissipation of heat from integrated circuit micro-modules are described. One aspect of the invention pertains to an integrated circuit package with one or more thermal pipes. In this aspect, the integrated circuit package includes multiple layers of a cured, planarizing dielectric. An electrical device is embedded within at least one of the dielectric layers. At least one electrically conductive interconnect layer is embedded within one or more of the dielectric layers. A thermal pipe made of a thermally conductive material is embedded in at least one associated dielectric layer. The thermal pipe thermally couples the electrical device with one or more external surfaces of the integrated circuit package. Various methods for forming the integrated circuit package are described.

Abstract: A light-emitting diode (LED) heat dissipation structure is provided, including a package body, a heat dissipation frame, at least one light emitting die, a plurality of conductive leads, and a plurality of conductive wires. The package body forms a cavity and has an outside surface. The heat dissipation frame is coupled to the package body and has a portion disposed inside the cavity. The end section of the heat dissipation frame that projects beyond the lateral segment of the outside surface is bent to extend along the outside surface. The light emitting die is accommodated in the cavity and set on the heat dissipation frame. The conductive leads are disposed in the cavity and each extends through a side wall of the cavity to project beyond a lateral segment of the outside surface. The conductive wires connect the light emitting die and the conductive leads inside the cavity.

Abstract: A semiconductor package is disclosed. The package includes a leadframe having drain, source and gate leads, and a semiconductor die coupled to the leadframe, the semiconductor die having a plurality of metallized source contacts. A bridged source plate interconnection has a bridge portion, valley portions disposed on either side of the bridge portion, plane portions disposed on either side of the valley portions and the bridge portion, and a connection portion depending from one of the plane portions, the bridged source plate interconnection connecting the source lead with the plurality of metallized source contacts. The bridge portion is disposed in a plane above the plane of the valley portions while the plane portions are disposed in a plane intermediate the plane of the bridge portion and the plane of the valley portions.

Abstract: An electronic component has at least two semiconductor devices, a contact clip and a leadframe with a device carrier portion and a plurality of leads. The contact clip extends between the first side of at least two semiconductor devices and at least one lead of the leadframe to electrically connect a load electrode of the at least two semiconductor devices to at least one lead.

Abstract: A semiconductor device is disclosed. One embodiment provides a device including a carrier, an electrically insulating layer applied onto the carrier, an adhesive layer applied to the electrically insulating layer. A first semiconductor chip applied to the adhesive layer.

Abstract: The present invention provides a method and apparatus for using light emitting diodes for curing and various solid state lighting applications. The method includes a novel method for cooling the light emitting diodes and mounting the same on heat pipe in a manner which delivers ultra high power in UV, visible and IR regions. Furthermore, the unique LED packaging technology of the present invention utilizes heat pipes that perform very efficiently in very compact space. Much more closely spaced LEDs operating at higher power levels and brightness are possible because the thermal energy is transported in an axial direction down the heat pipe and away from the light-emitting direction rather than a radial direction in nearly the same plane as the “p-n” junction.

Abstract: In a method and system for transferring at least one of power and ground signal between a die and a package base of a semiconductor device, a connector is formed there between. The connector, which is disposed above the die attached to the package base, includes a center pad electrically coupled to the die by a plurality of conductive bumps and a finger extending outward from the center pad towards the package base. The finger is electrically coupled to the package base by a conductive pad. A plurality of bond wires are formed to electrically couple the package base and the die. A resistance of a conductive path via the connector is much less than a resistance of a conductive path via any one of the plurality of bond wires to facilitate an efficient transfer of the at least one of power and ground signal.

Abstract: A ball grid array package system comprising: forming a package base including: fabricating a heat spreader having an access port, attaching an integrated circuit die to the heat spreader, mounting a substrate around the integrated circuit die, and coupling an electrical interconnect between the integrated circuit die and the substrate; and coupling a second integrated circuit package to the substrate through the access port.

Abstract: A semiconductor device is made by mounting a prefabricated heat spreader frame over a temporary substrate. The heat spreader frame includes vertical bodies over a flat plate. A semiconductor die is mounted to the heat spreader frame for thermal dissipation. An encapsulant is deposited around the vertical bodies and semiconductor die while leaving contact pads on the semiconductor die exposed. The encapsulant can be deposited using a wafer level direct/top gate molding process or wafer level film assist molding process. An interconnect structure is formed over the semiconductor die. The interconnect structure includes a first conductive layer formed over the semiconductor die, an insulating layer formed over the first conductive layer, and a second conductive layer formed over the first conductive layer and insulating layer. The temporary substrate is removed, dicing tape is applied to the heat spreader frame, and the semiconductor die is singulated.

Abstract: According to one aspect of the invention, a method of constructing an electronic assembly is provided. A layer of metal is formed on a backside of a semiconductor wafer having integrated formed thereon. Then, a porous layer is formed on the metal layer. A barrier layer of the porous layer at the bottom of the pores is thinned down. Then, a catalyst is deposited at the bottom of the pores. Carbon nanotubes are then grown in the pores. Another layer of metal is then formed over the porous layer and the carbon nanotubes. The semiconductor wafer is then separated into microelectronic dies. The dies are bonded to a semiconductor substrate, a heat spreader is placed on top of the die, and a semiconductor package resulting from such assembly is sealed. A thermal interface is formed on the top of the heat spreader. Then a heat sink is placed on top of the thermal interface.

Abstract: A semiconductor device has a conductive via formed around a perimeter of the semiconductor die. First and second conductive layers are formed on opposite sides of the semiconductor die and thermally connected to the conductive via. An insulating layer is formed over the semiconductor die. A portion of the insulating layer is removed to expose the first conductive layer and a thermal dissipation region of semiconductor die. A thermal via is formed through the insulating layer to the first conductive layer. A thermally conductive layer is formed over the thermal dissipation region and thermal via. A thermal conduction path is formed from the thermal dissipation region through the thermally conductive layer, thermal via, first conductive layer, conductive via, and second conductive layer. The thermal conduction path terminates in an external thermal ground point. The thermally conductive layer provides shielding for electromagnetic interference.

Abstract: A thermal management configuration for a flip chip semiconductor device is disclosed. The device includes a high power silicon based die having a metal bonding surface. A plurality of interconnects are formed on the metal surface and connected to a substrate. A plurality of thermal management stud bumps are formed on the metal bonding surface, the thermal management stud bumps positioned distinct from the interconnects and local to die hot spots, exposed ends of the thermal management stud bumps spaced from the substrate.

Abstract: A condenser for a power module combines a plurality of aluminum materials to form a casing equipped with a channel for coolant therein, thus making it possible to keep material costs low. Moreover, thanks to the excellent workability of the aluminum materials, it is possible to adopt a configuration with a complex concave-convex configuration for a superior heat radiation performance. A channel for coolant with high heat radiation performance can also be structured inside the casing. The relatively thick bottom plate secures the rigidity required by the casing, while the relatively thin top plate can have a rigidity intentionally structured lower. In this manner, stress generated on joining surfaces of the condenser and an insulative substrate can be mitigated due to active deformation of the top plate.

Abstract: Various methods and apparatus for establishing a thermal pathway for a semiconductor device are disclosed. In one aspect, a method of manufacturing is provided that includes placing a gel-type thermal interface material in a preselected pattern on a semiconductor chip that is coupled to a substrate. The preselected pattern of gel-type thermal interface material is allowed to partially set up. Additional thermal interface material is placed on the semiconductor chip and cured.

Abstract: A semiconductor packaging structure is provided. The structure includes a base layer comprising alloy 42; die attached on a first side of the base layer; and an interconnect structure on the die, wherein the interconnect structure comprises vias and conductive lines connected to the die.

Abstract: A semiconductor package is disclosed that includes a semiconductor device; a circuit board; and a connection mechanism including a first conductive terminal provided on the semiconductor device, and a second conductive terminal provided on the circuit board side, the connection mechanism electrically connecting the semiconductor device and the circuit board via the first conductive terminal and the second conductive terminal. At least one of the first conductive terminal and the second conductive terminal of the connection mechanism includes one or more carbon nanotubes each having one end thereof fixed to the surface of the at least one of the first conductive terminal and the second conductive terminal, and extending in a direction away from the surface. The first conductive terminal and the second conductive terminal engage each other through the carbon nanotubes.

Abstract: A baffle has a slot, with the slot positioned between first and second adjacent components when the baffle is installed above the components. A pair of heatsinks are inserted into the slot, with at least one heatsink having a heat dissipating portion that remains above the slot after insertion into the slot. A spring is inserted into the slot between the pair of heatsinks.

Abstract: A LED array cooling system including a LED array and a substrate attached to the LED array wherein the LED array includes a plurality of walls that at least in part define a plurality of passages through the LED array.

Abstract: A method includes: mounting a plurality of semiconductor elements on a substrate having wirings; connecting electrically electrodes of the semiconductor elements and the wirings; sealing the semiconductor elements with a resin, which is carried out by bringing a thermal conductor having a concavity and the substrate to be in contact with each other so that the semiconductor elements are positioned within the concavity and by filling the concavity with the resin; and separating respective semiconductor elements 1. In the resin-sealing step, in a state where the thermal conductor is arranged with its concavity facing up and the concavity of the thermal conductor is filled with a liquid resin, the semiconductor elements are dipped in the liquid resin in the concavity and the liquid resin is solidified.

Abstract: In the semiconductor device, a control power MOSFET chip 2 is disposed on the input-side plate-like lead 5, and the drain terminal DT1 is formed on the rear surface of the chip 2, and the source terminal ST1 and gate terminal GT1 are formed on the principal surface of the chip 2, and the source terminal ST1 is connected to the plate-like lead for source 12. Furthermore, a synchronous power MOSFET chip 3 is disposed on the output-side plate-like lead 6, and the drain terminal DT2 is formed on the rear surface of the chip 3 and the output-side plate-like lead 6 is connected to the drain terminal DT2. Furthermore, source terminal ST2 and gate terminal GT2 are formed on the principal surface of the synchronous power MOSFET chip 3, and the source terminal ST2 is connected to the plate-like lead for source 13. The plate-like leads for source 12 and 13 are exposed, and therefore, it is possible to increase the heat dissipation capability of the MCM 1.