Abstract: An organic light-emitting display device comprises a substrate comprising a plurality of sub-pixels, each of the sub-pixels having an emission area and a non-emission area provided to surround the emission area; an auxiliary line disposed in the non-emission area; a first insulating film having a first hole configured to expose a portion of the auxiliary line; an auxiliary line connection pattern disposed on the first insulating film having a protruding portion protruding towards a center of the first hole and overlapping the auxiliary line; at least one bump disposed on the auxiliary line within the first hole and adjacent to the protruding portion of the auxiliary line connection pattern; and a bank having a second hole larger than the first hole to expose the protruding portion of the auxiliary line connection, thereby lowering resistance of a cathode covering a plurality of sub-pixels and preventing lateral current leakage between the sub-pixels through a change of the connection structure between the aux

Abstract: A transistor may include a semiconductor, a source electrode, a drain electrode, and a gate electrode. The semiconductor may include a first doped region, a second doped region, a source region, a drain region, and a channel region. The channel region is positioned between the source region and the drain region. The first doped region is positioned between the channel region and the source region. The second doped region is positioned between the channel region and the drain region. A doping concentration of the first doped region is lower than a doping concentration of the source region. A doping concentration of the second doped region is lower than a doping concentration of the drain region. The source electrode is electrically connected to the source region. The drain electrode is electrically connected to the drain region. The gate electrode overlaps the channel region.

Abstract: According to one embodiment, a display device includes a first substrate including a first resin substrate having a first thermal expansion coefficient, and a first barrier layer having a second thermal expansion coefficient which is lower than the first thermal expansion coefficient, a second substrate including a second resin substrate having a third thermal expansion coefficient which is equal to the first thermal expansion coefficient, and a second barrier layer having a fourth thermal expansion coefficient which is lower than the third thermal expansion coefficient and is equal to the first thermal expansion coefficient, and a display element located between the first resin substrate and the second resin substrate.

Abstract: A display apparatus including a first conductive layer; a first insulating layer including a first opening exposing a first upper surface of the first conductive layer and covering at least a part of an upper edge of the first conductive layer, wherein the first upper surface of the first conductive layer includes a center portion of an upper surface of the first conductive layer; a second conductive layer on a part of the first upper surface of the first conductive layer and on the first insulating layer; and a second insulating layer including a second opening exposing a second upper surface of the second conductive layer and covering a part of an upper edge of the second conductive layer, wherein the second upper surface of the second conductive layer includes a center portion of the upper surface of the second conductive layer.

Abstract: An array substrate includes a substrate, a first TFT, a second TFT, and a third TFT. The first TFT includes a first channel layer on the substrate, a first gate insulator layer, a first gate electrode, a first dielectric layer, and a second dielectric layer. The second TFT includes a first semiconductor layer on the substrate, a second gate insulator layer, a second gate electrode, a third dielectric layer, and a second channel layer. The first channel layer is made of a semiconducting material containing polycrystalline silicon. The second channel layer is made of a semiconducting material containing metal oxide. The first dielectric layer is made of silicon nitride; the second dielectric layer and the third dielectric layer are made of silicon oxide.

Abstract: A method for fabricating a semiconductor device includes providing a first wafer comprising a substrate and a first semiconductor material layer, bonding the first wafer to a second wafer, the second wafer comprising a sacrificial layer and a second semiconductor material layer, removing the sacrificial layer, patterning the bonded wafers to create a first structure and a second structure, removing the second semiconductor material from the first structure, forming a first type of transistor in the first semiconductor material of the first structure, and forming a second type of transistor in the second semiconductor material of the second structure.

Abstract: According to one embodiment, a sensor includes a first control line, a first signal line, a first detection switch, a common electrode, a first detection electrode, a first circuit and a second circuit. The common electrode is located above the first control line, the first signal line and the first detection switch, opposed to the first control line, the first signal line and the first detection switch. The first detection electrode is located above the common electrode. The first circuit and the second circuit are located under the common electrode, and are opposed to the common electrode.

Abstract: A display panel includes a substrate, active switches, and an active layer. The active switches are disposed on the substrate, and the active layer is disposed on the active switches. A light-obstructing layer is disposed between the substrate and the active layer. The light-obstructing layer is provided with a light-permeable region, and orthogonal projection areas of the light-permeable region and the active layer on the substrate correspond to each other. The light-permeable region defines pixels of the display panel.

Abstract: A display device may include first and second base substrates, a pixel, a signal line, a pad electrode, and an electronic circuit connected to the pad electrode. The first base substrate includes a first planar surface and a first side surface, which is connected to the first planar surface and extends in a first direction. The second base substrate includes a second planar surface, which is disposed to face the first planar surface in a second direction crossing the first direction, and a second side surface, which is connected to the second planar surface and extends in the second direction. The pixel is disposed between the first and second base substrates. The signal line is disposed on the first base substrate and connected to the pixel. The pad electrode is disposed on the first side surface and connected to the signal line.

Abstract: The present invention teaches a LTPS TFT substrate and its manufacturing method. The manufacturing method, after forming vias using the photoresist layer on the ILD layer and the gate insulation layer above the source/drain contact regions, and before peeling the photoresist layer, forms conductive layers in the vias by depositing conductive material in the vias. The source/drain electrodes contact the conductive layers in the vias and therefore are conducted to the source/drain contact regions, thereby effectively resolving the problem of contact impedance being too high between the source/drain electrodes and the source/drain contact regions from the existing re-etch LDD technique. Then, through the re-etch LDD technique, the present invention is able to omit a mask process without sacrificing product characteristics.

Abstract: A laser annealing method is for irradiating an amorphous silicon film formed on a substrate 6 with laser beams and crystalizing the amorphous silicon film, wherein a plurality of first and second TFT formation portions 23, 24 on the substrate 6 are irradiated with laser beams at differing irradiation doses so as to crystalize the amorphous silicon film in the first TFT formation portions 23 into a polysilicon film having a crystalline state and crystalize the amorphous silicon film in the second TFT formation portions 24 into a polysilicon film having another crystalline state that is different from that of the polysilicon film in the first TFT formation portions 23.

Abstract: A chip package is provided. the chip package includes a substrate having an upper surface, a lower surface, and a sidewall surface that is at an edge of the substrate. The substrate includes a sensing device adjacent to the upper surface of the substrate to sense a light source. The chip package also includes a first color filter layer disposed on the upper surface of the substrate to shield the light source. The first color filter layer includes an opening, so that the first color filter layer surrounds the sensing device via the opening. In addition, the chip package includes a redistribution layer disposed on the lower surface of the substrate. A method of forming the chip package is also provided.

Abstract: The present invention teaches a method of manufacturing a metal oxide thin film transistor (TFT) that includes the following steps: forming a shielding layer, a metal oxide semiconductor layer, a gate electrode, and a first photoresist pattern layer stacked on a substrate; forming a second photoresist layer on the metal oxide semiconductor layer and the first photoresist pattern layer; conducting ashing process to the second photoresist layer and the first photoresist pattern layer, and lifting the second photoresist layer and first photoresist pattern layer after they are ashing-processed; forming a first insulation layer on the metal oxide semiconductor layer and the gate electrode; and forming independent source electrode and drain electrode on the first insulation layer. The present invention deposits the second photoresist layer on the first photoresist pattern layer hardened by the conductorization process, so that they may be easily lifted after the ashing process.

Abstract: An array substrate includes a pixel circuit and a light-emitting diode. The pixel circuit includes a driving transistor including a first active medium made of polysilicon, and a switching transistor including a second active medium made of polysilicon. The first active medium has a first grain size. The second active medium has a second grain size larger than the first grain size. The light-emitting diode is coupled to the pixel circuit.

Abstract: A pixel of an organic light emitting diode display device includes a switching transistor which transfers a data voltage in response to a scan voltage applied thereto through a scan line, a storage capacitor which stores the data voltage transferred by the switching transistor, a driving transistor which generates a driving current based on the data voltage stored in the storage capacitor, an organic light emitting diode which emits light based on the driving current, and an anode discharging capacitor connected between the scan line and an anode of the organic light emitting diode.

Abstract: The present disclosure provides an array substrate, a manufacturing method of an array substrate, and a display device. The array substrate includes: a base substrate; a first signal line, extending in a first direction and located on the base substrate; a second signal line, extending in a second direction and located on a side of the first signal line away from the base substrate and insulated with the first signal line, the first direction and the second direction crossing with each other. A side of the first signal line facing the second signal line is provided with a groove, the groove is located at a crossing region between the first signal line and the second signal line, in the crossing region, an otherographic projection of the second signal line on the base substrate completely falls into an orthographic projection of the groove on the base substrate.

Abstract: A display device according to an embodiment includes a substrate, a gate line and a data line on the substrate, a pixel connected to the gate line and the data line and including a thin film transistor (TFT) on the substrate, a planarization layer on the TFT, and a light emitting device including a first electrode and a second electrode, wherein the light emitting device comprises a first portion and a second portion opposite to the first portion, the first portion including the first and second electrodes, wherein the TFT comprises a gate electrode, a semiconductor layer, a source electrode, and a drain electrode, and wherein the first portion of the light emitting device is not overlapped with the TFT.

Abstract: An organic optoelectronic component includes an organic functional layer stack between a first electrode and a second electrode including a light-emitting layer formed to emit radiation during operation of the component; a coupling-out layer arranged above the first electrode and/or the second electrode which is in a beam path of the radiation of the light-emitting layer; and a protective layer above the coupling-out layer, wherein the coupling-out layer includes a structured layer and a planarization layer arranged thereabove and the structured layer has a structured surface structured at least in places, the planarization layer planarizes the structured surface of the structured layer, the protective layer cannot be removed without at least partially destroying the coupling-out layer, and adhesion of the structured layer to the planarization layer is smaller than adhesion of the protective layer to the planarization layer.

Abstract: An organic light-emitting diode display and a method of manufacturing the same are provided. An organic light-emitting diode display includes a plurality of pixels, each pixel includes an organic light-emitting diode, and the organic light-emitting diode display includes: a substrate, a horizontal line on the substrate, at least one first insulating layer on the horizontal line, a shielding electrode on the at least one first insulating layer, at least one second insulating layer on the shielding electrode, a data line on the at least one second insulating layer, the data line crossing the horizontal line, the shielding electrode overlapping the horizontal line and the data line at a crossing of the horizontal line and the data line, and a constant voltage source connected to the shielding electrode.

Abstract: A color film substrate and a preparation method therefor, and a display panel and a display device comprising the color film substrate. The color film substrate comprises: an auxiliary cathode layer formed on a substrate; a black matrix layer formed on the auxiliary cathode layer, a plurality of first via holes penetrating through the black matrix layer in a direction vertical to the substrate being provided on the black matrix layer; a flat layer formed on the black matrix layer, a plurality of second via holes having one-to-one correspondence to the first via holes so as to expose the auxiliary cathode layer being provided on the flat layer; a plurality of spacers formed on the flat layer; and a transparent conductive layer formed on the spacers, the transparent conductive layer being connected to the auxiliary cathode layer by means of the second via holes.

Abstract: In a fingerprint recognizable organic light-emitting diode (OLED) display panel and display device provided by the present disclosure, optical fingerprint recognition is implemented by a fingerprint recognizing sensor formed by poly-Si in a thin film transistor array of the OLED display panel. Space for disposing the fingerprint recognizing sensor is enlarged because the space occupied by the poly-Si in the thin film transistors array is narrowed by reducing the number of thin film transistors. In addition, the optical fingerprint recognizing sensors are disposed within the display panel, therefore, the display panel can implement image display and fingerprint recognition sensing at the same time. As a result, the usage experience is improved because fingerprint recognition sensing can be implemented in display area. The OLED display panel of the present disclosure can be applied in a liquid crystal display panel.

Abstract: A panel and a pixel structure are disclosed and include a substrate, a scan line, a data line, and a pixel electrode. The scan line is disposed on the substrate and extends along a first direction. The data line is disposed on the substrate and extends along a second direction different from the first direction. The pixel electrode is disposed on the substrate, in which the scan line and/or the data line crosses the pixel electrode.

Abstract: A display device including a substrate including: a top surface, a bottom surface, and a plurality of side surfaces connecting the top surface and the bottom surface; a signal line disposed on the top surface; a sidewall electrode in electrical contact with the signal line and disposed on a first side surface of the side surfaces; and a connection electrode in electrical contact with the sidewall electrode and disposed on the first side surface.

Abstract: A display device includes: a substrate; pixels, the pixels each including at least one transistor and a light emitting device connected to the transistor; data lines and scan lines connected to the pixels; and a power line supplying power to the light emitting device. The transistor includes an active pattern on the substrate, source and drain electrodes each connected to the active pattern, a gate electrode on the active pattern, an interlayer insulating layer covering the gate electrode, the interlayer insulating layer including a first interlayer insulating layer, a second interlayer insulating layer, and a third interlayer insulating layer, which are sequentially stacked, and a protective layer provided on the interlayer insulating layer. The third interlayer insulating layer includes a concave part in a region in which the light emitting device and the second conductive layer overlap with each other, and the second conductive layer is in the concave part.

Abstract: A pixel array including a first common line, a first conductive line, a first connection line, a second common line, a second conductive line, a third common line, and a first connection structure is provided. The first common line is located on a first side of a first scan line. The first conductive line includes a first extending portion and a second extending portion. The first connection line crosses the first scan line so as to electrically connect the first extending portion to the second extending portion. The second common line is located on a first side of a second scan line. The second conductive line includes a third extending portion and a fourth extending portion. The first connection structure electrically connect the second common line to the third common line.

Abstract: A pixel array substrate including a substrate, a plurality of pixel structures and a scan device is provided. The pixel structures are arranged on the substrate along a first direction. Each pixel structure includes a data line, an active device and a pixel electrode. The active device has a semiconductor pattern, a source electrode and a drain electrode. The source electrode and the drain electrode are electrically connected to the data line and the pixel electrode respectively. The scan device includes a first and a second scan line. The first and the second scan line extend in the first direction and are electrically connected to each other. The active devices of the pixel structures are electrically connected to the first and the second scan line. The first and the second scan line respectively overlap two different regions of the semiconductor pattern of each active device.

Abstract: The present techniques are capable of identifying and pinpointing defective microdrivers and/or row/column drivers either before or after any ?LEDs have been placed on the display. Using the architectures described herein, test data may be delivered in a parallel fashion to the drivers from support circuitry, such as a timing controller and/or a main board, and outputs based on the test data may be similarly delivered back to the support circuitry do determine which drivers are defective. This yields access to the output of every microdriver and row drier, thus enabling the identification of specific defective elements.

Abstract: An electro-optical device includes a base member, a pixel electrode, a first insulating layer arranged above the base member, a first capacitor arranged above the first layer and including a first electrode and a second electrode arranged above the second electrode, a second insulating layer arranged above the first capacitor, a second capacitor arranged above the second layer and including a third electrode and a fourth electrode arranged above the third electrode, a third layer insulating arranged above the second capacitor, and a transistor arranged between the base member and the first layer and including a source electrode, a drain electrode, and a gate electrode. The second electrode is coupled to the drain electrode via the third electrode, and the third electrode is coupled to the pixel electrode via the second electrode.

Abstract: A display device includes a substrate including a display area to display an image and a non-display area provided on at least one side of the display area, a plurality of pixels disposed on the substrate and provided in an area corresponding to the display area, a first insulating layer having an opening in a first area of the non-display area, a second insulating layer provided in the first area, first lines provided on the substrate and connected to the plurality of pixels, and second lines provided on the first and second insulating layers, and connected to the first lines. An area in which the first lines overlap with the second lines is spaced apart from an edge of the second insulating layer when viewed in a plan view.

Abstract: A pixel defining layer and a method for manufacturing the same, a display panel and a method for manufacturing the same, and a display device are provided. The pixel defining layer includes a plurality of pixel defining patterns. Each of the pixel defining patterns includes a first sub-defining pattern and a second sub-defining pattern, the second sub-defining pattern being embedded within the first sub-defining pattern, and an outer edge of the second sub-defining pattern is connected to an inner edge of the first sub-defining pattern, wherein a thickness of the first sub-defining pattern is greater than a thickness of the second sub-defining pattern, and a region surrounded by the second sub-defining pattern is a light emitting region of a light emitting layer.

Abstract: In a display device, an edge portion of a pixel electrode is modified. A valley is provided in an overcoat layer located below the pixel electrode. The edge portion of the pixel electrode is configured to be curved or bent onto the overcoat layer. As a result, the aperture ratio of the display device can be increased, and an image abnormality in the edge portion of the pixel electrode can be prevented.

Abstract: A scan driver includes stages configured to output a scan signal and a sensing signal, wherein an i-th (where i is an odd number) stage includes a common circuit configured to control voltages of a first node and a second node in response to a previous carry signal, a first carry control clock signal, and a second carry control clock signal, to control a voltage of a sampling node in response to a sensing on signal and a subsequent carry signal, and to control voltages of a first drive node and a second drive node based on the voltages of the first node, the second node, the sampling node, and a sensing clock signal, and a first output buffer configured to output the scan signal and the sensing signal to an i-th pixel row in response to the voltages of the first drive node and the second drive node.

Abstract: A transistor display panel including a substrate, a gate line disposed on the substrate and extending in a first direction, a gate electrode protruding from the gate line, a gate insulating layer disposed on the gate line and the gate electrode, a semiconductor layer and an auxiliary layer disposed on the gate insulating layer and spaced apart from each other, a data line disposed on the gate insulating layer and extending in a second direction which is a direction crossing the gate line, a drain electrode disposed on the gate insulating layer and the semiconductor layer and spaced apart from the data line, and a pixel electrode connected to the drain electrode, in which the auxiliary layer overlaps an edge of the gate electrode in a plan view.

Abstract: A display device includes: a plurality of first electrodes arranged in a display region for displaying an image; a second electrode opposed to the first electrodes; a plurality of switching elements that are arranged in the display region and coupled to the first electrodes or the second electrode; a gate line for supplying a scanning signal for scanning the switching elements; a data line for supplying a signal to the switching elements that are coupled to the switching elements; and conductive wire that is opposed to the second electrode via an insulating layer and is coupled to the switching elements.

Abstract: An organic light-emitting display device includes a pixel electrode, an emission layer on the pixel electrode, an opposing electrode covering the emission layer, a plurality of upper layers on the opposing electrode, light-shielding elements on the upper layers, and a color filter layer on the upper layers. The light-shielding elements include first light-shielding layers and second light-shielding layers. The first light-shielding layers include first materials, and the second light-shielding layers include second materials different from the first materials. The second light-shielding layers overlay the first light-shielding layers.

Abstract: An array substrate includes at least: a glass substrate on which a driver is mounted; a panel side output terminal disposed in a mounting area of the glass substrate and connected to the driver; a first terminal portion; a gate insulation film including a first contact hole at a position overlapping a first terminal portion; a second terminal portion disposed to overlap at least a first contact hole and an opening edge of the first contact hole; a first interlayer insulation film including a second contact hole at a position overlapping a second terminal portion not to overlap the first contact hole; and a third terminal portion disposed to overlap at least the second contact hole and an opening edge of the second contact hole.

Abstract: To provide a liquid crystal display device which can perform image display in both modes: a reflective mode where external light is used as an illumination light source; and a transmissive mode where a backlight is used. In one pixel, a region where incident light through a liquid crystal layer is reflected to perform display (reflective region) and a region through which light from the backlight passes to perform display (transmissive region) are provided, and image display can be performed in both modes: the reflective mode where external light is used as an illumination light source; and the transmissive mode where the backlight is used as an illumination light source. In addition, two transistors connected to respective pixel electrode layers are provided in one pixel, and the two transistors are separately operated, whereby display of the reflective region and display of the transmissive region can be controlled independently.

Abstract: An electronic device has a multilayer structure including a plurality of wires in multiple layers, and a conductive material on a surface of the multilayer structure for electrically connecting two or more wires included in the plurality of wires. The surface of the multilayer structure has a first recess. The conductive material is in the first recess and on the surface of the multilayer structure. The conductive material has an upper surface. The upper surface has a second recess corresponding to the first recess. The second recess has a bottom surface at a higher position than an upper surface of the uppermost layer of the two or more wires.

Abstract: The present invention prevents the shaving of an alignment film caused by a columnar spacer in a liquid crystal display device of an IPS method using photo-alignment. A plinth higher than a pixel electrode is formed at a part where a columnar spacer formed over a counter substrate touches a TFT substrate. When an alignment film of a double-layered structure is applied over the pixel electrode and the plinth, the thickness of the alignment film over the plinth reduces by a leveling effect. When photo-alignment is applied in the state, a photodegraded upper alignment film over the plinth disappears and a lower alignment film having a high mechanical strength remains. As a result, it is possible to prevent the shaving of the alignment film.

Abstract: A TFT (Thin Film Transistor) and a liquid crystal display, the TFT comprises a gate electrode, a gate insulating layer, a semiconductor layer and a source-drain electrode layer. The gate insulating layer is disposed between the gate electrode and the semiconductor layer. The source-drain electrode layer contacts with the semiconductor. The gate electrode and the semiconductor layer are hollowed. The liquid crystal display comprises an array, a color substrate and a liquid crystal layer disposed between the array substrate and the color substrate. The array substrate comprises the TFT described above.

Abstract: An organic light emitting diode (“OLED”) display includes: a substrate divided into a pixel area, and a peripheral area enclosing the pixel area; an OLED in the pixel area and including a first electrode, an organic emission layer and a second electrode; a common voltage line in the peripheral area and transmitting a common voltage to the second electrode; and a reaction blocking part overlapping the common voltage line.

Abstract: An electronic modulating device is provided. The electronic modulating device includes a first modulating unit. The first modulating unit includes a first transistor including a channel arranged in an extending direction. The first modulating unit also includes a first modulating electrode electrically connected to the first transistor and arranged in a first longitudinal direction. The electronic modulating device also includes a second modulating unit. The second modulating unit includes a second transistor including a channel arranged in the extending direction. The second modulating unit also includes a second modulating electrode electrically connected to the second transistor and arranged in a second longitudinal direction that is different from the first longitudinal direction. The first included angle between the extending direction and the first longitudinal direction is different from a second included angle between the extending direction and the second longitudinal direction.

Abstract: A FinFET device and a method of forming the same are provided. A method includes forming a fin extending above an isolation region. A sacrificial gate is formed over the fin. A first dielectric material is selectively deposited on sidewalls of the sacrificial gate to form spacers on the sidewalls of the sacrificial gate. The fin is patterned using the sacrificial gate and the spacers as a combined mask to form a recess in the fin. An epitaxial source/drain region is formed in the recess.

Abstract: [Object] It is possible to further improve reliability. [Solution] There is provided a display device including: a pixel unit which is configured with a plurality of pixel circuits arranged in a matrix, each of the pixel circuits including a light emitting element and a driving circuit for driving the light emitting element; scanning lines which are interconnections connected to the respective pixel circuits and are provided to extend in a first direction and correspond to respective rows of a plurality of the pixel circuits; and signal lines which are interconnections connected to the respective pixel circuits and are provided to extend in a second direction orthogonal to the first direction and correspond to respective columns of a plurality of the pixel circuits. One of the scanning lines and the signal lines, provided for the one pixel circuit, which is larger in number is positioned in a lower-level interconnection layer.

Abstract: A printed wiring line formed on a substrate connects two different points on the substrate which are connectable by another printed wiring line with a shape of a straight-line segment and has a shape corresponding to at least one of: 1) a shape with no linear part parallel to the straight-line segment; 2) a shape in which line segments are connected in series, each line segment having a shape with no linear part parallel to the straight-line segment; 3) a shape having a part parallel to the straight-line segment and a part not parallel to the straight-line segment, length of the part parallel to the straight-line segment being not more than length of the straight-line segment; and 4) a shape in which line segments are connected in series, each line segment having a shape having a part parallel to the straight-line segment and a part not parallel to the straight-line segment.

Abstract: A method for manufacturing a display device including forming a lower electrode on a substrate; depositing a first insulation layer thereon; forming a semiconductor layer that overlaps the lower electrode thereon; depositing a second insulation layer thereon; forming a gate electrode and an etching prevention layer that overlap the semiconductor layer thereon; depositing a third insulation layer thereon; forming a first conductor that overlaps the gate electrode thereon; depositing a fourth insulation layer thereon; forming a photosensitive film patterns thereon by depositing a photosensitive film and exposing and developing the photosensitive film such that portions of the photosensitive film are removed in a first area, a second area, and a third area; etching the third insulation layer using the patterns as an etching mask; etching the etching prevention layer by using the patterns as an etching mask; and etching the first insulation layer using the patterns as an etching mask.

Abstract: According to one embodiment, a display device includes a display panel including a display area where first drive areas and second drive areas are alternately disposed, and display function layers which include first display function layers and second display function layers and which are changed to a transparent state and a scattering state, and a control unit. The control unit applies a drive voltage to the first display function layers, in a first field period. The control unit applies the drive voltage to the second display function layers, in a second field period. A polarity of the drive voltage in the first field period is different from a polarity of the drive voltage in the second field period.

Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, second, third and fourth semiconductor regions of a second conductivity type, a first insulating film, a second insulating film, a first electrode contacting the first insulating film, and a second electrode contacting the second insulating film. The second and third semiconductor regions contact the first semiconductor region. The fourth semiconductor region contacts the first semiconductor region, is disposed between the second semiconductor region and the third semiconductor region. The first insulating film contacts a first portion of the first semiconductor region between the second semiconductor region and the fourth semiconductor region. The second insulating film contacts a second portion of the first semiconductor region between the third semiconductor region and the fourth semiconductor region. The second insulating film is thicker than the first insulating film.

Abstract: A display device includes a substrate including a bending area located between a first area and a second area. The substrate is bent in relation to a bending axis. A first wiring unit including a plurality of first wirings is arranged on the substrate to sequentially extend over the first area, the bending area, and the second area. First central axes included in each of the plurality of first wirings are spaced apart from each other by a first pitch in the bending area. A second wiring unit including a plurality of second wirings is arranged on the substrate to sequentially extend over the first area, the bending area, and the second area. Second central axes included in each of the plurality of second wirings are spaced apart from each other by a second pitch greater than the first pitch in the bending area.

Abstract: A photoelectric conversion device includes a photoelectric converter accumulating signal charge generated by photoelectric conversion in the first semiconductor region of a first conductivity type, a charge-to-voltage converter generating a voltage signal in accordance with amount of the signal charge, a transistor of a second conductivity type provided in a third semiconductor region of the first conductivity type and including a gate connected to the first semiconductor region, and a voltage supply circuit supplying voltage to the source and drain of the transistor. The voltage supply circuit supplies voltage that causes gate capacitance of the transistor to be a first capacitance value when signal charge accumulated in the first semiconductor region correspond to first amount and cause the gate capacitance to be a second capacitance value when signal charge accumulated in the first semiconductor region correspond to second amount.