Abstract: A ball grid array (BGA) package includes a substrate layer having first and second sides. A semiconductor chip is attached to the first side of the substrate layer by a dielectric adhesive layer. A plurality of solder balls are attached to the second side of the substrate layer. The solder balls may be set out by rows and columns. A plurality of wires electrically connect the semiconductor chip to the solder balls. A layer of encapsulating compound is deposited over the semiconductor chip. A step cavity of a selected depth and shape is formed in the layer of encapsulating compound at or near the edge or periphery of the layer of encapsulating compound. The step cavity is separated from the solder balls by the substrate layer but spans over a plurality of selected solder balls.

Abstract: A mounting structure for a semiconductor element is disclosed. The semiconductor element is bonded to a die pad through an adhesive film, which is formed by applying a predetermined amount of a paste adhesive onto the surface of the die pad and placing the semiconductor element on the die pad so as to press and spread the adhesive between the lower surface of the semiconductor element and the die pad. A wire extends between the semiconductor element and a terminal pad disposed around the die pad. The die pad includes plural grooves in the surface thereof. Each of the grooves extends from the center of the die pad toward a peripheral edge of the die pad and ends at the inner side of the peripheral edge of the die pad.

Abstract: A packaging structure for hermetically sealing a functional device by solder connection at a wafer level in which a first Si substrate having a concave portion metallized on its internal surface and a second Si substrate metallized at a position opposed to said concave portion are used, the metallization applied to the internal surface of the concave portion of the first Si substrate and the metallization applied to the second Si substrate at the position opposed to the concave portion are connected by molten solder to hermetically seal the functional device between the first Si substrate and the second Si substrate, whereby the wettability of the solder for the two Si substrates is improved, the bondability between the Si substrates is enhanced, and the yield at which the package is manufactured is improved.

Abstract: A carrier assembly for an integrated circuit is disclosed. The carrier assembly has a retainer with electrical contacts for receiving the integrated circuit, and island defining portions arranged about the retainer. Each island defining portion is connected to neighboring island defining portions through a serpentine member. This connection allows resilient deflection between the island defining portions.

Abstract: There is disclosed a semiconductor device comprising at least one semiconductor element, one chip mounting base being provided at least one first interconnection on one major surface thereof and at least one second interconnection on the other major surface thereof, and the semiconductor element being electrically connected to at least the one first interconnection and mounted on the one major surface, a sealing member being provided on the one major surface of the chip mounting base and covering the semiconductor element and the first interconnection, at least one third interconnection being provided on a surface of the sealing member, and at least one fourth interconnection being provided in the sealing member and the chip mounting base, and electrically connected to the first interconnection, the second interconnection, and the third interconnection.

Abstract: An integrated audio transducer with associated signal processing electronics is disclosed. A silicon audio transducer, such as a MEMS microphone or speaker, can be integrated with audio processing electronics in a single package. The audio processing electronics can be configured using control signals. The audio processing electronics can provide a single line serial data interface and a single line control interface. The audio transducers can be integrated with associated processing electronics. A silicon microphone can be integrated with an Analog to Digital Converter (ADC). The ADC output can be a single line serial interface. The ADC can be configured using a single line serial control interface. A speaker may be integrated with a Digital to Analog Converter (DAC). Audio transducers can also be integrated with more complex processing electronics. Audio processing parameters such as gain, dynamic range, and filter characteristics may be configured using the serial interface.

Abstract: An integrated circuit package system includes: a substrate; a first device attached to the substrate; a shield attached to the substrate and surrounding the first device; apertures formed within the shield; the shield configured to block electromagnetic energy that passes through the apertures; and an encapsulation material deposited through the apertures.

Abstract: An electronic device has a substrate that has first and second peripheral portions. The first peripheral portion provides a shearing position for separation. The electronic device has a plurality of wiring layers one of which forms a functional surface wiring on the substrate, an electronic element mounted on the substrate, and an encapsulation member formed over the substrate and the electronic element. The surface wiring is selectively disposed under the encapsulation member and in an area adjacent to the second peripheral portion.

Abstract: In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.

Abstract: Provided is an electronic circuit device in which the bonding state of electrodes can be detected easily with high precision. The electronic circuit device has a stack structure in which a plurality of electronic circuit boards (1a, 1b, 100a, 100b, 100c) are stacked in three or more layers through ball electrodes (10a, 10b, 20a, 20b) bonded to electrode pads (30a, 30b, 40b, 50a, 60a), wherein the electrode pads are disposed such that transmission shaded images of a pair of the electrode pads provided between adjacent layers partially overlap each other and have a non-overlapping region in which the transmission shaded images of the pair of electrode pads are free from overlapping and such that the transmission shaded image of the non-overlapping region is at least partially free from overlapping with transmission shaded images of all the other electrode pads.

Abstract: In a wiring substrate of a semiconductor device, a hollow portion is provided under a pad wiring portion including a connection pad, and thus a wiring layer has a cantilever structure in which the pad wiring portion is formed as an aerial wiring, and a semiconductor chip is flip-chip connected to the connection pad. The pad wiring portion including the connection pad is formed on a sacrifice layer which is filled in a recess portion in an interlayer insulating layer of the wiring substrate, then the semiconductor chip is flip-chip connected to the connection pad, and then the hollow portion is provided by removing the sacrifice layer.

Abstract: A semiconductor package with a support structure and a fabrication method thereof are provided. With a chip being electrically connected to electrical contacts formed on a carrier, a molding process is performed. A plurality of recessed portions formed on the carrier are filled with an encapsulant for encapsulating the chip during the molding process. After the carrier is removed, the part of the encapsulant filling the recessed portions forms outwardly protruded portions on a surface of the encapsulant, such that the semiconductor package can be attached to an external device via the protruded portions.

Abstract: A portion of a frame body is fixed on a surface of a heat-radiating plate, and on frame body, a semiconductor chip is die-bonded. Next, a prescribed electrode of semiconductor chip and corresponding lead terminal and the like are electrically connected by a prescribed wire. Next, the lead frame is set in a metal mold such that the semiconductor chip is covered with resin from above the semiconductor chip. Thermoplastic resin is introduced into the metal mold, and semiconductor chip and the like are sealed. By taking out the resulting body from the metal mold, a semiconductor is formed. Thus, a semiconductor device can be provided with reduced manufacturing cost.

Abstract: A lid forms an internal space on a bottom plate together with a plurality of side walls. A dielectric plate on the bottom plate in the internal space has a smaller width than an inner surface of the lid. A projection on the inner surface of the lid has a surface area, where a distance between the projection and the bottom plate where the projection is provided is shorter than a distance between the lid and the bottom plate where the projection is not provided. The lid and the projection are coupled to pass a current therebetween. The inner surface of the lid extends further toward an inner surface of one of the side walls than does the projection. The bottom plate, the side walls, the lid, and the projection are composed of metal material. The lid and the projection are composed of the same metal material.

Abstract: A force input control device suitable for high-volume applications such as cell phones, portable gaming devices and other handheld electronic devices along with other applications like medical equipment, robotics, security systems and wireless sensor networks is disclosed. The device can be one-axis or two-axis or three-axis sensitive broadening the range of applications. The device comprises a force sensor die formed within semiconductor substrate and containing a force sensor providing electrical output signal in response to applied external force, and electrical connection elements for mounting and/or wire bonding. Signal conditioning and processing integrated circuit can be integrated within some devices. A package enclosing at least a portion of the force sensor die and comprising a force-transferring element cooperated with the sensor die for transferring an external force to the force sensor die.

Abstract: To provide a stacked mounting structure in which the number of semiconductor chips that can be stacked is greater than conventionally, as well as a method for fabricating the same, each semiconductor chip has electrodes provided at least at one end in the stacked mounting structure, and a board holding the semiconductor chips at the one end is folded with at least two of the semiconductor chips being stacked so as to at least partially overlap with each other.

Abstract: The semiconductor device includes a substrate, a first semiconductor element, a second semiconductor element, a first heat sink and a second heat sink. The first and the second semiconductor elements are provided on the substrate. The maximum power consumption of the first semiconductor element is lower than that of the second semiconductor element. The first heat sink is fixed to the first semiconductor element. The second heat sink is fixed to the second semiconductor element. The first heat sink is spaced apart from the second heat sink.

Abstract: A resin sealing semiconductor device (2) having a structure in which a portion to be sealed of components including a plurality of chip mounting board, a semiconductor chip mounted to a front surface of each chip mounting board, and a plurality of leads provided correspondingly to each chip mounting board is embedded in resin molded portions (41 and 42) molded into a generally plate shape, and outer lead portions of the plurality of leads (16 and 17) are led out in line from a side surface at one end in a width direction of the resin molded portions, and back surfaces as exposed surfaces (11u1 to 11w1 and 12u1 to 12w1) of each chip mounting board are placed on one surfaces of the resin molded portions (41 and 42), wherein a plurality of positioning protrusions (50) are provided on one surfaces of the resin molded portions (41 and 42), and a protrusion height of the positioning protrusions is set so that a gap to be filled with insulating resin is formed between each part of the exposed surface of each chip mo

Abstract: A method of manufacture of an integrated circuit packaging system includes: providing an inner stacking module die; encapsulating the inner stacking module die with an inner stacking module encapsulation to form an inner stacking module, the inner stacking module encapsulation having an inner stacking module protrusion having a planar protrusion surface; and encapsulating at least part of the inner stacking module encapsulation with an encapsulation having a flat top coplanar with the planar protrusion surface or fully encapsulating the inner stacking module encapsulation.

Abstract: An integrated circuit package comprises a package substrate (210, 410), an electrically insulating material (220, 420) adjacent to the package substrate, and a mark (230, 420) on the electrically insulating material. The mark is such that a visual contrast between the mark and the electrically insulating material is maximized when the mark and the electrically insulating material are exposed to coaxial illumination. In one embodiment the electrically insulating material over the package substrate has a first surface roughness and a mark on the solder resist material has a second surface roughness that is no more than approximately twenty times greater than the first surface roughness.

Abstract: Even when a substrate on which a semiconductor package has been mounted is made curved, stress upon electrical connections is mitigated, thereby eliminating faulty connections and improving connection reliability. A semiconductor chip has electrodes on a second face thereof. Support blocks, capable of bending and flexing, are placed at two locations on a peripheral edge of a first face of the semiconductor chip. An interposer is placed so as to span the support blocks with the support blocks interposed between itself and the semiconductor chip, and has a wiring pattern in a flexible resin film. Two end portions of the interposer are folded back onto the side of the second face of the semiconductor chip, and the wiring pattern thereof is electrically connected to the electrodes of the semiconductor chip.

Abstract: A package and a package assembly for a power device having a high operation voltage and impulse voltage are provided. The package assembly for a power device comprises an assembly wherein the power device is encapsulated and electrically connected to a lead protruding outside the package, and an isolation spacer filling a clearance distance between the package and a heat sink attached to the package.

Abstract: To provide a semiconductor device and a semiconductor module in which breakage of a semiconductor element due to a pressing force given from the outside is prevented. A semiconductor device according to the present invention has a configuration mainly including an island, a semiconductor element mounted on a front surface of the island, a lead that functions as an external connection terminal, and a sealing resin that covers these components in an integrated manner and mechanically supports them. Further, a through-hole is provided so as to penetrate the sealing resin. A front surface of the sealing resin around the through-hole forms a flat part. The front surface of the sealing resin that overlaps the semiconductor element is depressed inward with respect to the flat part to form a depressed part.

Abstract: An improved Wafer-Level Chip-Scale Packaging (WLCSP) process is described that includes forming a plurality of conductive pillars on a first surface of a semiconductor wafer. One or more grooves are dry etched into the first surface of the semiconductor wafer, where the grooves define at least one boundary between each of a plurality of die within the semiconductor wafer. A layer of encapsulating material is deposited over the first surface. A recess is then cut in each of the grooves through the encapsulating material, where the cutting leaves a piece of semiconductor material on the second surface of the semiconductor wafer. The second surface is then ground to remove the piece of semiconductor material, where the removal of this material separates the plurality of die.

Abstract: A semiconductor die has active circuits formed on its active surface. Contact pads are formed on the active surface of the semiconductor die and coupled to the active circuits. A die extension region is formed around a periphery of the semiconductor die. Through hole vias (THV) are formed in the die extension region. A conductive plane or ring is formed in a center area on the active surface of the semiconductor die. The conductive plane or ring is coupled to a first contact pad for providing a first power supply potential to the active circuits. The conductive plane or ring is electrically connected to a first THV. A conductive ring is formed partially around a perimeter of the conduction plane or ring. The conductive ring is coupled to a second contact pad for providing a second power supply potential to the active circuits. The conductive ring is electrically connected to a second THV.

Abstract: A semiconductor package includes a base substrate on which semiconductor elements are disposed; a covering member which is provided to the base substrate, which covers the semiconductor elements, and which includes an opening at an end thereof at the side of the base substrate; and a connector substrate which is provided on the base substrate in a manner that the connector substrate closes the opening, which includes a first high-frequency signal line in an area located inside the covering member for a first surface, and which includes a second high-frequency signal line on a second surface being a surface on the opposite side of the first surface, the second high-frequency signal line being electrically connected to the first high-frequency signal line; wherein the base substrate is formed in a manner that the base substrate is located away from the second high-frequency signal line.

Abstract: It is an object of the invention to provide semiconductor devices which can protect privacy of consumers or holders of commercial products and control the communication range according to use, even when the semiconductor device which can exchange data without contact is mounted on the commercial products. A semiconductor device of the invention includes an element group including a plurality of transistors over a substrate; a first conductive film functioning as an antenna over the element group; a second conductive film surrounding the first conductive film; an insulating film covering the first and second end portions; and a third conductive film over the insulating film. The first conductive film is provided in the shape of a coil, and each end portion of the first conductive film is connected to the element group. First and second end portions of the second conductive film are not connected to each other.

Abstract: A film tray for fabricating a flexible display, the film tray preventing a flexible substrate or film from sagging. The film tray includes a support plate and at least one pair of clamps, each clamp of the at least one pair of clamps located along an opposite edge of the support plate to fix a flexible film. A first clamp of the at least one pair clamps is aligned with a second clamp of the least one pair of clamps. Each clamp includes an open-shut part adapted to be opened to receive the flexible substrate or film and adapted to be shut to fix the flexible substrate or film and a support part separated from the open-shut part by a predetermined space to support the flexible substrate or film at a predetermined level when the open-shut part is closed.

Abstract: A device made of single-crystal silicon having a first side, a second side which is situated opposite to the first side, and a third side which extends from the first side to the second side, the first side and the second side each extending in a 100 plane of the single-crystal silicon, the third side extending in a first area in a 111 plane of the single-crystal silicon. The third side extends in a second area in a 110 plane of the single-crystal silicon. Furthermore, a production method for producing a device made of single-crystal silicon is described.

Abstract: A directional microphone assembly for a hearing aid, and methods of assembling a directional microphone, are provided. The hearing aid has one or more microphone cartridge(s), and first and second sound passages. Inlets to the sound passages, or the sound passages themselves, are spaced apart such that the shortest distance between them is less than or approximately equal to the length of the microphone cartridge(s). A sound duct and at least one surface of a microphone cartridge may form each sound passage, where the sound duct is mounted with the microphone cartridge. Alternatively, each sound duct may be formed as an integral part of a microphone cartridge.

Abstract: A low-temperature co-fired ceramics (LTCC) substrate includes a plurality of substrate units and at least one cutting pattern. The cutting pattern is disposed between neighboring two of the substrate units. A semiconductor package including the LTCC substrate is also disclosed.

Abstract: An integrated circuit package system includes: providing a base device; attaching a base interconnect to the base device; applying an encapsulant over the base device and the base interconnect; and forming a re-routing film over the encapsulant, the base device, and the base interconnect for connectivity without a substrate.

Abstract: Provided are a semiconductor package and a method for forming the same, and a PCB (printed circuit board). The semiconductor package comprises: a PCB including a slit at a substantially central portion thereof, the PCB including an upper surface and a lower surface; a semiconductor chip mounted on the upper surface of the PCB; an upper molding layer disposed on the upper surface and covering the semiconductor chip; and a lower molding layer filling the slit and covering a portion of the lower surface of the PCB, wherein the PCB comprises a connecting recess at a side surface thereof, and the upper molding layer and the lower molding layer are in contact with each other at the connecting recess.

Abstract: A recess (5a) in the corner direction and recesses (5b) in side directions are formed in each connecting pad (5A) located at a corner of a lower surface-side of an insulating base 2 having groove-shaped recesses (6) in the periphery, and groove-shaped recesses (6a and 6b) in the corner and side directions are formed in each corner portion (2A) of the insulating base 2 corresponding to the connecting pad (5A). Connecting pads (5) of an electronic apparatus in which an electronic component is mounted on the insulating base 2 are mounted on an external electrical circuit board by using a solder. A solder (31) melted during the solder-mounting adheres onto the groove-shaped recesses (6a and 6b) in the corner and side directions of the corner portion (2A) of the insulating base 2 and thus solder fillets are formed in the groove-shaped recesses (6a and 6b).

Abstract: A semiconductor package production method includes the step of die-cutting part of a lead side portion of a seal formed by molding and dam bars using a pedestal and punch. The pedestal has an outer surface at a position retreating from a side surface of an upper seal portion as far as possible and an inner surface generally near a side surface of a lower seal portion. Width Wa of the upper surface of the upper surface of the pedestal is smaller than the overhang size of the upper seal portion. Tip end region Ra of the lead side portion which is present right under the overhang portion of the upper seal portion has a slanted surface Fa1which is sloped inwardly from top to bottom.

Abstract: An integrated circuit package system includes: providing a module substrate having dimension predetermined for attachment adjacent a device; attaching a module die adjacent the module substrate; and applying a module molding material cantilevered from the module substrate and over the module die.

Abstract: A semiconductor device includes a substrate having a resin layer on at least a surface thereof; a thin-film circuit layer provided on the substrate, and a reinforcing section provided on the surface of the substrate so as to surround the thin-film circuit layer.

Abstract: The electric component includes at least a set of electrode terminals 2, 3, a semiconductor element 4 electrically connected with the set of electrode terminals, and a package 6 made of synthetic resin and sealing the electrode terminals and the semiconductor element with part of a lower surface of each of the electrode terminals exposed at a lower surface of the package. A cover layer 11 made of synthetic resin is formed to cover a cut surface of a tip of a connector lead remainder extending integrally outward from the each of the electrode terminals. Thus, disadvantages resulting from exposure of the cut surface of the tip of the connector lead remainder are eliminated.

Abstract: The present invention provides three-dimensional force input control devices for use in sensing vector forces and converting them into electronic signals for processing in a electronic signal processing system with all components within die fabricated from the single semiconductor substrate. In some embodiments, the die has an elastic element, a frame formed around said elastic element, at least three mechanical stress sensitive IC components located in the elastic element, at rigid island element which transfers an external vector force to the elastic element and through the IC components provides electrical output signal, this rigid island has a height bigger than the thickness of the frame element, an external force-transferring element coupling the rigid island element with an external force and electronic circuit for processing output signals from the mechanical stress sensitive IC components.

Abstract: A semiconductor sensor is contained in a cylindrical housing, an opening of which is closed with a cover member. The cover member includes a mounting plate integrally molded therewith. Components including a bare sensing chip and other circuit chips are directly mounted on a flat surface of the mounting plate. The components mounted on the flat surface are covered with gel having a high flowability. The gel is prevented from flowing out of the flat surface toward the cover member by banks formed at both sides of the flat surface. On an inner wall of the bank, curved surfaces and depressions are formed to surely suppress creeping up of the gel and to trap the gel therein if it creeps up the inner wall of the bank. Thus, the gel is surely prevented from flowing out even though the banks do not entirely surround the flat mounting surface.

Abstract: A stacked package structure utilizes flip-chip technology to stack an acoustic micro-sensor on an integrated circuit (IC) device having a recess as a back chamber and cover the acoustic micro-sensor using a glass substrate or a planar substrate with an aperture. With the use of the stacked package structure, the package volume of the acoustic micro-sensor can be reduced effectively.

Abstract: An integrated circuit includes a substrate including a contact pad, a redistribution line coupled to the contact pad, and a dielectric material layer between the substrate and the redistribution line. The integrated circuit includes a solder ball coupled to the redistribution line and a parylene material layer sealing the dielectric material layer and the redistribution line.

Abstract: A die-mounting substrate and method incorporating dummy traces for improving mounting film planarity makes the use of film attach possible with a simplified manufacturing process and in applications where film-attach was not previously practical. The die-mounting substrate includes dummy traces that are generated along with signal traces extending into the die mounting area of the substrate. The dummy traces are designed according to the same design rules as the signal traces and are disposed in otherwise empty regions between signal traces and vias within the die mounting area. The result is die mounting area without regions empty of signal traces that previously either lack conductor or are filled completely with conductor, either of which will result in surface variation that compromises the film bond.

Abstract: A semiconductor package includes a substrate or leadframe structure. A plurality of interconnected dies, each incorporating a plurality of through-hole vias (THVs) disposed along peripheral surfaces of the plurality of dies, are disposed over the substrate or leadframe structure. The plurality of THVs are coupled to a plurality of bond pads through a plurality of a metal traces. A top surface of a first THV is coupled to a bottom surface of a second THV. An encapsulant is formed over a portion of the substrate or leadframe structure and the plurality of dies.

Abstract: A packaged integrated circuit has an integrated circuit over a support structure. A plurality of bond wires connected between active terminals of the integrated circuit and the support structure. An encapsulant overlies the support structure, the integrated circuit, and the bond wires. The encapsulant has a first open location in the encapsulant so that a first bond wire is exposed and a second open location in the encapsulant so that a second bond wire is exposed. First and second conductive structures are exposed outside the packaged integrated circuit and are located at the first and second open locations, respectively, and electrically connected to the first and second bond wires, respectively.

Abstract: Microelectronic devices having intermediate contacts, and associated methods of packaging microelectronic devices with intermediate contacts, are disclosed herein. A packaged microelectronic device configured in accordance with one embodiment of the invention includes a microelectronic die attached to an interconnecting substrate. The microelectronic die includes an integrated circuit electrically coupled to a plurality of terminals. Each of the terminals is electrically coupled to a corresponding first contact on the die with an individual wire-bond. Each of the first contacts on the die is electrically coupled to a corresponding second contact on the interconnecting substrate by a conductive coupler such as a solder ball.

Abstract: A power semiconductor module includes a housing, a substrate carrier with a circuit thereon and electrical connection elements extending therefrom. The carrier has a cutout between its inner surface (facing the interior of the module) and its outer surface. The cutout is smaller at the inner surface than at the outer surface. The housing has an extension that reaches into the cutout and may be deformed to form a riveted connection. The method comprises: forming a housing with at least one extension which extends towards the exterior of the module, wherein the extension projects through the cutout and beyond the outer surface of the carrier; and deforming the end of the extension so that it widens and forms a riveted connection and at the same time lies below the outer surface of the carrier.

Abstract: Flexible circuitry is populated with integrated circuitry (ICs), and contacts are distributed along the flexible circuitry to provide connection to an application environment. The flexible circuitry is disposed about a rigid substrate, placing the ICs on one or both sides of the substrate with one or more layers of integrated circuitry on one or both sides of the substrate. The substrate is preferably devised from thermally-conductive materials and one or more thermal spreaders are in thermal contact with at least some of the ICs. Optionally, as an additional thermal management feature, the module may include a high thermal conductivity thermal sink or area that is disposed proximal to higher thermal energy IC devices. In preferred embodiments, extensions from the substrate body or substrate core encourage reduced thermal variations amongst the ICs of the module while providing an enlarged surface for shedding thermal energy from the module.

Abstract: The flip chip mounted body of the present invention includes: a circuit board (213) having a plurality of connection terminals (211); a semiconductor chip (206) having a plurality of electrode terminals (207) that are disposed opposing the connection terminals (211); and a porous sheet (205) having a box shape that is provided on an opposite side of a formation surface of the electrode terminal (207) of the semiconductor chip (206), is folded on an outer periphery of the semiconductor chip (206) on the formation surface side of the electrode terminal (207) and is in contact with the circuit board (213), wherein the connection terminal (211) of the circuit board (213) and the electrode terminal (207) of the semiconductor chip (206) are connected electrically via a solder layer (215), and the circuit board (213) and the semiconductor chip (206) are fixed by a resin (217).

Abstract: A method of manufacture of an integrated circuit package system which includes providing a substrate and attaching a first device to the substrate. Attaching a shield to the substrate. Processing the shield to form apertures and configuring the shield to block electromagnetic energy that passes through the apertures.