With Specified Filler Material Patents (Class 257/789)
  • Patent number: 11948809
    Abstract: A method for underfilling an electronic circuit assembly may include mounting one or more structures to a substrate, mounting one or more spacers to the substrate at one or more positions, respectively, to form one or more passages between the one or more spacers and the one or more structures, dispensing underfill to the one or more passages, and curing the underfill to secure the one or more structures to the substrate. The one or more structures may include one or more dies.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: April 2, 2024
    Assignee: Delphi Technologies IP Limited
    Inventor: Whei Sheng Tan
  • Patent number: 11699632
    Abstract: Methods for attachment and devices produced using such methods are disclosed. In certain examples, the method comprises disposing a capped nanomaterial on a substrate, disposing a die on the disposed capped nanomaterial, drying the disposed capped nanomaterial and the disposed die, and sintering the dried disposed die and the dried capped nanomaterial at a temperature of 300° C. or less to attach the die to the substrate. Devices produced using the methods are also described.
    Type: Grant
    Filed: January 20, 2021
    Date of Patent: July 11, 2023
    Assignee: ALPHA ASSEMBLY SOLUTIONS INC.
    Inventors: Monnir Boureghda, Nitin Desai, Anna Lifton, Oscar Khaselev, Michael T. Marczi, Bawa Singh
  • Patent number: 11424191
    Abstract: A semiconductor device and method of manufacture are provided wherein semiconductor devices are attached over a semiconductor substrate. An opening is formed within metallization layers over the semiconductor substrate and the semiconductor substrate, and an encapsulant is placed to fill the opening. Once the encapsulant is placed, the semiconductor substrate is singulated to separate the devices. By recessing the material of the metallization layers and forming the opening, delamination damage may be reduced or eliminated.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: August 23, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsien-Wei Chen, Ming-Fa Chen
  • Patent number: 10991666
    Abstract: A location displacement of an electrode of a device relative to an electrode pad of a semiconductor element is detected based on a conduction state between the electrode pad of the semiconductor element and the electrode of the device. The electrode pad of the semiconductor element is segmented into multiple portions and a first pad through a fourth pad uniformly arranged. A location displacement detector determines that no location displacement has occurred when the electrode pad of the semiconductor element is conductive to the electrode of the device, and determines that a location displacement has occurred when the electrode pad of the semiconductor element is non-conductive to the electrode of the device.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: April 27, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Yuta Ikawa, Kenichi Murakoshi, Hiroyoshi Higashisaka, Shigeyuki Akase
  • Patent number: 10808103
    Abstract: The present invention provides a resin composition for an underfill material, comprising a maleimide compound (A) and a secondary monoamino compound (B), wherein the secondary monoamino compound (B) has a boiling point of 120° C. or more.
    Type: Grant
    Filed: May 29, 2017
    Date of Patent: October 20, 2020
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Takenori Takiguchi, Kohei Higashiguchi, Tsuyoshi Kida
  • Patent number: 10672681
    Abstract: Semiconductor packages are provided. One of the semiconductor packages includes a first sub-package and a second sub-package. The first sub-package includes a first die, a graphite oxide layer on the first die and an encapsulant encapsulating the first die and the graphite oxide layer. The second sub-package is stacked on and electrically connected to the first sub-package, and includes a second die. The graphite oxide layer is disposed between the first die and the second die.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: June 2, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chien-Chang Lin, Hsin-Yu Pan, Lipu Kris Chuang, Ming-Chang Lu
  • Patent number: 10591527
    Abstract: A method of iteratively screening a sample of electrolytic capacitors having a predetermined rated voltage is provided. The method can include measuring a first leakage current of a first set of capacitors, calculating a first mean leakage current therefrom, and removing capacitors from the first set having a first leakage current equal to or above a first predetermined value, thereby forming a second set of capacitors. The second set can be subjected to a burn in heat treatment where a test voltage can be applied, then a second leakage current of the second set of capacitors can be measured and a second mean leakage current can be calculated. Capacitors having a second leakage current equal to or above a second predetermined value can be removed from the second set, forming a third set of capacitors. Because of such iterative screening, the capacitors in the third set have low failure rates.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: March 17, 2020
    Assignee: AVX Corporation
    Inventors: William A. Millman, Marc V. Beaulieu, Michael I. Miller, Mark W. Leinonen
  • Patent number: 10529367
    Abstract: A magnetic recording medium includes a long-shaped base substrate having flexibility, a soft magnetic layer, and a magnetic recording layer. A squareness ratio in a longitudinal direction of the base substrate is equal to or less than a squareness ratio in a short-side direction of the base substrate. The squareness ratio in the longitudinal direction of the base substrate is 30% or less.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: January 7, 2020
    Assignee: Sony Corporation
    Inventors: Junichi Tachibana, Tetsuo Endo, Tomoe Ozaki, Hikaru Terui
  • Patent number: 10396367
    Abstract: Provided is a fuel cell separator obtained by molding a composition that contains an epoxy resin and a graphite powder, wherein: the epoxy resin contains a main resin, a curing agent, and a curing accelerator; the main resin contains a biphenyl novolak-type epoxy resin having an ICI viscosity of 0.03-0.12 Pa·s at 150° C.; and the curing agent is a novolak-type phenol resin having a weight-average molecular weight of 420-1,500 and a dispersion degree of 2.0 or less.
    Type: Grant
    Filed: August 6, 2015
    Date of Patent: August 27, 2019
    Assignee: NISSHINBO CHEMICALS INC.
    Inventor: Fumio Tanno
  • Patent number: 10211163
    Abstract: A semiconductor package including a marking film and a method of fabricating the same are provided wherein a marking film including a thermoreactive layer may be applied to a molding layer to protect a semiconductor chip under the molding layer and to efficiently perform a marking process. The thickness of the molding layer may thereby be reduced so the entire thickness of the semiconductor package may be reduced. Also, it is possible to prevent warpage of the semiconductor package through the marking film, provide the surface of the semiconductor package with gloss and freely adjust the color of the surface of the semiconductor package.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: February 19, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Yeongseok Kim
  • Patent number: 10115656
    Abstract: Performance of a semiconductor device is improved. Graphene particles are mixedly added in a sealing resin covering a semiconductor chip. The graphene particles are thus mixedly added in the sealing resin, thereby thermal conduction of the sealing resin is improved, and thus radiation performance of the semiconductor device can be improved. Graphene is a sheet of sp2 bonded carbon atoms having a monolayer thickness. Graphene has a structure where hexagonal lattices, each of which is formed of carbon atoms and bonds of the carbon atoms, are planarly spread. Graphene is preferably used as heat transfer filler because of its high thermal conductivity and light weight.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: October 30, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Yoshihisa Matsubara
  • Patent number: 9997484
    Abstract: A semiconductor device includes a wiring substrate, a first semiconductor element, a second semiconductor element, a bump, a bonding portion, and a resin portion. The second semiconductor element is between the wiring substrate and the first semiconductor element. The bump is between the first and second semiconductor elements and electrically connects the first and second semiconductor elements. The bonding portion is between the first and second semiconductor elements, bonds the first semiconductor element to the second semiconductor element, and has a first elastic modulus. The resin portion has a second elastic modulus higher than the first elastic modulus. The resin portion is between the first and second semiconductor elements. The first semiconductor element is between a second portion of the resin portion and the wiring substrate. A third portion of the resin portion is overlapped with the first and second semiconductor elements.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: June 12, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Takeori Maeda, Masatoshi Fukuda, Ryoji Matsushima, Hideo Aoki
  • Patent number: 9893022
    Abstract: Circuits which self-destruct under radiation are provided. In one aspect, a method for creating a radiation-sensitive circuit is provided. The method includes the step of: connecting an integrated circuit to a power supply and to a ground in parallel with at least one dosimeter device, wherein the dosimeter device is configured to change from being an insulator to being a conductor under radiation. Radiation-sensitive circuits are also provided.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: February 13, 2018
    Assignee: International Business Machines Corporation
    Inventors: Qing Cao, Kangguo Cheng, Fei Liu
  • Patent number: 9818718
    Abstract: Provided are: a conductive paste in which sinterability of silver particles the conductive paste can be easily controlled by using silver particles having predetermined crystal transformation characteristics defined by an XRD analysis, and after a sintering treatment, excellent electrical conductivity and thermal conductivity can be stably obtained; and a die bonding method using the conductive paste. Disclosed is a conductive paste which includes silver particles having a volume average particle size of 0.1 to 30 ?m as a sinterable conductive material, and a dispersing medium for making a paste-like form, and in which when the integrated intensity of the peak at 2?=38°±0.2° in the X-ray diffraction chart obtainable by an XRD analysis before a sintering treatment of the silver particles is designated as S1, and the integrated intensity of the peak at 2?=38°±0.2° in the X-ray diffraction chart obtainable by an XRD analysis after a sintering treatment (250° C.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: November 14, 2017
    Assignee: KAKEN TECH CO., LTD.
    Inventors: Shigeo Hori, Hirohiko Furui, Akira Fujita
  • Patent number: 9666499
    Abstract: Described are techniques related to semiconductor devices that make use of encapsulant. In one implementation, a semiconductor device may be manufactured to include at least an encapsulant that includes at least glass particles.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: May 30, 2017
    Assignee: Infineon Technologies AG
    Inventors: Joachim Mahler, Edward Fuergut, Khalil Hosseini, Georg Meyer-Berg
  • Patent number: 9349663
    Abstract: A package on package structure providing mechanical strength and warpage control includes a first package component, a second package component, and a first set of conductive elements coupling the first package component to the second package component. A first polymer-comprising material is molded on the first package component and surrounds the first set of conductive elements. The first polymer-comprising material has an opening therein exposing a top surface of the second package component. A third package component and a second set of conductive elements couples the second package component to the third package component.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: May 24, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Meng-Tse Chen, Yu-Chih Liu, Hui-Min Huang, Wei-Hung Lin, Jing Ruei Lu, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 9275879
    Abstract: Multi-chip underfills and methods for multi-chip module fabrication include connecting one or more chips to a substrate with one or more electrical connections; partially curing an underfill material such that the underfill provides structural support to the electrical connections; electrically testing the one or more chips to identify one or more defective chips; and replacing the one or more defective chips.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: March 1, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael A. Gaynes, Jeffrey D. Gelorme, Jae-Woong Nah
  • Patent number: 9147819
    Abstract: A curable composition and use thereof are provided. The composition can be useful in exhibiting excellent processability and workability, and providing a cured product which exhibits superior light extraction efficiency, crack resistance, hardness, thermal shock resistance, and adhesive properties, has superior reliability under severe conditions for a long period of time and prevents opacity and stickiness onto a surface thereof when cured. Also, the curable composition capable of preventing precipitation of an additive such as a fluorescent material or a photoconversion material and being formed into a cured product having excellent transparency even when the additive is added to the curable composition can be provided.
    Type: Grant
    Filed: January 22, 2014
    Date of Patent: September 29, 2015
    Assignee: LG Chem, Ltd.
    Inventors: Min Jin Ko, Myung Sun Moon, Jae Ho Jung, Bum Gyu Choi, Dae Ho Kang, Min Kyoun Kim, Byung Kyu Cho
  • Patent number: 9078355
    Abstract: A semiconductor device has a control terminal attached to a patterned insulating substrate; a first projection formed on the control terminal; a second projection formed on the control terminal; a concave formed between the first projection and the second projection; a resin case disposed to cover the patterned insulating substrate, and having an opening for passing the control terminal therethrough; a first concave portion; a beam portion disposed at the opening of the resin case; a second concave portion formed in the beam portion; a resin block inserted into the opening of the resin case and sandwiching the control terminal together with the sidewall of the opening of the resin case to fix the control terminal to the resin case; a convex step portion; a third projection formed on a side surface of the resin block; and a fourth projection thinned on a bottom surface of the resin block.
    Type: Grant
    Filed: August 24, 2012
    Date of Patent: July 7, 2015
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Yoshihiro Kodaira
  • Patent number: 9035473
    Abstract: Provided are a thin circuit device with show-through of thin metal wires prevented and a method of manufacturing the circuit device. A circuit device mainly includes: a substrate including a first substrate and second substrates; pads formed respectively on upper surfaces of the second substrates; a semiconductor element fixed on an upper surface of the first substrate; thin metal wires each connecting the semiconductor elements and a corresponding one of the pads; and a sealing resin with which the semiconductor element and the thin metal wires are covered, and which thereby seals the circuit device with the semiconductor element and the thin metal wires disposed therein. Furthermore, filler particles located in the uppermost portion of the sealing resin are covered with a resin material constituting the sealing resin.
    Type: Grant
    Filed: September 28, 2009
    Date of Patent: May 19, 2015
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Isao Nakazato, Shigeharu Yoshiba, Takashi Sekibata
  • Patent number: 9018777
    Abstract: An encapsulating composition for a light emitting element, a light emitting diode (LED) and a liquid crystal display device (LCD) are provided. A silicone-cured product included as a main ingredient and a conductivity-providing agent having excellent compatibility and capable of providing superior conductivity can be used to significantly reduce the surface resistivity of the silicone-cured product. Therefore, the encapsulating composition for a light emitting element, the LED and the LCD can be useful in solving the problems regarding attachment of a foreign substance such as dust due to static electricity, and degradation of transparency since the composition has low surface resistivity when used as a semiconductor encapsulation material for an LED, and also in providing a cured product having excellent properties such as light resistance, heat resistance, durability and optical transparency.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: April 28, 2015
    Assignee: LG Chem, Ltd.
    Inventors: Sang Ki Chun, In Seok Hwang, Dong-Wook Lee, Ji Young Hwang
  • Patent number: 9011728
    Abstract: The object of the present invention is to provide a method for producing a conductive material that has a low electric resistivity and that is obtained using an inexpensive and stable conductive material composition. A conductive material having a low electric resistivity can be obtained by a method including the step of heating a conductive material composition that contains at least one of a full-cured or semi-cured thermosetting resin and a thermoplastic resin, as well as silver particles. Such a conductive material is a conductive material that includes fused silver particles, and thermosetting resin fine particles that have an average particle diameter of 0.1 ?m to 10 ?m both inclusive and are dispersed in the fused silver particles. Further, in such a conductive material is a conductive material that includes fused silver particles, and a thermoplastic resin welded among the fused silver particles.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: April 21, 2015
    Assignee: Nichia Corporation
    Inventors: Masafumi Kuramoto, Satoru Ogawa, Miki Niwa, Katsuaki Suganuma, Keun-Soo Kim
  • Patent number: 9006777
    Abstract: An organic light-emitting display and methods of manufacturing the same are disclosed. In one aspect, an organic light-emitting apparatus includes a substrate, a display unit on the substrate, a step compensation layer formed on the display unit and supplementing a step on a surface of the display unit, a first intermediate layer formed on the step compensation layer, and an encapsulation layer formed on the first intermediate layer and sealing the display unit.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: April 14, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ung-Soo Lee, Jae-Sun Lee, Hun Kim, Jai-Hyuk Choi, Su-Hyuk Choi, Jin-Woo Park
  • Patent number: 8987918
    Abstract: Embodiments of the present disclosure are directed towards techniques and configurations of interconnect structures having a polymer core in integrated circuit (IC) package assemblies. In one embodiment, an apparatus includes a first die having a plurality of transistor devices disposed on an active side of the first die and a plurality of interconnect structures electrically coupled with the first die, wherein individual interconnect structures of the plurality of interconnect structures have a polymer core, and an electrically conductive material disposed on the polymer core, the electrically conductive material being configured to route electrical signals between the transistor devices of the first die and a second die. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: March 24, 2015
    Assignee: Intel Corporation
    Inventors: Sandeep Razdan, Edward R. Prack, Sairam Agraharam, Robert L. Sankman, Shan Zhong, Robert M. Nickerson
  • Patent number: 8952529
    Abstract: A semiconductor device has a semiconductor die with a plurality of bumps formed over a surface of the semiconductor die. A first conductive layer having first and second segments is formed over a surface of the substrate with a first vent separating an end of the first segment and the second segment and a second vent separating an end of the second segment and the first segment. A second conductive layer is formed over the surface of the substrate to electrically connect the first segment and second segment. The thickness of the second conductive layer can be less than a thickness of the first conductive layer to form the first vent and second vent. The semiconductor die is mounted to the substrate with the bumps aligned to the first segment and second segment. Bump material from reflow of the bumps is channeled into the first vent and second vent.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: February 10, 2015
    Assignee: STATS ChipPAC, Ltd.
    Inventors: JaeHyun Lee, SunJae Kim, JoongGi Kim
  • Patent number: 8952531
    Abstract: A packaging method comprises steps of forming a plurality of pads and another circuit pattern on a substrate, forming a second dry film pattern including opening exposing the pad, mounting a solder coating ball in the opening of the second dry film pattern, performing a reflow process on the solder coating ball in order to allow the solder coating ball to have a modified pattern, delaminating the second dry film pattern, and forming a solder pattern including the modified pattern of the solder coating ball in a solder to mount a chip on the substrate using the solder pattern.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: February 10, 2015
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jin Won Choi, Yon Ho You
  • Patent number: 8946350
    Abstract: Provided are a curable composition and its use. The curable composition can exhibit excellent processibility and workability. The curable composition exhibits excellent light extraction efficiency, hardness, thermal and shock resistance, moisture resistance, gas permeability and adhesiveness, after curing. In addition, the curable composition can provide a cured product that exhibits long-lasting durability and reliability even under harsh conditions, and that does not cause whitening and surface stickiness.
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: February 3, 2015
    Assignee: LG Chem, Ltd.
    Inventors: Min Jin Ko, Jae Ho Jung, Bum Gyu Choi, Min A Yu
  • Patent number: 8946759
    Abstract: Disclosed is an organic light emitting display device which prevents or inhibits external gas, such as, oxygen or moisture, from penetrating into a display unit and reinforces a mechanical strength by providing a first sealant and a second sealant. The organic light emitting display device may include: a first substrate; a display unit on the first substrate; a second substrate covering the display unit; a first sealant adhering the first substrate to the second substrate; and a second sealant around the first sealant, the second sealant sealing the first substrate and the second substrate. A filler may be included in the second sealant, and a particle size of the filler may be larger than a gap between the first substrate and the second substrate.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: February 3, 2015
    Assignee: Samsung-Display Co., Ltd.
    Inventors: Jung Woo Moon, Hyun Joon Oh
  • Publication number: 20150028498
    Abstract: Disclosed herein are a molding composition for a semiconductor package including a liquid crystal thermosetting polymer resin and graphene oxide to thereby effectively decrease coefficient of thermal expansion (CTE) and warpage and maximize an effect of thermal conductivity, and a semiconductor package using the same.
    Type: Application
    Filed: May 29, 2014
    Publication date: January 29, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Soo Young Ji, Seung Hwan Kim
  • Publication number: 20150021763
    Abstract: An epoxy resin composition includes an inorganic filler, an epoxy resin, and a curing agent. The inorganic filler has an average particle diameter D50 from about 2 ?m to about 10 ?m, an average particle diameter D10 of about 3 ?m or less, and an average particle diameter D90 from about 6 ?m to about 15 ?m. Inorganic filler particles having a particle diameter of about 25 ?m or more constitute about 0.1 wt % or less of the inorganic filler.
    Type: Application
    Filed: July 18, 2014
    Publication date: January 22, 2015
    Inventors: Woo Chul NA, Seung HAN
  • Patent number: 8933482
    Abstract: A light-emitting device having superior light extraction efficiency and method for producing a light emitting device are provided. A light emitting device includes a base body having wiring conductors, conductive adhesive member, especially an anisotropic conductive adhesive member, including electrically conductive particles mixed in a light transmissive resin, and a semiconductor light emitting element bonded on the wiring conductors via the anisotropic conductive adhesive. The anisotropic conductive adhesive member includes the electrically conductive particles with a concentration lower in a surrounding region around the semiconductor light emitting element than in a lower region located between the semiconductor light emitting element and the base body.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: January 13, 2015
    Assignee: Nichia Corporation
    Inventor: Tadaaki Miyata
  • Patent number: 8928158
    Abstract: An epoxy resin composition for encapsulating a semiconductor device includes a curing agent, a curing accelerator, inorganic fillers, and an epoxy resin, the epoxy resin including a first resin represented by Formula 1: wherein R1 and R2 are each independently hydrogen or a C1 to C4 linear or branched alkyl group, and n is a value from 1 to 9 on average.
    Type: Grant
    Filed: May 23, 2012
    Date of Patent: January 6, 2015
    Assignee: Cheil Industries Inc.
    Inventors: Seung Han, Ju Mi Kim, Sung Su Park, Eun Jung Lee
  • Patent number: 8922031
    Abstract: A thermosetting encapsulation adhesive sheet which is used for encapsulating a chip type device (1) having connection electrodes (bumps) (3) and mounted on a wiring circuit board (2). The thermosetting encapsulation adhesive sheet is composed of an epoxy resin composition having a viscosity of 5×104 to 5×106 Pa·s as measured at a temperature of 80 to 120° C. before thermosetting thereof. The thermosetting encapsulation adhesive sheet makes it possible to conveniently encapsulate a hollow device with an improved yield.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: December 30, 2014
    Assignee: Nitto Denko Corporation
    Inventors: Eiji Toyoda, Hiroshi Noro
  • Patent number: 8921827
    Abstract: Embodiments of the present invention relate to a formulation for use in the fabrication of a light-emitting device, the formulation including a population of semiconductor nanoparticles incorporated into a plurality of discrete microbeads comprising an optically transparent medium, the nanoparticle-containing medium being embedded in a host light-emitting diode encapsulation medium. A method of preparing such a formulation is described. There is further provided a light-emitting device including a primary light source in optical communication with such a formulation and a method of fabricating the same.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: December 30, 2014
    Assignee: Nanoco Technologies, Ltd.
    Inventors: Nigel Pickett, James Harris
  • Patent number: 8906749
    Abstract: A semiconductor device and a method for making a semiconductor device are disclosed. In an embodiment a semiconductor device includes a semiconductor chip and a fiber reinforced encapsulation layer at least partly covering the semiconductor chip.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: December 9, 2014
    Assignee: Infineon Technologies AG
    Inventors: Michael Bauer, Daniel Porwol, Ulrich Wachter
  • Patent number: 8860233
    Abstract: A resin composition for encapsulation, which contains 100 parts by weight of a synthetic resin, 10 to 500 parts by weight of a carbon precursor having a volume resistivity of 102 to 1010 ?·cm, 0 to 60 parts by weight of a conductive filler having a volume resistivity lower than 102 ?·cm and 100 to 1,500 parts by weight of an other inorganic filler.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: October 14, 2014
    Assignee: Kureha Corporation
    Inventor: Naomitsu Nishihata
  • Patent number: 8829694
    Abstract: Thermosetting resin compositions with low coefficient of thermal expansion are provided herein.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: September 9, 2014
    Assignee: Henkel IP & Holding GmbH
    Inventors: Masashi Horikiri, Jie Bai
  • Patent number: 8823168
    Abstract: A method of attaching an IC wafer having a plurality of copper pillars (“CuP's) projecting from one face thereof to a substrate having a plurality of contact pads on one face thereof including applying a film having a substantial amount of filler particles therein to the one face of the wafer; applying an a-stage resin having substantially no filler particles therein to the one face of the substrate; and interfacing the film with the a-stage resin.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: September 2, 2014
    Assignee: Texas Instruments Incorporated
    Inventor: Kurt Peter Wachtler
  • Publication number: 20140197552
    Abstract: A chip arrangement is provided, the chip arrangement, including a carrier; at least one chip electrically connected to a carrier top side; an encapsulation material at least partially surrounding the at least one chip and the carrier top side, wherein the encapsulation material is formed on one or more lateral sides of the carrier; and a ceramic material disposed on a carrier bottom side, and on at least one side of the encapsulation material.
    Type: Application
    Filed: January 16, 2013
    Publication date: July 17, 2014
    Applicant: Infineon Technologies AG
    Inventors: Ralf Otremba, Josef Hoeglauer, Juergen Schredl, Xaver Schloegel, Wolfram Hable, Manfred Mengel, Joachim Mahler, Khalil Hosseini, Franz-Peter Kalz
  • Patent number: 8779607
    Abstract: A method of manufacturing a device includes forming a covering layer having affinity for a filler to be injected into a space between a first base and a second base, on at least one of the opposing surfaces of the first base and the second base, and then injecting the filler into the space between the first base and the second base.
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: July 15, 2014
    Assignee: PS4 Luxco S.A.R.L.
    Inventor: Hiroyuki Ode
  • Patent number: 8771828
    Abstract: A sealing film which includes a resin layer having a flow within the range of 150 to 1800 ?m at 80° C., or having a resin layer with a viscosity within the range of 10000 to 100000 Pa·s in a B-stage state at 50 to 100° C. in thermosetting viscoelasticity measurement, and containing: (A) both (a1) a high-molecular-weight component including crosslinking functional groups and having a weight-average molecular weight of 100,000 or more and a Tg within the range of ?50 to 50° C., and (a2) a thermosetting component including an epoxy resin as a main component, (B) a filler having an average particle size within the range of 1 to 30 ?m, and (C) a colorant, as well as a manufacturing method thereof and a semiconductor device using the same.
    Type: Grant
    Filed: January 24, 2008
    Date of Patent: July 8, 2014
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Hiroyuki Kawakami, Katsuyasu Niijima, Naoki Tomori, Daichi Takemori, Takuya Imai
  • Patent number: 8766420
    Abstract: A semiconductor device is configured that two or more semiconductor elements are stacked and mount on a lead frame, the aforementioned lead frame is electrically joined to the semiconductor element with a wire, and the semiconductor element, the wire and an electric junction are encapsulated with a cured product of an epoxy resin composition for encapsulating semiconductor device, and that the epoxy resin composition for encapsulating semiconductor device contains (A) an epoxy resin; (B) a curing agent; and (C) an inorganic filler, and that the (C) inorganic filler contains particles having particle diameter of equal to or smaller than two-thirds of a thinnest filled thickness at a rate of equal to or higher than 99.9% by mass.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: July 1, 2014
    Assignee: Sumitomo Bakelite Co., Ltd.
    Inventor: Shingo Itoh
  • Patent number: 8766417
    Abstract: An integrated circuit chip includes a semiconductor substrate; a first interconnection wire having a first portion and a second portion on the semiconductor substrate, wherein the second portion is separated from the first portion; a second interconnection wire situated under the first interconnection wire; a first conductive via electrically coupling the first portion with the second interconnection wire; a conductive layer situated between the first interconnection wire and the second interconnection wire; and a second conductive via electrically coupling the conductive layer with the second portion.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: July 1, 2014
    Assignee: Mediatek Inc.
    Inventors: Chao-Chun Tu, Shih-Hung Lin, Chih-Chien Huang, Tien-Chang Chang
  • Patent number: 8749075
    Abstract: An integrated circuit is provided. The integrated circuit includes: a chip and encapsulation material covering at least three sides of the chip, the encapsulation material being formed from adhesive material. The integrated circuit includes a carrier adhered to the chip by means of the encapsulation material.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: June 10, 2014
    Assignee: Infineon Technologies AG
    Inventors: Joachim Mahler, Lukas Ossowski, Khalil Hosseini, Ivan Nikitin
  • Patent number: 8749076
    Abstract: The present invention relates to a resin paste composition including an organic compound, and a granular aluminum powder having an average particle diameter of from 2 to 10 ?m and a flake-shaped silver powder having an average particle diameter of from 1 to 5 ?m which are uniformly dispersed in the organic compound, and a semiconductor device manufactured by bonding a semiconductor element onto a supporting member through the resin paste composition and then encapsulating the resulting bonded product. According to the present invention, it is possible to provide a resin paste composition used for bonding an element such as semiconductor chips onto a lead frame which is excellent in not only electrical conductivity and bonding property but also working efficiency without using a large amount of rare and expensive silver, and a semiconductor device having a high productivity and a high reliability.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: June 10, 2014
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Chiaki Okada, Kazuhiko Yamada, Yukari Inoue
  • Patent number: 8710653
    Abstract: A semiconductor device, includes: a wiring substrate, a stacked body mounted on the wiring substrate, an underfill layer filled into gaps between respective semiconductor chips of the stacked body; and a molding body made up of a molding resin covered and formed at outside of the stacked body and so on. The underfill layer is made up of a cured product of a resin material containing an amine-based curing agent, and the cured product has a Tg of 65° C. or more and 100° C. or less.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: April 29, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masatoshi Fukuda, Hiroshi Watabe
  • Patent number: 8704223
    Abstract: A transistor of a characteristic checking element has a gate electrode connected to a measurement pad disposed in a dicing line and to an internal measurement pad disposed inside a semiconductor device. In a P/W process, a gate insulating film of the transistor is broken by an electric voltage applied via the internal measurement pad. Since the gate insulating film of the transistor is broken, a new current path is formed. Thus, measurement of accurate characteristics of the characteristic checking element is inhibited.
    Type: Grant
    Filed: January 8, 2008
    Date of Patent: April 22, 2014
    Inventors: Minoru Yamagami, Hisayuki Nagamine
  • Patent number: 8698262
    Abstract: The present invention provides a new type wireless chip that can be used without being fixed on a product. Specifically, a wireless chip can have a new function by a sealing step. One feature of a wireless chip according to the present invention is to have a structure in which an integrated circuit is sealed by films. In particular, the films sealing the integrated circuit have a hollow structure; therefore the wireless chip can have a new function.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: April 15, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya Tsurume, Koji Dairiki, Naoto Kusumoto
  • Patent number: 8692394
    Abstract: The present invention is aimed to provide an adhesive for bonding a semiconductor which has high transparency and facilitates recognition of a pattern or position indication on the occasion of semiconductor chip bonding. The present invention is an adhesive for bonding a semiconductor containing: an epoxy resin; an inorganic filler; and a curing agent, wherein the amount of the inorganic filler in the adhesive is 30 to 70% by weight, the inorganic filler contains a filler A having an average particle size of less than 0.1 ?m and a filler B having an average particle size of not less than 0.1 ?m and less than 1 ?m, and the weight ratio of the filler A to the filler B is 1/9 to 6/4. The present invention is an adhesive for bonding a semiconductor containing: an epoxy resin; an inorganic filler; and a curing agent, wherein difference in refractive index is not more than 0.1 between the epoxy resin and the inorganic filler.
    Type: Grant
    Filed: March 18, 2010
    Date of Patent: April 8, 2014
    Assignee: Sekisui Chemical Co., Ltd.
    Inventors: Yangsoo Lee, Sayaka Wakioka, Atsushi Nakayama, Carl Alvin Dilao
  • Patent number: 8680664
    Abstract: A structure for encapsulating at least one electronic device, including at least one first cavity bounded by a support and at least one cap provided on the support and wherein the electronic device is encapsulated, at least one aperture passing through the cap and communicating the inside of the first cavity with at least one portion of getter material provided in at least one second cavity which is arranged on the support and adjacent to the first cavity, at least one part of said portion of getter material being provided on the support or against at least one outer side wall of the first cavity, the first cavity and the second cavity forming together a hermetically sealed volume.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: March 25, 2014
    Assignee: Commissariat à l′énergie atomique et aux énergies alternatives
    Inventors: Jean-Louis Pornin, Geoffroy Dumont