Abstract: A resin composition for semiconductor encapsulation having good moldability, of which the cured product has effective electromagnetic wave shieldability, is provided. A resin composition for semiconductor encapsulation, containing spherical sintered ferrite particles having the following properties (a) to (c) : (a) the soluble ion content of the particles is at most 5 ppm; (b) the mean particle size of the particles is from 10 to 50 ?m; (c) the crystal structure of the particles by X-ray diffractiometry is a spinel structure.

Abstract: A method for fabricating and back-end-of-line (BEOL) metalization structures includes simultaneous high-k and low-k dielectric regions. An interconnect structure includes a first inter-level dielectric (ILD) layer and a second ILD layer with the first ILD layer underlying the second ILD layer. A plurality of columnar air gaps is formed in the first ILD. The columnar air gap structure is created using a two-phase photoresist material for providing different etching selectivity during subsequent processing.

Abstract: A flip-chip type semiconductor device includes a semiconductor substrate. A plurality of electrode terminals are provided and arranged on a top surface of the semiconductor substrate, a sealing resin layer is formed on the top surface of the semiconductor substrate such that the electrode terminals are completely covered with the sealing resin layer.

Abstract: A semiconductor device 100 has a BGA substrate 110, a semiconductor chip 101, a bump 106 and an underfill 108 filling the periphery of the bump. An interlayer dielectric 104 in the semiconductor chip 101 contains a low dielectric constant film. The bump 106 is comprised of a lead-free solder. The underfill 108 is comprised of a resin material having an elastic modulus of 150 MPa to 800 MPa both inclusive, and a linear expansion coefficient of the BGA substrate 110 in an in-plane direction of the substrate is less than 14 ppm/° C.

Abstract: A semiconductor device with a plastic housing composition includes a semiconductor chip and an internal wiring. The plastic housing composition is electrically conductive and electrically connected to a first contact pad of the internal wiring. A first side of the semiconductor chip is electrically insulated from the plastic housing composition by an insulation layer.

Abstract: A multi-chip package system is provided including providing a first carrier having a first integrated circuit die thereover, providing a second carrier, placing the first carrier coplanar with the second carrier, and molding a package encapsulation around and exposing the first carrier.

Abstract: Embodiments of the invention provide a first component with a compliant interconnect bonded to a second component with a land pad by a metal to metal bond. In some embodiments, the first component may be a microprocessor die and the second component a package substrate.

Abstract: Embodiments of buffer coatings for semiconductor and integrated circuit manufacturing are presented herein, wherein the buffer coating is provided by mechanically blending a first polymer with at least a second polymer. The mechanically blended polymers producing a buffer coating that provides a barrier that is has an increased toughness and decreased shrinkage.

Abstract: A semiconductor device includes: a semiconductor chip mounted on a mounting substrate; a first resin filling a gap between the chip and the substrate; a frame-shaped stiffener surrounding the chip; a first adhesive for bonding the stiffener to the substrate; a lid for covering the stiffener and an area surrounded by the stiffener; and a second resin filling a space between the stiffener and the chip. A thermal expansion coefficient of the second resin is smaller than that of the first resin. The first resin includes an underfill part filling a gap between the chip and the substrate and a fillet part extended from the chip region.

Abstract: An epoxy resin composition for encapsulating semiconductors containing an epoxy resin, a phenol resin, an inorganic filler, a curing accelerator, a glycerol tri-fatty acid ester produced by dehydration condensation reaction of glycerol and a saturated fatty acid with a carbon atom content of 24-36, and a hydrotalcite compound as essential components is provided. The resin composition exhibits excellent mold releasability and produces only a slight amount of stains on the surfaces of the mold and semiconductor packages. A semiconductor device exhibiting excellent solder resistance is also provided.

Abstract: In one embodiment, the present invention includes a semiconductor package with lossy material inserts. The lossy material inserts may reduce electronic noise such as package resonance. Other embodiments are described and claimed.

Abstract: A semiconductor module is disclosed. One embodiment provides a first semiconductor chip, a second semiconductor chip and a spacer. The first semiconductor chip has a depression at a first main surface. The spacer applied to the first main surface and at least partly fills the depression. The second semiconductor chip is applied to the spacer.

Abstract: An embodiment of a semiconductor device includes a supporting member, a semiconductor die mounted on a portion of the supporting member, a buffer region, and a plastic encapsulation. The buffer region covers a portion of the die, and includes a resin and filler particles packed within the resin. The filler particles have a mix of filler sizes and are tightly packed within the resin. The buffer region has a first dielectric constant and a first loss tangent. The plastic encapsulation encloses at least part of the supporting member and the die. The plastic encapsulation includes a plastic material of a second dielectric constant and a second loss tangent, where the second dielectric constant is larger than the first dielectric constant and the second loss tangent is larger than the first loss tangent.

Abstract: Better semiconductor encapsulation is achieved with a liquid epoxy resin composition comprising (A) a liquid epoxy resin, (B) a curing agent containing at least 5 wt % of an aromatic amine compound, (C) a microencapsulated catalyst containing a phenolic hydroxy-bearing benzoic acid derivative, and optionally, (D) an inorganic filler.

Abstract: A chip is bonded on a circuit board by aligning in position bumps with board electrodes with interposition of an anisotropic conductive layer between the chip and the circuit board. The anisotropic conductive layer is a mixture of an insulating resin, conductive particles and an inorganic filler. The chip is pressed against the board with a pressure force of not smaller than 20 gf per bump by virtue of a tool, while warp of the chip and the board is connected, the bumps are compressed, and the insulating resin is hardened.

Abstract: A sealed microelectronic structure which provides mechanical stress endurance and includes at least two chips being electrically connected to a semiconductor structure at a plurality of locations. Each chip includes a continuous bonding material along it's perimeter and at least one support column connected to each of the chips positioned within the perimeter of each chip. Each support column extends outwardly such that when the at least two chips are positioned over one another the support columns are in mating relation to each other. A seal between the at least two chips results from the overlapping relation of the chip to one another such that the bonding material and support columns are in mating relation to each other. Thus, the seal is formed when the at least two chips are mated together, and results in a bonded chip structure.

Abstract: An ultra-thin semiconductor chip of an FeRAM, which is miniaturized and highly integrated with characteristic degradation of a ferroelectric capacitor suppressed though a thin package structure is applied to the FeRAM is realized. The semiconductor chip is molded up by using a sealing resin with a filler content set at a value in a range of 90 weight % to 93 weight % to produce a package structure.

Abstract: A microelectronic device includes a die having an active surface and a non-active surface. To assemble the microelectronic device, the active surface of the die is placed on a substrate. A first material is dispensed between the active surface of the die and the substrate. A second material is dispensed on at least a portion of the non-active surface of the die. The second material is different than the first material and the first material and the second material are simultaneously cured.

Abstract: An epoxy resin molding material for sealing which comprises an epoxy resin, an epoxy resin curing agent, and a pitch, as well as an electronic component comprising an element that is sealed with the molding material. This molding material exhibits favorable coloring properties, and even when used in packages with narrow distances between pads or wires, shorting defects caused by conductive materials can be prevented, as the molding material contains no conductive carbon black.

Abstract: A semiconductor device in which chips are resin-molded, including: frames having front and back surfaces and die pads; power chips mounted on the surfaces of the die pads; an insulation resin sheet having a first and a second surfaces which are opposed against each other, the resin sheet being disposed such that the back surfaces of the die pads contact the first surface of the resin sheet; and a mold resin applied on the first surface of the resin sheet so as to seal up the power chips. The thermal conductivity of the resin sheet is larger than that of the mold resin.

Abstract: An epoxy resin composition for semiconductor encapsulation includes at least one epoxy resin, at least one curing agent, at least one filler, and at least one first curing accelerator, the first curing accelerator having a tetracyanoethylene, a 7,7,8,8-tetracyanoquinodimethane, a compound having the chemical structure of Formula 1, or a mixture thereof, wherein each of R1 through R7, independently, represents a hydrogen atom or a C1-C12 hydrocarbon group, provided that when R1 through R7 are C1-C12 hydrocarbon groups, R1 and R2, R2 and R3, R3 and R4, R4 and R5, R5 and R6, and R6 and R7 can be joined to each other to form a cyclic structure.

Abstract: A board 1 according to the present invention includes a board main body 3; electronic parts 5 electrically connected to and mounted on the board main body 3; and an under-fill material 19 with which a part between the board main body 3 and a surface of the electronic parts 5 electrically connected to the board main body is filled. A hole 21 passing through a layer 19a of the under-fill material that flows outside from a connecting area of the electronic parts 5 and the board main body 3 is provided for electrically connecting other parts to the board main body.

Abstract: A design methodology reduces electromigration in integrated circuit joints such as flip-chip bumps by seeking to produce a more uniform current distribution at the interface between the integrated circuit pad and the joint while maintaining an interface form that coincides with standard integrated circuit designs is presented. The design methodology addresses the current distribution at the pad by dividing current carrying traces into a plurality of sub-traces with known resistances such that each sub-trace distributes a known amount of current to the pad of the integrated circuit. The multiple sub-traces connect to the pad and are placed to obtain a desired uniformity in the incoming current distribution. Width and/or length adjustments could be made to each of the plurality of sub-traces to obtain the desired resistances.

Abstract: An electrical component is placed on a substrate. At least one film comprising a plastic material is connected to the component and to the substrate in such a way that a surface contour defined by the component and the substrate is represent is represented in a surface contour of the part of the film. Said film is laminated onto the component and the substrate in such a way that the film follows the topology of the arrangement consisting of the component and the substrate. Said film is in contact with the component and the substrate in a positive and non-positive manner, and comprises a composite material containing a filler that is different to the plastic material. The processability and electrical properties of the film are influenced by the filler or the composite material obtained thereby. In this way, other functions can be integrated into the film. Said component is, for example, a power semiconductor component. An electrically insulating and thermoconductive film is used, for example.

Abstract: A semiconductor package including a substrate with a semiconductor device mounted on the substrate and a resin member sealing the substrate and semiconductor device. The resin member includes a first surface and a second surface located on the other side of the first surface and a plurality of leads electrically connected with the semiconductor device. The leads project from the resin member and extend to the second surface side; wherein the second surface of the resin member includes a first area having a first concave portion and a second area having a second concave portion which is different from the first area, and the second concave portion is deeper than the first concave portion.

Abstract: In some embodiments, a method includes providing a composition which includes a base at least partially filled with filler particles and applying the composition as an underfill composition. At least some of the filler particles are electrically conductive.

Abstract: A high power, wide-bandgap device is disclosed that exhibits reduced junction temperature and higher power density during operation and improved reliability at a rated power density. The device includes a diamond substrate for providing a heat sink with a thermal conductivity greater than silicon carbide, a single crystal silicon carbide layer on the diamond substrate for providing a supporting crystal lattice match for wide-bandgap material structures that is better than the crystal lattice match of diamond, and a Group III nitride heterostructure on the single crystal silicon carbide layer for providing device characteristics.

Abstract: There is provided an epoxy resin composition for semiconductor encapsulating use comprising: an epoxy resin (A); a phenol resin (B); a curing accelerator (C); and an inorganic filler (D), wherein the inorganic filler (D) contains a spherical fused silica (d1) which contains: metal or semimetal other than silicon; and/or an inorganic compound comprising the metal or semimetal other than silicon.

Abstract: A process for manufacturing a semiconductor device that inhibits deterioration in the quality of the semiconductor device and a semiconductor device manufactured on such manufacturing process are presented. An operation of determining time-variation of water content in the resin substrate 11 (processing S1); an operation of coupling the semiconductor element 12 onto the resin substrate 11 through a plurality of electroconductive bumps B (processing S3); a first heating operation for controlling a water content of the resin substrate 11 to equal to or lower than 0.02% by heating said resin substrate and said semiconductor element while maintaining the coupling through said bumps (processing S6); and a first heating operation for controlling a water content of the resin substrate 11 to equal to or lower than 0.

Abstract: Inorganic-based nanoparticles, such as nanoparticles based on silicon dioxide, are used in order to produce protective layers for semiconductor chips having scratch-resistant properties. The nanoparticles are preferably processed to form a sol, which is applied onto the semiconductor chips to be coated and subsequently converted by sintering into the protective layer.

Abstract: A stencil and method for depositing a coupon of underfill material onto a substrate that is to receive an integrated circuit die.

Abstract: A semiconductor photodetector which can achieve spectral sensitivity characteristics close to relative luminous characteristics at low cost while using a light receiving element of a semiconductor made from such as silicon, has a semiconductor light receiving element having high spectral sensitivity in a wavelength range between approximately 400 nm to 1100 nm and an optical transmitting resin for sealing at least a light receiving surface of the semiconductor light receiving element. The optical transmitting resin is formed by dispersing metal boride micro particles whose particle diameter is not more than approximately 100 nm in a transparent resin and blocks light in wavelengths approximately 700 nm or above.

Abstract: A high frequency IC package mainly includes a substrate, a bumped chip, and a plurality of conductive fillers where the substrate has a plurality of bump holes penetrating from the top surface to the bottom surface. The active surface of the chip is attached to the top surface of the substrate in a manner that the bumps are inserted into the bump holes respectively. The conductive fillers are formed in the bump holes to electrically connect the bumps to the circuit layer of the substrate. The high frequency IC package has a shorter electrical path and a thinner package thickness.

Abstract: A semiconductor device includes a base member made of a material containing at least a thermosetting resin, and at least one semiconductor constructing body mounted on the base member, and having a semiconductor substrate and a plurality of external connecting electrodes formed on the semiconductor substrate. An insulating layer is formed on the base member around the semiconductor constructing body. An interconnection of at least one layer is formed on one sides of the semiconductor constructing body and insulating layer, electrically connected to the external connecting electrode of the semiconductor constructing body, and having a connecting pad portion, the semiconductor substrate is fixed to the base member by fixing force of the base member.

Abstract: Polymerized materials for forming the underfill and encapsulation structures for semiconductor package are disclosed. A filler constituent, such as boron nitride, silicates, elemental metals, or alloys, may be added to a liquid photopolymer resin to tailor the physical properties thereof upon curing. The filler constituents may be employed to alter the coefficient of thermal expansion, thermal conductivity, or electrical conductivity of the polymerized material. A number of different embodiments are disclosed that employ the above materials in selected regions of the underfill and encapsulation structures of the semiconductor package. The polymerized materials may also be used to form support structures and covers for optically interactive semiconductor devices. Methods for forming the above structures using stereolithography are also disclosed.

Abstract: A method of making chip assemblies includes providing an in-process assembly including a semiconductor wafer, a wafer compliant structure overlying a front surface of the wafer and cavities, and terminals carried on the compliant structure adjacent the cavities and electrically connected to the wafer, the cavities being substantially sealed. The method includes subdividing the in-process assembly to form individual chip assemblies, each including one or more chip regions of the wafer, a portion of the compliant structure and the terminals carried on the portion, and opening vents communicating with said cavities after said providing step.

Abstract: In one embodiment the present invention includes a method of manufacturing a chip scale package. Embodiments of the present invention include sawing kerfs between semiconductor device boundaries on opposite sides of the wafer and filling the kerfs with mold compound. The devices may then be sawed into individual packaged devices encapsulated in mold compound. In one embodiment, kerfs on opposite sides of the wafer have different widths to create a step in the wafer boundary with the mold compound, which improves the integrity of the package. In one embodiment, a device and one or more neighboring devices are bonded together using bond wires to form a group of device that are encapsulated in mold compound.

Abstract: A micro surface mount die package is described that includes a die attach pad having a plurality of integrally formed risers. A bumped die is mounted on the die attach pad such that the risers are located to the side of the die and the contact bumps face away from the die attach pad. An encapsulant covers the active and side surfaces of the die while leaving the contact bumps exposed on the packaged semiconductor device. Methods for forming such packages and panels suitable for use in forming such packages are also described.

Abstract: A flame retardant featuring: an inorganic porous fine particle, a phosphazene compound represented by the following average compositional formula (1) (X is a single bond, CH2, C(CH3)2, SO2, S, 0, or O(CO)O; n is an integer of from 3 to 1000; d and e are numbers with 2d+e=2n), and a resin layer. The phosphazene compound is supported on the inorganic porous fine particle, and the resin layer coats the inorganic porous fine particle with the phosphazene compound supported thereon. The resin layer thermally decomposes to lose weight by 10% at a temperature of from 300° C. to 500° C., as measured by thermogravimetry in the air at a heating rate of 10° C./min.

Abstract: A semiconductor device includes: a substrate; a semiconductor element mounted on the substrate; a sealing structure for sealing the semiconductor element, the sealing structure being mounted on the substrate; and an adhesive for bonding the sealing structure and the substrate, wherein the sealing structure has a groove for storing the adhesive.

Abstract: Various semiconductor chip underfills and methods of making the same are provided. In one aspect, a method of manufacturing is provided that includes coupling a semiconductor chip to a substrate to leave a gap therebetween, and forming an underfill layer in the gap. The underfill layer includes a first plurality of filler particles that have a first average size and a second plurality of filler particles that have a second average size smaller than the first average size such that the first plurality of filler particles is concentrated proximate the substrate and the second plurality of filler particles is concentrated proximate the semiconductor chip so that a bulk modulus of the underfill layer is larger proximate the substrate than proximate the semiconductor chip.

Abstract: A semiconductor apparatus includes a substrate and elements or semiconductor chips provided on the substrate. The elements are sealed by being brought into contact with a sealing compound. The surface of contact on the elements or the sealing compound is plasma treated. The semiconductor chip is adhesively attached to another semiconductor chip via an adhesive compound. The surface of the semiconductor chip in contact with the adhesive compound is plasma treated.

Abstract: A semiconductor package includes an SOI wafer having a first side including an integrated circuit system, and a second side, opposite the first side, forming at least one cavity. At least one chip or component is placed in the cavity. An optical through via is formed through a buried oxide which optically connects the chip(s) to the integrated circuit system.

Abstract: A polymer composition having high thermal conductivity and dielectric strength is provided. The polymer composition comprises a base polymer matrix and a thermally-conductive, electrically-insulating material. A reinforcing material such as glass can be added to the composition. The polymer composition can be molded into packaging assemblies for electronic devices such as capacitors, transistors, and resistors.

Abstract: The present invention relates to an electronic module having a layer of adhesive between metallic surfaces of components of the module. The metallic surfaces are arranged facing one another. The adhesive of the layer of adhesive includes agglomerates of nanoparticles, which form paths, surrounded by an adhesive base composition, in the adhesive base composition. Furthermore, the invention relates to a process for producing the module.

Abstract: An exemplary manufacturing method of an inter-metal dielectric of a semiconductor device according to an embodiment of the present invention includes forming a first silicon-rich oxide (SRO) layer on a silicon substrate provided with or otherwise having a copper line layer therein, forming a plasma enhanced fluorosilicate glass (PEFSG) layer on the first SRO layer, plasma-treating the PEFSG layer, and forming a second SRO layer on the plasma-treated PEFSG layer. According to the present invention, the thickness of the second SRO layer of the inter-metal dielectric can be reduced. Consequently, process cost can be reduced, and the total thickness of the inter-metal dielectric can be reduced so as to lower the dielectric constant thereof, reduce the aspect ratio of any via holes that are subsequently formed in the inter-metal dielectric, and potentially increase the yield as a result of the reduced via hole aspect ratio.

Abstract: Structure and method are provided for plastic encapsulated semiconductor devices having reduced package cross-talk and loss. Semiconductor die are first coated with a buffer region having a lower dielectric constant ? and/or lower loss tangent ? than the plastic encapsulation. The encapsulation surrounds the buffer region providing a solid structure. The lower ? buffer region reduces the stray capacitance and therefore the cross-talk between electrodes on or coupled to the die. The lower ? buffer region reduces the parasitic loss in the encapsulation. Low ? and/or ? buffer regions can be achieved using low density organic and/or inorganic materials. Another way is to disperse hollow microspheres or other fillers in the buffer region. An optional sealing layer formed between the buffer region and the encapsulation can mitigate any buffer layer porosity. The buffer region desirably has ? less than about 3.0 and/or ? less than about 0.005.

Abstract: In an epoxy resin composition comprising (A) an epoxy resin, (B) a curing agent, (C) an inorganic compound, and (D) an inorganic filler, the inorganic compound (C) is an oxide of metal elements at least one of which is a metal element of Group II in the Periodic Table having a second ionization potential of up to 20 eV, typically Zn2SiO4, ZnCrO4, ZnFeO4 or ZnMoO4. When used for semiconductor encapsulation, the epoxy resin composition is highly reliable and cures into a product which is effective for minimizing electrical failure such as defective insulation due to a copper migration phenomenon.

Abstract: A molding composition suitable for encapsulating solid state devices includes an epoxy resin, a hardener, a poly(arylene ether) resin comprising less than 5 weight percent of particles greater than 100 micrometers, and about 70 to about 95 weight percent of a silica filler, based on the total weight of the composition. After curing, the composition exhibits improved increased copper adhesion and reduced shrinkage compared to conventional molding compositions.

Abstract: A semiconductor light-emitting device having a semiconductor light-emitting chip; a high refractive index lens covering around the semiconductor light-emitting chip; and a resin having fine particles mixed therein that fills a space between the semiconductor light-emitting chip and the lens is provided. In the semiconductor light emitting device, the resin having fine particles mixed therein is composed of an optically transparent resin into which a large number of high refractive fine particles having a mean diameter of 100 nm or less and composed of a dielectric material are mixed uniformly to have a distance 200 nm or less between respective particles.