Plural Heterojunctions In Same Device Patents (Class 257/96)
  • Patent number: 7951624
    Abstract: A method of manufacturing light emitting diode has steps of providing a package base, providing a light emitting structure and bonding the light emitting structure on the package base. The package base has a first metal layer and a second metal layer respectively formed on a top and a bottom thereon. The light emitting structure has a substrate, a light emitting lamination and a reflective metal layer. The light emitting lamination is formed on the substrate and has an n-type semiconductor layer, a light emitting layer, a p-type semiconductor layer and a transparent electrode layer deposited on the substrate in sequence. The reflective metal layer is formed on a bottom of the substrate. The first metal layer is connected to the reflective metal layer by an ultrasonic thermal press technique. Therefore, the thermal resistance of the finished LED reduces.
    Type: Grant
    Filed: January 15, 2009
    Date of Patent: May 31, 2011
    Assignee: He Shan Lide Electronic Enterprise Company Ltd.
    Inventors: Ben Fan, Hsin-Chuan Weng, Kuo-Kuang Yeh
  • Patent number: 7951307
    Abstract: An oxynitride phosphor consisting of a crystal containing at least one or more of Group II elements selected from the group consisting of Be, Mg, Ca, Sr, Ba and Zn, at least one or more of Group IV elements selected from the group consisting of C, Si, Ge, Sn, Ti, Zr and Hf, and a rare earth element being an activator R, thereby providing a phosphor which is excited by an excitation light source at an ultraviolet to visible light region and which has a blue green to yellow luminescence color that is wavelength converted.
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: May 31, 2011
    Assignee: Nichia Corporation
    Inventors: Hiroto Tamaki, Suguru Takashima, Masatoshi Kameshima, Takahiro Naitou
  • Patent number: 7952109
    Abstract: An apparatus comprising a structure comprising a group III-nitride and a junction between n-type and p-type group III-nitride therein, the structure having a pyramidal shape or a wedge shape.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: May 31, 2011
    Assignee: Alcatel-Lucent USA Inc.
    Inventor: Hock Min Ng
  • Patent number: 7943943
    Abstract: To provide a light-emitting device using a nitride semiconductor which can attain high-power light emission by highly efficient light emission and a manufacturing method thereof, the light-emitting device includes a GaN substrate and a light-emitting layer including an InAlGaN quaternary alloy on a side of a first main surface of GaN substrate.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: May 17, 2011
    Assignees: Sumitomo Electric Industries, Ltd., RIKEN
    Inventors: Hideki Hirayama, Katsushi Akita, Takao Nakamura
  • Patent number: 7939833
    Abstract: There is provided a nitride semiconductor light emitting device having high internal quantum efficiency by accelerating recombination radiation while employing a multiple quantum well structure in which each of well layers has a relatively large thickness. The nitride semiconductor light emitting device is provided with a nitride semiconductor lamination portion (6) provided on a substrate (1). The nitride semiconductor lamination portion (6) includes at least an active layer (4) in which a light emitting portion is formed. And the active layer is constituted with a multiple quantum well structure formed by laminating well layers (7) made of InxGa1-xN (0<x?1), and barrier layers (8) made of AlyInzGa1-y-zN (0?y<1, 0?z<1, 0?y+z<1, z<x) alternately.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: May 10, 2011
    Assignee: Rohm Co., Ltd.
    Inventor: Yukio Shakuda
  • Patent number: 7935973
    Abstract: The light-emitting diode is a light-emitting diode including a light-converting material substrate and a semiconductor layer formed on the light-converting material substrate, wherein the light-converting material substrate includes a solidified body in which at least two or more oxide phases selected from a simple oxide and a complex oxide are formed continuously and three-dimensionally entangled with each other, at least one oxide phase in the solidified body comprises a metal element capable of emitting fluorescence, and the semiconductor layer includes a plurality of compound semiconductor layers and has at least a light-emitting layer capable of emitting visible light.
    Type: Grant
    Filed: October 20, 2005
    Date of Patent: May 3, 2011
    Assignee: Ube Industries, Ltd.
    Inventors: Atsuyuki Mitani, Shin-ichi Sakata, Itsuhiro Fujii
  • Patent number: 7935974
    Abstract: The invention relates to a monolithic white light emitting device using wafer bonding or metal bonding. In the invention, a conductive submount substrate is provided. A first light emitter is bonded onto the conductive submount substrate by a metal layer. In the first light emitter, a p-type nitride semiconductor layer, a first active layer, an n-type nitride semiconductor layer and a conductive substrate are stacked sequentially from bottom to top. In addition, a second light emitter is formed on a partial area of the conductive substrate. In the second light emitter, a p-type AlGaInP-based semiconductor layer, an active layer and an n-type AlGaInP-based semiconductor layer are stacked sequentially from bottom to top. Further, a p-electrode is formed on an underside of the conductive submount substrate and an n-electrode is formed on a top surface of the n-type AlGaInP-based semiconductor layer.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: May 3, 2011
    Assignee: Samsung LED Co., Ltd.
    Inventors: Min Ho Kim, Masayoshi Koike, Kyeong Ik Min, Myong Soo Cho
  • Publication number: 20110095265
    Abstract: A nitride semiconductor light emitting device is provided with a substrate, an n-type nitride semiconductor layer, a p-type nitride semiconductor layer, an n-side pad electrode, a translucent electrode and a p-side pad electrode, wherein the translucent electrode is formed from an electrically conductive oxide, the n-side pad electrode adjoins the periphery of the translucent electrode and the p-side pad electrode is disposed so as to satisfy the following relationships: 0.3L?X?0.5L and 0.2L?Y?0.5L where X is the distance between ends of the p-side pad electrode and the n-side pad electrode, Y is the distance between the end of the p-side pad electrode and the periphery of the translucent electrode, L is the length of the translucent electrode on the line connecting the centroids of the p-side pad electrode and the n-side pad electrode minus the outer diameter d of the p-side pad electrode.
    Type: Application
    Filed: January 3, 2011
    Publication date: April 28, 2011
    Applicant: NICHIA CORPORATION
    Inventors: Takahiko SAKAMOTO, Yasutaka Hamaguchi
  • Patent number: 7932526
    Abstract: An LED semiconductor body comprising a first radiation-generating active layer and a second radiation-generating active layer, the first active layer and the second active layer being arranged one above another in the vertical direction.
    Type: Grant
    Filed: December 13, 2006
    Date of Patent: April 26, 2011
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Reiner Windisch, Günther Grönninger, Peter Heidborn, Christian Jung, Walter Wegleiter
  • Patent number: 7928453
    Abstract: An end face emission type semiconductor light emitting device which include: a substrate; a first conductive type clad layer stacked on the substrate; an active region layer including an active layer stacked on the first conductive type clad layer; a second conductive type clad layer stacked on the active region layer such that a thickness of a portion thereof at least over an emission region of the active region layer in an emission end face adjacent area is thinner than a thickness of the other portion; and a second conductive type regrowth layer stacked on the second conductive type clad layer, which has a higher refractive index than the second conductive type clad layer.
    Type: Grant
    Filed: September 17, 2008
    Date of Patent: April 19, 2011
    Assignee: Fujifilm Corporation
    Inventor: Tsuyoshi Ohgoh
  • Patent number: 7928448
    Abstract: A semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region is grown over a porous III-nitride region. A III-nitride layer comprising InN is disposed between the light emitting layer and the porous III-nitride region. Since the III-nitride layer comprising InN is grown on the porous region, the III-nitride layer comprising InN may be at least partially relaxed, i.e. the III-nitride layer comprising InN may have an in-plane lattice constant larger than an in-plane lattice constant of a conventional GaN layer grown on sapphire.
    Type: Grant
    Filed: December 4, 2007
    Date of Patent: April 19, 2011
    Inventors: Jonathan J. Wierer, Jr., John E. Epler
  • Patent number: 7927512
    Abstract: A light emitting device includes a light emitting element 1 that has a light emission peak wavelength in a range from 300 nm to 530 nm, and a phosphor 2 that absorbs light from the light emitting element 1 and converts the wavelength of the light to emit light with a light emission peak wavelength different from the light emitting element. The phosphor is represented by the general formula M15?xEuxM2mM3nO2m+(3/2)n+5 where x, m and n fall within ranges 0.0001?x?0.3, 1.0?m?2.5 and 0?n?2.5, M1 is at least one element selected from the group consisting of Mg, Ca, Sr, Ba and Zn, M2 is at least one element selected from the group consisting of Si, Ge and Sn, and M3 is at least one element selected from the group consisting of B, Al, Ga, In and rare earth elements.
    Type: Grant
    Filed: August 3, 2006
    Date of Patent: April 19, 2011
    Assignee: Nichia Corporation
    Inventors: Yoshinori Murazaki, Yoshiki Sato
  • Patent number: 7915605
    Abstract: LED packaged structures and applications thereof are disclosed, characterized in that: an active layer in the LED or the LED packaged structure is formed on a first semiconductor conductive layer with multi-quantum wells; and a second semiconductor conductive layer is formed on the active layer; wherein a plurality of particles formed by at least one hetero-material are scattered between the first semiconductor conductive layer and the active layer in order to form an uneven multi-quantum well.
    Type: Grant
    Filed: November 21, 2007
    Date of Patent: March 29, 2011
    Assignee: HUGA Optotech Inc.
    Inventors: Tzong-Liang Tsai, Chih-Ching Cheng
  • Patent number: 7915623
    Abstract: A light emitting diode array in which, when viewed from the above, the shape of an almost square light emitting diode is square-chamfered or round-chamfered at the corners thereof in order to minimize light leakage at a reverse mesa surface to allow an electrode layer to surround the three directions of a light emitting unit, and part in the vicinity of the corner of the reverse mesa surface is extended up to a substrate unit to cover it. Accordingly, the light emitting diode array minimized in light leakage at the reverse mesa surface can be provided.
    Type: Grant
    Filed: March 18, 2005
    Date of Patent: March 29, 2011
    Assignees: Sanyo Electric Co., Ltd., Tottori Sanyo Electric Co., Ltd.
    Inventors: Hironori Yamamoto, Hajime Kimachi
  • Patent number: 7915636
    Abstract: The present disclosure relates to a III-nitride semiconductor light emitting device which improves external quantum efficiency by using a p-type nitride semiconductor layer with a rough surface, the p-type nitride semiconductor layer including: a first nitride semiconductor layer with a first doping concentration, a second nitride semiconductor layer with a second doping concentration lower than the first doping concentration and with the rough surface, and a third nitride semiconductor layer with a higher doping concentration than a second doping concentration.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: March 29, 2011
    Assignee: Epivalley Co., Ltd.
    Inventor: Chang Myung Lee
  • Patent number: 7915625
    Abstract: Disclosed herein is a semiconductor light emitting device including: a light emitting part formed of a multilayer structure arising from sequential stacking of a first compound semiconductor layer, an active layer, and a second compound semiconductor layer; a current block layer; and a burying layer, wherein a planar shape of the active layer is a strip shape in which a width of a center part is smaller than a width of both end parts, the current block layer is composed of third and fourth compound semiconductor layers, the burying layer is formed of a multilayer structure arising from sequential stacking of a first burying layer and a second burying layer, and an impurity for causing the second burying layer is such that a substitution site of the impurity in the second burying layer does not compete with a substitution site of an impurity in the third compound semiconductor layer.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: March 29, 2011
    Assignee: Sony Corporation
    Inventors: Sachio Karino, Eiji Takase, Makoto Oogane, Tsuyoshi Nagatake, Michiru Kamada, Hironobu Narui, Nobukata Okano
  • Patent number: 7910915
    Abstract: A radiation-emitting device includes a nanowire that is structurally and electrically coupled to a first electrode and a second electrode. The nanowire includes a double-heterostructure semiconductor device configured to emit electromagnetic radiation when a voltage is applied between the electrodes. A device includes a nanowire having an active longitudinal segment selectively disposed at a predetermined location within a resonant cavity that is configured to resonate at least one wavelength of electromagnetic radiation emitted by the segment within a range extending from about 300 nanometers to about 2,000 nanometers. Active nanoparticles are precisely positioned in resonant cavities by growing segments of nanowires at known growth rates for selected amounts of time.
    Type: Grant
    Filed: October 23, 2008
    Date of Patent: March 22, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Theodore I Kamins, Philip J Kuekes, Stanley Williams
  • Patent number: 7910937
    Abstract: A method and structure for fabricating III-V nitride layers on silicon substrates includes a substrate, a transition structure having AlGaN, AlN and GaN layers, and a superlattice structure having AlGaN and GaN layers. In the invention, the large lattice mismatch (17%) between GaN and silicon is solved by using AlN as the first buffer layer with a 5:4 coincidence between AlN(0001) and Si(111) lattice to reduce the lattice mismatch to 1.3%.
    Type: Grant
    Filed: February 1, 2006
    Date of Patent: March 22, 2011
    Assignee: Agency for Science, Technology and Research
    Inventors: Peng Chen, Soo Jin Chua, Zhonglin Miao, Sudhiranjan Tripathy
  • Patent number: 7906785
    Abstract: A vertical nitride semiconductor light emitting device and a manufacturing method thereof are provided. In the device, an ohmic contact layer, a p-type nitride semiconductor layer, an active layer, an n-type nitride semiconductor layer and an n-electrode are sequentially formed on a conductive substrate. At least one of a surface of the p-type nitride semiconductor layer contacting the ohmic contact layer and a surface of the n-type nitride layer contacting the n-electrode has a high resistance area of damaged nitride single crystal in a substantially central portion thereof. The high resistance area has a Schottky junction with at least one of the ohmic contact layer and the n-electrode.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: March 15, 2011
    Assignee: Samsung LED Co., Ltd.
    Inventors: Doo Go Baik, Bang Won Oh, Tae Jun Kim
  • Patent number: 7906787
    Abstract: The present invention relates to a nitride micro light emitting diode (LED) with high brightness and a method of manufacturing the same. The present invention provides a nitride micro LED with high brightness and a method of manufacturing the same, wherein a plurality of micro-sized luminous pillars 10 are formed in a substrates, a gap filling material such as SiO2, Si3N4, DBR(ZrO2/SiO2HfO2/SiO2), polyamide or the like is filled in gaps between the micro-sized luminous pillars, a top surface 11 of the luminous pillar array and the gap filling material is planarized through a CMP processing, and then a transparent electrode 6 having a large area is formed thereon, so that all the luminous pillars can be driven at the same time. In addition, the present invention provides a nitride micro LED with high brightness in which uniformity in formation of electrodes on the micro-sized luminous pillars array is enhanced by employing a flip-chip structure.
    Type: Grant
    Filed: August 21, 2009
    Date of Patent: March 15, 2011
    Inventor: Sang-Kyu Kang
  • Publication number: 20110049543
    Abstract: Provides is a semiconductor light-emitting device. The semiconductor light-emitting device includes a first conduction-type cladding layer, an active layer, and a second conduction-type cladding layer, on a substrate. Portions of the substrate and the first conduction-type cladding layer are removed. According to the light-emitting device having the above-construction, damage to a grown epitaxial layer is reduced, and a size of an active layer increases, so that a light-emission efficiency increases. Even when a size of a light-emitting device is small, a short-circuit occurring between electrodes can be prevented. Further, brightness and reliability of the light-emitting device are improved.
    Type: Application
    Filed: November 9, 2010
    Publication date: March 3, 2011
    Inventor: Kyong Jun KIM
  • Patent number: 7897422
    Abstract: A new structure of a semiconductor optical device and a method to produce the device are disclosed. One embodiment of the optical device of the invention provides a blocking region including, from the side close to the mesa, a p-type first layer and a p-type second layer. The first layer is co-doped with an n-type impurity and a p-type impurity. The doping concentration of the p-type impurity in the first layer is smaller than that in the second layer, so, the first layer performs a function of a buffer layer for the Zn diffusion from the second layer to the active layer in the mesa structure.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: March 1, 2011
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Kenji Hiratsuka
  • Patent number: 7893443
    Abstract: Disclosed herein is a nitride-based semiconductor light-emitting device. The nitride-based semiconductor light-emitting device comprises an n-type clad layer made of n-type Alx1Iny1Ga(1-x1-y1)N (where 0?x1?1, 0?y1?1, and 0?x1+y1?1), a multiple quantum well-structured active layer made of undoped InAGa1-AN (where 0<A<1) formed on the n-type clad layer, and a p-type clad layer formed on the active layer wherein the p-type clad layer includes at least a first layer made of p-type Iny2Ga1-y2N (where 0?y2<1) formed on the active layer and a second layer made of p-type Alx3Iny3Ga(1-x3-y3)N (where 0<x3?1, 0?y3?1, and 0<x3+y3?1) formed on the first layer.
    Type: Grant
    Filed: April 26, 2006
    Date of Patent: February 22, 2011
    Assignee: Samsung LED Co,; Ltd.
    Inventors: Je Won Kim, Jeong Tak Oh, Dong Joon Kim, Sun Woon Kim, Jin Sub Park, Kyu Han Lee
  • Patent number: 7888693
    Abstract: Provided is a semiconductor light emitting device and a method for manufacturing the same. The semiconductor light emitting device comprises: a first conductive type semiconductor layer; an active layer on the first conductive type semiconductor layer; an undoped semiconductor layer on the active layer; a first delta-doped layer on the undoped semiconductor layer; and a second conductive type semiconductor layer on the first delta-doped layer.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: February 15, 2011
    Assignee: LG Innotek Co., Ltd.
    Inventors: Tae Yun Kim, Hyo Kun Son
  • Patent number: 7888692
    Abstract: Microcavity comprising two reflectors, at least one semiconductor layer separating said reflectors and a semiconductor quantum well wherein at least one of said reflectors and of said at least one semiconductor layer comprises a structure which is adjusted to localize a polariton in said microcavity.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: February 15, 2011
    Assignee: École Polytechnique Fédérale de Lausanne
    Inventors: Benoît Deveaud-Plédran, Cristiano Ciuti, François Morier-Genoud
  • Patent number: 7884388
    Abstract: A light emitting diode (LED) and a method for fabricating the same, capable of improving brightness by forming a InGaN layer having a low concentration of indium, and whose lattice constant is similar to that of an active layer of the LED, is provided. The LED includes: a buffer layer disposed on a sapphire substrate; a GaN layer disposed on the buffer layer; a doped GaN layer disposed on the GaN layer; a GaN layer having indium disposed on the GaN layer; an active layer disposed on the GaN layer having indium; and a P-type GaN disposed on the active layer. Here, an empirical formula of the GaN layer having indium is given by In(x)Ga(1?x)N and a range of x is given by 0<x<2, and a thickness of the GaN layer having indium is 50-200 ?.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: February 8, 2011
    Assignee: LG Innotek Co., Ltd
    Inventor: Seong Jae Kim
  • Patent number: 7884351
    Abstract: In a nitride semiconductor light-emitting device (11), an emission region (17) has a quantum well structure (19), and lies between an n-type gallium nitride semiconductor region (13) and a p-type gallium nitride semiconductor region (15). The quantum well structure (19) includes a plurality of first well layers (21) composed of InxGa1-xN, one or a plurality of second well layers (23) composed of InyGa1-yN, and barrier layers (25). The first and second well layers (21) and (23) are arranged in alternation with the barrier layers (25). The second well layers (23) lie between the first well layers (21) and the p-type gallium nitride semiconductor region (15). The indium component y of the second well layers (23) is smaller than indium component x of the first well layers (21), and the thickness DW2 of the second well layers (23) is greater than the thickness DW1 of the first well layers (21).
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: February 8, 2011
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takashi Kyono, Katsushi Akita, Yusuke Yoshizumi
  • Patent number: 7884387
    Abstract: An epitaxial wafer for a semiconductor light emitting device according to the present invention in which at least an n-type cladding layer formed with a mixed crystal made of an AlGaInP material, an active layer, a p-type Mg-doped cladding layer, and a p-type contact layer are stacked successively in that order on an n-type GaAs substrate, and the p-type contact layer is formed as at least two layers that are an Mg-doped contact layer and a Zn-doped contact layer stacked thereon when viewed from the n-type GaAs substrate, comprises a Zn-doped layer which is inserted between the p-type Mg-doped cladding layer and the p-type contact layer.
    Type: Grant
    Filed: June 6, 2008
    Date of Patent: February 8, 2011
    Assignee: Hitachi Cable, Ltd.
    Inventors: Takashi Takeuchi, Toshimitsu Sukegawa
  • Patent number: 7880182
    Abstract: A light-emitting element array includes a conductive substrate; an adhesive layer disposed on the conductive substrate; a first epitaxial light-emitting stack layers disposed on the adhesive layer, the first epitaxial light-emitting stack layers including a first p-contact and an first n-contact, wherein the first p-contact and the first n-contact are disposed on the same side of the first epitaxial light-emitting stack layer; and a second epitaxial light-emitting stack layers disposed on the adhesive layer including a second p-contact and an second n-contact, wherein the second p-contact and the second n-contact are disposed on the opposite side of the epitaxial light-emitting stack layer; wherein the first epitaxial light-emitting stack layers and the second epitaxial light-emitting stack layers are electrically connected in anti-parallel.
    Type: Grant
    Filed: June 10, 2009
    Date of Patent: February 1, 2011
    Assignee: Epistar Corporation
    Inventors: Chiu-Lin Yao, Min-Hsun Hsieh, Wen-Huang Liu
  • Patent number: 7880318
    Abstract: A sensing system includes a nanowire, a passivation layer established on at least a portion of the nanowire, and a barrier layer established on the passivation layer.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: February 1, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Theodore I. Kamins, Zhiyong Li, Duncan R. Stewart
  • Patent number: 7880187
    Abstract: Radiation occurs when current is injected into an active layer from electrodes. A pair of clad layers is disposed sandwiching the active layer, the clad layer having a band gap wider than a band gap of the active layer. An optical absorption layer is disposed outside at least one clad layer of the pair of clad layers. The optical absorption layer has a band gap wider than the band gap of the active layer and narrower than the band gap of the clad layer. A spread of a spectrum of radiated light can be narrowed.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: February 1, 2011
    Assignee: Stanley Electric Co., Ltd.
    Inventors: Ken Sasakura, Keizo Kawaguchi, Hanako Ono
  • Patent number: 7872269
    Abstract: Provided is a gallium nitride semiconductor light emitting element capable of stabilizing a drive voltage by reducing carrier depletion attributable to spontaneous polarization and piezo polarization generated at the interface between an AlGaN semiconductor layer and a GaN semiconductor layer. A gallium nitride semiconductor crystal 2 including a light emitting region is formed on the R plane of a sapphire substrate 1. In addition, in another constitution, a gallium nitride semiconductor crystal 2 is formed on the A plane of a GaN substrate 3 or on the M plane of a GaN substrate 4. The growth surface of these gallium nitride semiconductor crystals 2 are not an N (nitrogen) polar face or a Ga polar face but are non-polar faces. This can decrease the strength of an electric field caused by spontaneous polarization and piezo polarization generated at the interface of GaN/AlGaN at the p side. Thus, carrier depletion can be avoided.
    Type: Grant
    Filed: November 29, 2006
    Date of Patent: January 18, 2011
    Assignee: ROHM Co., Ltd.
    Inventor: Ken Nakahara
  • Patent number: 7872270
    Abstract: A semiconductor light emitter includes a quantum well active layer which includes nitrogen and at least one other Group-V element, and barrier layers which are provided alongside the quantum well active layer, wherein the quantum well active layer and the barrier layers together constitute an active layer, wherein the barrier layers are formed of a Group-III-V mixed-crystal semiconductor that includes nitrogen and at least one other Group-V element, a nitrogen composition thereof being smaller than that of the quantum well active layer.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: January 18, 2011
    Assignee: Ricoh Company, Ltd.
    Inventors: Takashi Takahashi, Shunichi Sato, Morimasa Kaminishi
  • Patent number: 7863636
    Abstract: A substrate for light-emitting diodes, obtained by stacking a single crystal layer to form a light-emitting diode element onto a ceramic composite layer for light conversion, the ceramic composite layer having been formed by a unidirectional solidification method so that the ceramic composite layer comprises a solidified body having formed therein at least two or more oxide phases selected from single metal oxides and complex metal oxides to be continuously and three-dimensionally entangled with each other, with each oxide phase having a single crystal orientation, wherein at least one oxide phase out of the oxide phases in the solidified body contains a metal element oxide capable of emitting fluorescence.
    Type: Grant
    Filed: August 2, 2006
    Date of Patent: January 4, 2011
    Assignee: Ube Industries, Ltd.
    Inventors: Shin-ichi Sakata, Atsuyuki Mitani
  • Patent number: 7863631
    Abstract: To increase the lattice constant of AlInGaP LED layers to greater than the lattice constant of GaAs for reduced temperature sensitivity, an engineered growth layer is formed over a substrate, where the growth layer has a lattice constant equal to or approximately equal to that of the desired AlInGaP layers. In one embodiment, a graded InGaAs or InGaP layer is grown over a GaAs substrate. The amount of indium is increased during growth of the layer such that the final lattice constant is equal to that of the desired AlInGaP active layer. In another embodiment, a very thin InGaP, InGaAs, or AlInGaP layer is grown on a GaAs substrate, where the InGaP, InGaAs, or AlInGaP layer is strained (compressed). The InGaP, InGaAs, or AlInGaP thin layer is then delaminated from the GaAs and relaxed, causing the lattice constant of the thin layer to increase to the lattice constant of the desired overlying AlInGaP LED layers. The LED layers are then grown over the thin InGaP, InGaAs, or AlInGaP layer.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: January 4, 2011
    Assignees: Koninklijke Philips Electronics N.V., Philips Lumileds Lighting Company, LLC
    Inventors: Michael R. Krames, Nathan F. Gardner, Frank M. Steranka
  • Publication number: 20100327299
    Abstract: A device includes a semiconductor structure with at least one III-P light emitting layer disposed between an n-type region and a p-type region. The semiconductor structure further includes a GaAsxP1-x p-contact layer, wherein x<0.45. A first metal contact is in direct contact with the GaAsxP1-x p-contact layer. A second metal contact is electrically connected to the n-type region. The first and second metal contacts are formed on a same side of the semiconductor structure.
    Type: Application
    Filed: June 30, 2009
    Publication date: December 30, 2010
    Applicants: KONINKLIJKE PHILIPS ELECTRONICS N.V., PHILIPS LUMILEDS LIGHTING COMPANY, LLC
    Inventors: Theodore Chung, Anneli Munkholm
  • Patent number: 7847310
    Abstract: Semiconductor lasers, such as VCSELs having active regions with flattening layers associated with nitrogen-containing quantum wells are disclosed. MEE (Migration Enhanced Epitaxy) is used to form a flattening layer upon which a quantum well is formed and thereby enhance smoothness of quantum well interfaces and to achieve narrowing of the spectrum of light emitted from nitrogen containing quantum wells. A cap layer is also formed over the quantum well.
    Type: Grant
    Filed: October 13, 2008
    Date of Patent: December 7, 2010
    Assignee: Finisar Corporation
    Inventor: Ralph H. Johnson
  • Patent number: 7847304
    Abstract: An LED array includes a semiconductor substrate and a plurality of first LED portions formed integrally on a surface of the semiconductor substrate. The first LED portions emit light of a predetermined color. The LED array includes a plurality of second LED portions fixed to the semiconductor substrate and are disposed corresponding to the first LED portions. The second LED portions emit light whose color is different from the first LED portions. The second LED portions are so disposed that active layers of the second LED portions are substantially at the same height as active layers of the first LED portions.
    Type: Grant
    Filed: March 28, 2007
    Date of Patent: December 7, 2010
    Assignee: Oki Data Corporation
    Inventors: Masumi Taninaka, Masumi Koizumi, Hiroshi Hamano
  • Patent number: 7842966
    Abstract: A compound semiconductor light-emitting diode includes a light-emitting layer (133) formed of aluminum-gallium-indium phosphide, a light-emitting part (13) having component layers individually formed of a Group III-V compound semiconductor, a transparent supporting layer (14) bonded to one of the outermost surface layers (135) of the light-emitting part (13) and transparent to the light emitted from the light-emitting layer (133), and a bonding layer (141) formed between the supporting layer (14) and the one of the outermost surface layers (135)of the light-emitting part (13) containing oxygen atoms at a concentration of 1×1020 cm?3 or less.
    Type: Grant
    Filed: July 5, 2006
    Date of Patent: November 30, 2010
    Assignee: Showa Denko K.K.
    Inventors: Takashi Watanabe, Ryouichi Takeuchi
  • Patent number: 7838891
    Abstract: Disclosed is a light emitting device having a plurality of light emitting cells and a package having the same mounted thereon. The light emitting device includes a plurality of light emitting cells which are formed on a substrate and each of which has an N-type semiconductor layer and a P-type semiconductor layer located on a portion of the N-type semiconductor layer. The plurality of light emitting cells are bonded to a submount substrate. Accordingly, heat generated from the light emitting cells can be easily dissipated, so that a thermal load on the light emitting device can be reduced. Meanwhile, since the plurality of light emitting cells are electrically connected using connection electrodes or electrode layers formed on the submount substrate, it is possible to provide light emitting cell arrays connected to each other in series.
    Type: Grant
    Filed: April 23, 2010
    Date of Patent: November 23, 2010
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Chung Hoon Lee, Lacroix Yves, Hyung Soo Yoon, Young Ju Lee
  • Patent number: 7838893
    Abstract: A semiconductor optical device comprises a first conductive type semiconductor region, an active layer provided on the second semiconductor portion of the first conductive type semiconductor region, a second conductive type semiconductor region on the side and top of the active layer, the side of the second semiconductor portion, and the second region of the first semiconductor portion of the first conductive type semiconductor region, a potential adjusting semiconductor layer provided between the second semiconductor portion of the first conductive type semiconductor region and the active layer, and first and second distributed Bragg reflector portions between which the first conductive type semiconductor region, the active layer and the second conductive type semiconductor region is provided. Bandgap energies of the first conductive type semiconductor region and second conductive type semiconductor region are greater than that of the active layer.
    Type: Grant
    Filed: September 22, 2005
    Date of Patent: November 23, 2010
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Tsukuru Katsuyama, Jun-ichi Hashimoto
  • Patent number: 7834374
    Abstract: An LED having vertical topology and a method of making the same is capable of improving a luminous efficiency and reliability, and is also capable of achieving mass productivity. The method includes forming a semiconductor layer on a substrate; forming a first electrode on the semiconductor layer; forming a supporting layer on the first electrode; generating an acoustic stress wave at the interface between the substrate and semiconductor layer, thereby separating the substrate from the semiconductor layer; and forming a second electrode on the semiconductor layer exposed by the separation of the substrate.
    Type: Grant
    Filed: February 20, 2007
    Date of Patent: November 16, 2010
    Assignees: LG Electronics Inc., LG Innotek Co., Ltd.
    Inventors: Jun Ho Jang, Jae Wan Choi, Duk Kyu Bae, Hyun Kyong Cho, Jong Kook Park, Sun Jung Kim, Jeong Soo Lee
  • Patent number: 7829899
    Abstract: In one embodiment, a single light emitting diode lamp package includes at least two light emitting devices that can be switched independently of one another and thus may be useful in vehicular lighting applications, for example low and high beam headlights. In another embodiment, a LED device includes a first LED die and at least one additional LED die disposed at different positions within a common reflector cup. Multiple LED sub-assemblies may be mounted to a common lead frame along non-coincident principal axes. Methods for varying intensity or color from multi-LED lamps are further provided.
    Type: Grant
    Filed: May 3, 2006
    Date of Patent: November 9, 2010
    Assignee: Cree, Inc.
    Inventor: Edward Lloyd Hutchins
  • Patent number: 7825432
    Abstract: A semiconductor structure includes a first layer of a nitride semiconductor material, a substantially unstrained nitride interlayer on the first layer of nitride semiconductor material, and a second layer of a nitride semiconductor material on the nitride interlayer. The nitride interlayer has a first lattice constant and may include aluminum and gallium and may be conductively doped with an n-type dopant. The first layer and the second layer together have a thickness of at least about 0.5 ?m. The nitride semiconductor material may have a second lattice constant, such that the first layer may be more tensile strained on one side of the nitride interlayer than the second layer may be on the other side of the nitride interlayer.
    Type: Grant
    Filed: March 9, 2007
    Date of Patent: November 2, 2010
    Assignee: Cree, Inc.
    Inventors: Adam William Saxler, Albert Augustus Burk, Jr.
  • Publication number: 20100270568
    Abstract: A light emitting device comprises a light emitting layer section having a double heterostructure of an n-type cladding layer, an active layer and a p-type cladding layer, each composed of AlGaInP stacked in this order. Supposing a bonding object layer having a first main surface side as p type and a second main surface side as n type, a light extraction side electrode is formed to cover the first main surface partially. An n-type transparent device substrate composed of Group III-V compound semiconductor having greater band gap energy than the active layer is bonded to the second main surface of the bonding object layer. On one sides of the transparent device substrate and the bonding object layer, a bonding surface to the other is formed, and an InGaP intermediate layer is formed to have a high concentration Si doping layer formed on the bonding surface side.
    Type: Application
    Filed: May 29, 2007
    Publication date: October 28, 2010
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Yukari Suzuki, Jun Ikeda, Jun-ya Ishizaki, Shunichi Ikeda
  • Patent number: 7821019
    Abstract: A heterostructure semiconductor device capable of emitting electromagnetic radiation and having a junction with opposite conductivity type materials on either side thereof supported on a substrate with an active layer therebetween comprising zinc oxide and having a band gap energy that is less than that of either of the opposite conductivity type materials.
    Type: Grant
    Filed: October 4, 2005
    Date of Patent: October 26, 2010
    Assignee: SVT Associates, Inc.
    Inventors: Andrei Vladimirovich Osinsky, Jianwei Dong, Mohammed Zahed Kauser, Brian James Hertog, Amir Massoud Dabiran
  • Patent number: 7816699
    Abstract: Disclosed is a polarized light emitting diode (LED) capable of emitting polarized light in the front direction thereof by forming a first grating layer on a quantum well layer and forming a second grating layer on a substrate. The polarized LED includes a nitride thin film formed on a substrate, a quantum well layer formed on the nitride thin film, a first grating layer formed on the quantum well layer to allow a part of light generated from the quantum well layer to pass through the first grating layer and to reflect remaining light, and a second grating layer formed on the substrate to rotate the light reflected from the first grating layer such that the reflected light passes through the first grating layer.
    Type: Grant
    Filed: January 23, 2008
    Date of Patent: October 19, 2010
    Assignee: Korea University Industrial & Academic Collaboration Foundation
    Inventors: Q-Han Park, Won-Jun Choi, Heon-Su Jeon
  • Patent number: 7812354
    Abstract: A light emitting diode is disclosed that is formed in the Group III nitride material system. The diode includes respective n-type and p-type layers for current injection and light emission. At least one n-type Group III nitride layer in the diode has dopants selected from the group consisting of elements with a larger atomic radius than silicon and elements with a larger covalent radius than silicon, with germanium and tellurium being exemplary.
    Type: Grant
    Filed: December 6, 2006
    Date of Patent: October 12, 2010
    Assignee: Cree, Inc.
    Inventor: David T. Emerson
  • Patent number: 7804100
    Abstract: A device structure includes a III-nitride wurtzite semiconductor light emitting region disposed between a p-type region and an n-type region. A bonded interface is disposed between two surfaces, one of the surfaces being a surface of the device structure. The bonded interface facilitates an orientation of the wurtzite c-axis in the light emitting region that confines carriers in the light emitting region, potentially increasing efficiency at high current density.
    Type: Grant
    Filed: March 14, 2005
    Date of Patent: September 28, 2010
    Assignees: Philips Lumileds Lighting Company, LLC, Koninklijke Philips Electronics N.V.
    Inventors: Jonathan J. Wierer, Jr., M. George Craford, John E. Epler, Michael R. Krames
  • Patent number: RE42008
    Abstract: An nitride semiconductor device for the improvement of lower operational voltage or increased emitting output, comprises an active layer comprising quantum well layer or layers and barrier layer or layers between n-type nitride, semiconductor layers and p-type nitride semiconductor layers, wherein said quantum layer in said active layer comprises InxGa1—xN (0<x<1) having a peak wavelength of 450 to 540 nm and said active layer comprises laminating layers of 9 to 13, in which at most 3 layers from the side of said n-type nitride semiconductor layers are doped with an n-type impurity selected from the group consisting of Si, Ge and Sn in a range of 5×1016 to 2×1018/cm3.
    Type: Grant
    Filed: June 7, 2000
    Date of Patent: December 28, 2010
    Assignee: Nichia Corporation
    Inventor: Koji Tanizawa