Plural Heterojunctions In Same Device Patents (Class 257/96)
  • Patent number: 7795631
    Abstract: A light-emitting device, including a compound semiconductor layer disposed on a substrate, includes a light-emitting layer, and a dielectric constant change structure formed in a part of the compound semiconductor layer including a main surface as a light extraction surface of the compound semiconductor layer. The dielectric constant change structure is devoid of revolution symmetry provided by randomly changing a periodicity of a dielectric constant in a two-dimensional lattice pattern, with respect to a photonic crystal structure in which more than two kinds of materials having different dielectric constants are periodically and alternately disposed on the main surface in the two-dimensional lattice pattern.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: September 14, 2010
    Assignee: Hitachi Cable, Ltd.
    Inventor: Katsuya Akimoto
  • Patent number: 7792169
    Abstract: A nitride semiconductor light emitting device includes a first coat film of aluminum nitride or aluminum oxynitride formed at a light emitting portion and a second coat film of aluminum oxide formed on the first coat film. The thickness of the second coat film is at least 80 nm and at most 1000 nm. Here, the thickness of the first coat film is preferably at least 6 nm and at most 200 nm.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: September 7, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshinobu Kawaguchi, Takeshi Kamikawa
  • Patent number: 7786496
    Abstract: A FET is formed on a semiconductor substrate, a curved surface having a radius of curvature is formed on an upper end of an insulation, a portion of a first electrode is exposed corresponding to the curved surface to form an inclined surface, and a region defining a luminescent region is subjected to etching to expose the first electrode. Luminescence emitted from an organic chemical compound layer is reflected by the inclined surface of the first electrode to increase a total quantity of luminescence taken out in a certain direction.
    Type: Grant
    Filed: April 23, 2003
    Date of Patent: August 31, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Seo, Hideaki Kuwabara
  • Patent number: 7781785
    Abstract: The present invention discloses a light emitting diode having a mirror and a permanent substrate plated thereon. The present invention also discloses a method for producing such light emitting diode. The permanent substrate and the mirror are formed after both electrodes are completed. Accordingly, the epitaxial structure and the mirror will not be damaged, and brightness and heat dissipation of the light emitting device are improved.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: August 24, 2010
    Assignee: National Chung-Hsing University
    Inventors: Ray-Hua Horng, Dong-Sing Wu, Shao-Hua Huang, Chi-Ying Chiu, Yann-Jyh Chiang
  • Patent number: 7772599
    Abstract: A gallium-nitride-based semiconductor stacked structure includes a low-temperature-deposited buffer layer and an active layer. The low-temperature-deposited buffer layer is composed of a Group III nitride material that has been grown at low temperature and includes a single-crystal layer in an as-grown state, the single-crystal layer being present in the vicinity of a junction area that is in contact with a (0001) (c) plane of a sapphire substrate. The active layer is composed of a gallium-nitride (GaN)-based semiconductor layer that is provided on the low-temperature-deposited buffer layer. The single-crystal layer is composed of a hexagonal AlXGaYN (0.5<X?1, X+Y=1) crystal that contains aluminum in a predominant amount with respect to gallium such that a [2.?1.?1.0.] direction of the AlXGaYN crystal orients along with a [2.?1.?1.0.] direction of the (0001) bottom plane of the sapphire substrate.
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: August 10, 2010
    Assignee: Showa Denko K.K.
    Inventor: Takashi Udagawa
  • Patent number: 7763902
    Abstract: A LED chip including a substrate, a first type doped semiconductor layer, a second type doped semiconductor layer, a light emitting layer, at least an Indium-doped AlxGa1-xN based material layer (0?x<1) and at least a tunneling junction layer is provided. The first type doped semiconductor layer is disposed on the substrate, and the light emitting layer is disposed between the first type doped semiconductor layer and the second type doped semiconductor layer. The Indium-doped AlxGa1-xN based material layer is disposed on at least one surface of the light emitting layer, and the tunneling junction layer is disposed between the Indium-doped AlxGa1-xN based material layer and the first type doped semiconductor layer and/or disposed between the Indium-doped AlxGa1-xN based material layer and the second type doped semiconductor layer, wherein the Indium-doped AlxGa1-xN based material layer and the tunneling junction layer are disposed on the same side of the light emitting layer.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: July 27, 2010
    Assignee: Formosa Epitaxy Incorporation
    Inventors: Liang-Wen Wu, Fen-Ren Chien
  • Patent number: 7759689
    Abstract: A light emitting device having a buried photonic bandgap (PBG) structure is created using a relatively simple fabrication method known as epitaxial layer overgrowth (ELOG). By burying the PBG structure, the difficulties and disadvantages associated with the known technique of etching holes into a LED emission surface to form the PBG structure are avoided.
    Type: Grant
    Filed: May 7, 2007
    Date of Patent: July 20, 2010
    Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventor: David P. Bour
  • Patent number: 7756178
    Abstract: A quantum cascade laser 1, which generates infrared light or other light of a predetermined wavelength by making use of intersubband transitions in a quantum well structure, is arranged by forming, on a GaAs substrate 10, an AlGaAs/GaAs active layer 11 having a cascade structure in which quantum well light emitting layers and injection layers are laminated alternately. Also, at the GaAs substrate 10 side and the side opposite the GaAs substrate 10 side of active layer 11, is provided a waveguide structure, comprising waveguide core layers 12 and 14, each being formed of an n-type GaInNAs layer, which is a group III-V compound semiconductor that contains N (nitrogen), formed so as to be lattice matched with the GaAs substrate 10, and waveguide clad layers 13 and 15, each formed of an n++-type GaAs layer. A quantum cascade laser, with which the waveguide loss of generated light in the laser is reduced, is thereby realized.
    Type: Grant
    Filed: November 1, 2007
    Date of Patent: July 13, 2010
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Tadataka Edamura, Naota Akikusa
  • Patent number: 7755098
    Abstract: Provided is a zinc oxide light emitting diode having improved optical characteristics. The zinc oxide light emitting diode includes an n-type semiconductor layer, a zinc oxide active layer formed on the n-type semiconductor layer, a p-type semiconductor layer formed on the active layer, an anode in electrical contact with the p-type semiconductor layer, a cathode in electrical contact with the n-type semiconductor layer, and a surface plasmon layer disposed between the n-type semiconductor layer and the active layer or between the active layer and the p-type semiconductor layer. Since the surface plasmon layer is formed between the n-type semiconductor layer and the active layer or between the active layer and the p-type semiconductor layer, the light emitting diode is not affected by an increase in resistance due to reduction of the thickness of the p-type semiconductor layer, and has improved optical characteristics due to a resonance phenomenon between the surface plasmon layer and the active layer.
    Type: Grant
    Filed: April 7, 2009
    Date of Patent: July 13, 2010
    Assignee: Gwangju Institute of Science and Technology
    Inventors: Seong-Ju Park, Dae-Kue Hwang, Min-Ki Kwon, Min-Suk Oh, Yong-Seok Choi
  • Patent number: 7750355
    Abstract: The object of this invention is to provide a high-output type nitride light emitting device. The nitride light emitting device comprises an n-type nitride semiconductor layer or layers, a p-type nitride semiconductor layer or layers and an active layer therebetween, wherein a gallium-containing nitride substrate is obtained from a gallium-containing nitride bulk single crystal, provided with an epitaxial growth face with dislocation density of 105/cm2 or less, and A-plane or M-plane which is parallel to C-axis of hexagonal structure for an epitaxial face, wherein the n-type semiconductor layer or layers are formed directly on the A-plane or M-plane. In case that the active layer comprises a nitride semiconductor containing In, an end face film of single crystal AlxGa1-xN (0?x?1) can be formed at a low temperature not causing damage to the active layer.
    Type: Grant
    Filed: October 28, 2002
    Date of Patent: July 6, 2010
    Assignees: AMMONO Sp. z o.o., Nichia Corporation
    Inventors: Robert Dwilinski, Roman Doradzinski, Jerzy Garczynski, Leszek Sierzputowski, Yasuo Kanbara
  • Patent number: 7745841
    Abstract: A semiconductor light-emitting device which exhibits small threshold current, high differential efficiency, and good characteristics, by reducing electrons that overflow an electron barrier, trapping the electrons in an active layer. Of the barrier layers of an active layer, a final barrier layer, which is a barrier layer closest to a p side, is smaller in band gap energy than other barrier layers. Thus, as compared with a case where the final barrier layer has the same band gap energy as that of the other barrier layer, an energy band discontinuity (electron barrier) with an electron blocking layer can be made larger. As a result, overflow of electrons is reduced.
    Type: Grant
    Filed: November 9, 2005
    Date of Patent: June 29, 2010
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Kyosuke Kuramoto
  • Patent number: 7745839
    Abstract: Provided are a double wavelength semiconductor light emitting device, having an n electrode and p electrode disposed on the same surface side, in which the area of a chip is reduced to increase the number of chips taken from one single wafer, in which light focusing performance of double wavelength optical beams are improved, and in which an active layer of a light emitting element having a longer wavelength can be prevented from deteriorating in a process of manufacturing; and a method of manufacturing the same. Semiconductor lasers D1 and D2 as two light emitting elements having different wavelengths are integrally formed on a common substrate 1. A semiconductor laminate A is deposited on an n-type contact layer 21 in a semiconductor laser D1, and a semiconductor laminate B is deposited in a semiconductor laser D2. The semiconductor laminate A and semiconductor laminate B are configured to have different layer structures.
    Type: Grant
    Filed: February 23, 2007
    Date of Patent: June 29, 2010
    Assignee: Rohm Co., Ltd.
    Inventors: Shinichi Tamai, Ken Nakahara, Atsushi Yamaguchi
  • Patent number: 7732826
    Abstract: The present invention discloses a semiconductor, includes one or more luminescent layers; and one or more electron gas layers with two-dimensional electron gases that are distributed parallel to the luminescent layers.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: June 8, 2010
    Inventors: Satoshi Kamiyama, Hiroshi Amano, Isamu Akasaki, Motoaki Iwaya, Hiroyuki Kinoshita
  • Patent number: 7723739
    Abstract: A semiconductor light emitting device includes an n-type nitride semiconductor layer 3 formed on one surface side of a single-crystal substrate 1 for epitaxial growth through a first buffer layer 2, an emission layer 5 formed on a surface side of the n-type nitride semiconductor layer 3, and a p-type nitride semiconductor layer 6 formed on a surface side of the emission layer 5. The emission layer 5 has an AlGaInN quantum well structure, and a second buffer layer 4 having the same composition as a barrier layer 5a of the emission layer 5 is provided between the n-type nitride semiconductor layer 3 and the emission layer 5. In the semiconductor light emitting device, it is possible to increase emission intensity of the ultraviolet radiation as compared with a conventional configuration while using AlGaInN as a material of the emission layer.
    Type: Grant
    Filed: September 4, 2006
    Date of Patent: May 25, 2010
    Assignees: Panasonic Electric Works Co., Ltd., Riken
    Inventors: Takayoshi Takano, Yukihiro Kondo, Junji Ikeda, Hideki Hirayama
  • Patent number: 7723731
    Abstract: A first conductivity type cladding layer 2, a first side multilayer 9, an active layer 4, a second side multilayer 10, and a second conductivity type cladding layer 3 are provided in a semiconductor light emitting device. The first side multilayer 9 is provided between the first conductivity type cladding layer 2 and the active layer 4, and the second side multilayer 10 is provided between the active layer 4 and the second conductivity type cladding layer 3. Each of the multilayer 9, 10 is transparent with respect to the light generated at the active layer 4, having a bandgap larger than that of the active layer 4, and lattice-matched with the active layer 4.
    Type: Grant
    Filed: October 18, 2007
    Date of Patent: May 25, 2010
    Assignee: Hitachi Cable, Ltd.
    Inventors: Taichiroo Konno, Takashi Furuya
  • Patent number: 7714316
    Abstract: Disclosed is an acid etching resistance material comprising a compound having a repeating unit represented by the following general formula (1): (in the general formula (1), R1 is a hydrogen atom or methyl group; R3 is a cyclic group selected from an alicyclic group and an aromatic group; R4 is a polar group; R2 is a group represented by the following general formula (2); and j is 0 or 1): (in the general formula (2), R5 is a hydrogen atom or methyl group).
    Type: Grant
    Filed: May 13, 2008
    Date of Patent: May 11, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koji Asakawa, Kenichi Ohashi, Akira Fujimoto, Takashi Sasaki
  • Patent number: 7709848
    Abstract: A group III nitride semiconductor light emitting device according to the present invention includes an intermediate layer formed of AlxGa1-x-yInyN(0<X<1, 0<y<1, x+y<1) between an active layer and a cladding layer and an electron blocking layer formed of p-type group III nitride semiconductor having a smaller electron affinity than that of the intermediate layer so as to be in contact with the intermediate layer. The semiconductor light emitting layer may be a laser diode or a LED.
    Type: Grant
    Filed: November 16, 2006
    Date of Patent: May 4, 2010
    Assignee: Panasonic Corporation
    Inventor: Katsumi Sugiura
  • Patent number: 7709847
    Abstract: A nitride semiconductor light emitting device is provided. The nitride semiconductor light emitting device includes a first nitride layer comprising at least N-type nitride layer. An insulating member is formed on the first nitride layer having a predetermined pattern. An active layer is formed in both sides of the insulating member on the first nitride layer to emit light. A second nitride layer is formed in both sides of the insulating member on the active layer and the second nitride layer comprises at least a P-type nitride layer.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: May 4, 2010
    Assignee: LG Innotek Co., Ltd.
    Inventor: Sang Youl Lee
  • Patent number: 7709849
    Abstract: The present invention discloses a light emitting diode. The light emitting diode includes a plurality of light emitting cells arranged on a substrate, each light emitting cell including a first semiconductor layer and a second semiconductor layer arranged on the first semiconductor layer; a first dielectric layer arranged on each light emitting cell and including a first opening to expose the first semiconductor layer and a second opening to expose the second semiconductor layer; a wire arranged on the first dielectric layer to couple two of the light emitting cells; and a second dielectric layer arranged on the first dielectric layer and the wire. The first dielectric layer and the second dielectric layer comprise the same material and the first dielectric layer is thicker than the second dielectric layer.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: May 4, 2010
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Dae Sung Kal, Dae Won Kim, Won Cheol Seo, Kyung Hee Ye, Joo Woong Lee
  • Patent number: 7709287
    Abstract: A method of forming a multijunction solar cell includes providing a substrate, forming a first subcell by depositing a nucleation layer over the substrate and a buffer layer including gallium arsenide (GaAs) over the nucleation layer, forming a middle second subcell having a heterojunction base and emitter disposed over the first subcell and forming first and second tunnel junction layers between the first and second subcells. The first tunnel junction layer includes GaAs over the first subcell and the second tunnel junction layer includes aluminum gallium arsenide (AlGaAs) over the first tunnel junction layer. The method further includes forming a third subcell having a homojunction base and emitter disposed over the middle subcell.
    Type: Grant
    Filed: April 10, 2006
    Date of Patent: May 4, 2010
    Assignee: Emcore Solar Power, Inc.
    Inventors: Navid Fatemi, Daniel J. Aiken, Mark A. Stan
  • Patent number: 7705364
    Abstract: A nitride semiconductor light emitting device has high internal quantum efficiency but low operating voltage. The nitride semiconductor light emitting device includes an n-nitride semiconductor layer; an active layer of multi-quantum well structure formed on the n-nitride semiconductor layer, and having a plurality of quantum well layers and a plurality of quantum barrier layers; and a p-nitride semiconductor layer formed on the active layer. One of the quantum well layers adjacent to the n-nitride semiconductor layer has an energy band gap greater than that of another one of the quantum well layers adjacent to the p-nitride semiconductor layer.
    Type: Grant
    Filed: October 23, 2006
    Date of Patent: April 27, 2010
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Dong Yul Lee, Sang Won Kang, Keun Man Song, Je Won Kim, Sang Su Hong
  • Patent number: 7700961
    Abstract: Provided is a semiconductor light emitting device and a method for manufacturing the same. The semiconductor light emitting device comprises: a first conductive type semiconductor layer; an active layer on the first conductive type semiconductor layer; an undoped semiconductor layer on the active layer; a first delta-doped layer on the undoped semiconductor layer; and a second conductive type semiconductor layer on the first delta-doped layer.
    Type: Grant
    Filed: August 26, 2008
    Date of Patent: April 20, 2010
    Assignee: LG Innotek Co., Ltd.
    Inventors: Tae Yun Kim, Hyo Kun Son
  • Patent number: 7692202
    Abstract: A semiconductor structure with active zones, such as light diodes or photodiodes, including a substrate (SUB) with at least two active zones (AZ1-AZn), each of which emits or absorbs a radiation of differing wavelength. According to the invention, a multi-wavelength diode may be achieved, in which a first (lower) active zone (AZ1) is grown on a surface of the substrate (SUB), with one or several further active zones (AZ1-Azn) epitaxially grown one on the other and the active zones (AZ1-AZn) are serially connected from the lower active zone (AZ1) to an upper active zone (AZn), by means of tunnel diodes (TD1-TDn), serving as low-impedance resistors.
    Type: Grant
    Filed: January 26, 2005
    Date of Patent: April 6, 2010
    Assignee: Azur Space Solar Power GmbH
    Inventor: Werner Bensch
  • Patent number: 7692203
    Abstract: A plurality of semiconductor layers including an active layer 6 and a light extract layer 4, and a reflective metal film 11 are formed in a semiconductor light emitting device. The light extract layer 4 is formed of a plurality of layers 23, 24 having different composition ratios. An irregularity 22 is formed on the layers 23, 24 including an outermost layer to provide a main surface S as a rough-surface.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: April 6, 2010
    Assignee: Hitachi Cable, Ltd.
    Inventors: Taichiroo Konno, Kazuyuki Iizuka, Masahiro Arai
  • Patent number: 7683383
    Abstract: A light emitting device having a circuit protection unit is provided. The circuit protection unit has a low-resistance layer and a potential barrier layer, wherein a barrier potential exists at the interface between the low-resistance layer and the potential barrier layer. The circuit protection unit is electrically connected with the light emitting device. When an electrostatic discharge or excessive forward current is occurred in the light emitting device, the circuit protection unit provides a rectifying function for preventing damages caused by static electricity or excessive forward current to the light emitting device.
    Type: Grant
    Filed: September 8, 2005
    Date of Patent: March 23, 2010
    Assignee: Epistar Corporation
    Inventors: Steve Meng-Yuan Hong, Jen-Shui Wang, Tzu-Feng Tseng, Ching-San Tao, Wen-Huang Liu, Min-Hsun Hsieh
  • Patent number: 7675075
    Abstract: An LED array chip (2), which is one type of a semiconductor light emitting device, includes an array of LEDs (6), a base substrate (4) supporting the array of the LEDs (6), and a phosphor film (48). The array of LEDs (6) is formed by dividing a multilayer epitaxial structure including a light emitting layer into a plurality of portions. The phosphor film (48) covers an upper surface of the array of the LEDs (6) and a part of every side surface of the array of LEDs (6). Here, the part extends from the upper surface to the light emitting layer.
    Type: Grant
    Filed: August 9, 2004
    Date of Patent: March 9, 2010
    Assignee: Panasonic Corporation
    Inventor: Hideo Nagai
  • Patent number: 7675076
    Abstract: A light-emitting device has a main semiconductor region formed via an n-type AlInGaN buffer region on a p-type silicon substrate, the latter being sufficiently electroconductive to provide part of the current path through the device. Constituting the primary working part of the LED, the main semiconductor region comprises an n-type GaN layer, an active layer, and a p-type GaN layer, which are successively epitaxially grown in that order on the buffer region. A heterojunction is created between p-type substrate and n-type buffer region. Carrier transportation from substrate to buffer region is expedited by the interface levels of the heterojunction, with a consequent reduction of the drive voltage requirement of the LED.
    Type: Grant
    Filed: March 15, 2006
    Date of Patent: March 9, 2010
    Assignee: Sanken Electric Co., Ltd.
    Inventors: Koji Otsuka, Tetsuji Moku, Junji Sato, Yoshiki Tada, Takashi Yoshida
  • Patent number: 7675069
    Abstract: For the purpose of emitting light in an ultraviolet short-wavelength region having a wavelength of 360 nm or shorter, it is arranged in InAlGaN in such that a ratio of composition of In is 2% to 20%, a ratio of composition of Al is 10% to 90%, and a total of ratios of composition in In, Al, and Ga is 100%.
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: March 9, 2010
    Assignee: Riken
    Inventors: Hideki Hirayama, Yoshinobu Aoyagi
  • Patent number: 7671375
    Abstract: A light-emitting diode is built on a silicon substrate which has been doped with a p-type impurity to possess sufficient conductivity to provide part of the current path through the LED. The p-type silicon substrate has epitaxially grown thereon a buffer region of n-type AlInGaN. Further grown epitaxially on the buffer region is the main semiconductor region of the LED which comprises a lower confining layer of n-type GaN, an active layer for generating light, and an upper confining layer of p-type GaN. In the course of the growth of the buffer region and main semiconductor region there occurs a thermal diffusion of gallium and other Group III elements from the buffer region into the p-type silicon substrate, with the consequent creation of a p-type low-resistance region in the substrate. Interface levels are created across the heterojunction between p-type silicon substrate and n-type buffer region.
    Type: Grant
    Filed: March 17, 2006
    Date of Patent: March 2, 2010
    Assignee: Sanken Electric Co., Ltd.
    Inventors: Koji Otsuka, Tetsuji Moku, Junji Sato, Yoshiki Tada, Takashi Yoshida
  • Patent number: 7663138
    Abstract: A n-type layer, a multiquantum well active layer comprising a plurality of pairs of an InGaN well layer/InGaN barrier layer, and a p-type layer are laminated on a substrate to provide a nitride semiconductor light emitting element. A composition of the InGaN barrier included in the multiquantum well active layer is expressed by InxGa1-xN (0.04?x?0.1), and a total thickness of InGaN layers comprising an In composition ratio within a range of 0.04 to 0.1 in the light emitting element including the InGaN barrier layers is not greater than 60 nm.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: February 16, 2010
    Assignee: Hitachi Cable, Ltd.
    Inventor: Hajime Fujikura
  • Publication number: 20100032696
    Abstract: A light-emitting diode (LED) device is provided. The LED device has raised semiconductor regions formed on a substrate. LED structures are formed over the raised semiconductor regions such that bottom contact layers and active layers of the LED device are conformal layers. The top contact layer has a planar surface. In an embodiment, the top contact layers are continuous over a plurality of the raised semiconductor regions while the bottom contact layers and the active layers are discontinuous between adjacent raised semiconductor regions.
    Type: Application
    Filed: August 11, 2008
    Publication date: February 11, 2010
    Inventors: Chen-Hua Yu, Wen-Chih Chiou, Ding-Yuan Chen, Chia-Lin Yu, Hung-Ta Lin
  • Patent number: 7659546
    Abstract: A light emitting device firstly includes a light emitting diode (LED) structure, having a top surface with a light emitting region. The device also has a heterojunction within the device structure, the heterojunction having a p-type and an n-type semiconductor layer, and a plurality of electrodes positioned on the top surface, each being electrically connected to one of the p-type and n-type semiconductor layers. At least a first and a second electrodes are connected to a same type semiconductor layer and are physically separated from each other. The device further includes a first and a second heterojunction regions within the heterojunction, each being respectively defined between one of the first and second electrodes and one of the other electrodes connected to the other type semiconductor layer. The first and second heterojunction regions are alternatively driven for emitting lights in the time domain.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: February 9, 2010
    Assignee: Hong Kong Applied Science and Technology Research Institute Co., Ltd.
    Inventors: Ming Lu, Geoffrey Wen Tai Shuy
  • Publication number: 20100019257
    Abstract: There are provided a nitride semiconductor light emitting device having a structure enabling enhanced external quantum efficiency by effectively taking out light which is apt to repeat total reflection within a semiconductor lamination portion and a substrate and attenuate, and a method for manufacturing the same. A semiconductor lamination portion (6) including a first conductivity type layer and a second conductivity type layer, made of nitride semiconductor, is provided on a surface of the substrate (1) made of, for example, sapphire or the like. A first electrode (for example, p-side electrode (8)) is provided electrically connected to the first conductivity type layer (for example, p-type layer (5)) on a surface side of the semiconductor lamination portion (6), and a second electrode (for example, n-side electrode (9)) is provided electrically connected to the second conductivity type layer (for example, n-type layer (3)).
    Type: Application
    Filed: February 7, 2006
    Publication date: January 28, 2010
    Applicant: ROHM CO., LTD.
    Inventors: Mitsuhiko Sakai, Atsushi Yamaguchi, Ken Nakahara, Masayuki Sonobe, Tsuyoshi Tsutsui
  • Publication number: 20100019258
    Abstract: There is provided a semiconductor light emitting device that can easily dissipate heat, improve current spreading efficiency, and reduce defects by blocking dislocations occurring when a semiconductor layer is grown to thereby increase reliability. A semiconductor light emitting device including a substrate, a light emitting structure having an n-type semiconductor layer, an active layer, and a p-type semiconductor layer sequentially laminated, and an n-type electrode and a p-type electrode formed on the n-type semiconductor layer and the p-type semiconductor layer, respectively, according to an aspect of the invention may include: a metal layer formed in the n-type semiconductor layer and contacting the n-type electrode.
    Type: Application
    Filed: December 18, 2008
    Publication date: January 28, 2010
    Applicants: SAMSUNG ELECTRO-MECHANICS CO., LTD., GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Sang Won KANG, Seong Ju Park, Joo Young Cho, Il Kyu Park, Yong Chun Kim, Dong Joon Kim, Jeong Tak Oh, Je Won Kim
  • Patent number: 7651927
    Abstract: A semiconductor device includes a substrate and a semiconductor layer formed on the substrate. The substrate has: a flat region provided in a main surface thereof; a first indentation region provided in a portion of the main surface different from the flat region and formed with first recesses; and a second indentation region provided between the first indentation region and the flat region, formed with second recesses, and having a lower probability of occurrence of growth nuclei than the first indentation region and a higher probability than the flat region in the case where a crystal of a semiconductor is grown on the main surface.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: January 26, 2010
    Assignee: Panasonic Corporation
    Inventor: Yuji Takase
  • Patent number: 7649193
    Abstract: A semiconductor body (2), comprising a semiconductor layer sequence with an active region (3) suitable for generating radiation. The semiconductor layer sequence comprises two contact layers (6, 7), between which the active region is arranged. The contact layers are assigned a respective connection layer (12, 13) arranged on the semiconductor body. The respective connection layer is electrically conductively connected to the assigned contact layer. The respective connection layer is arranged on that side of the assigned contact layer which is remote from the active region. The connection layers are transmissive to the radiation to be generated in the active region, and the contact layers are of the same conduction type.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: January 19, 2010
    Assignee: Osram Opto Semiconductors GmbH
    Inventor: Ralph Wirth
  • Patent number: 7642562
    Abstract: An efficient long-wavelength light-emitting diode has a resonant-cavity design. The light-emitting diode preferably has self-organized (In,Ga)As or (In,Ga)(As,N) quantum dots in the light-emitting active region, deposited on a GaAs substrate. The light-emitting diode is capable of emitting in a long-wavelength spectral range of preferably 1.15-1.35 ?m. The light-emitting diode also has a high efficiency of preferably at least 6 mW and more preferably at least 8 mW at an operating current of less than 100 mA and a low operating voltage of preferably less than 3V. In addition, the light-emitting diode preferably has an intensity of maxima, other than the main maximum of the emission spectrum, of less than 1% of an intensity of the main maximum. This combination of parameters makes such a device useful as an inexpensive optical source for various applications.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: January 5, 2010
    Assignee: Innolume GmbH
    Inventors: Alexey Kovsh, Igor Krestnikov, Sergey Mikhrin, Daniil Livshits
  • Patent number: 7638810
    Abstract: Refractory metal ELOG mask are used for GaN based VCSELs and edge emitter structures to serve as intracavity contacts. In these structures the refractory metal ELOG masks serve both as ohmic contact metals as well as masks for ELOG.
    Type: Grant
    Filed: September 9, 2005
    Date of Patent: December 29, 2009
    Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventors: David P. Bour, Scott W Corzine
  • Patent number: 7638809
    Abstract: A light emitting device includes a transparent substrate having first and second surfaces, a semiconductor layer provided on the first surface, a first light emission layer provided on the semiconductor layer and emitting first ultraviolet light including a wavelength corresponding to an energy larger than a forbidden bandwidth of a semiconductor of the semiconductor layer, a second light emission layer provided between the first light emission layer and the semiconductor layer, absorbing the first ultraviolet light emitted from the first light emission layer, and emitting second ultraviolet light including a wavelength corresponding to an energy smaller than the forbidden bandwidth of the semiconductor of the semiconductor layer, and first and second electrodes provided to apply electric power to the first light emission layer.
    Type: Grant
    Filed: May 26, 2006
    Date of Patent: December 29, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yasuo Ohba
  • Publication number: 20090302334
    Abstract: A light-emitting element array includes a conductive substrate; an adhesive layer disposed on the conductive substrate; a first epitaxial light-emitting stack layers disposed on the adhesive layer, the first epitaxial light-emitting stack layers including a first p-contact and an first n-contact, wherein the first p-contact and the first n-contact are disposed on the same side of the first epitaxial light-emitting stack layer; and a second epitaxial light-emitting stack layers disposed on the adhesive layer including a second p-contact and an second n-contact, wherein the second p-contact and the second n-contact are disposed on the opposite side of the epitaxial light-emitting stack layer; wherein the first epitaxial light-emitting stack layers and the second epitaxial light-emitting stack layers are electrically connected in anti-parallel.
    Type: Application
    Filed: June 10, 2009
    Publication date: December 10, 2009
    Applicant: EPISTAR CORPORATION
    Inventors: Chiu-Lin Yao, Min-Hsun Hsieh, Wen-Huang Liu
  • Publication number: 20090302335
    Abstract: A Metal Organic Vapor Phase Epitaxy step of growing a light emitting layer section 24, composed of a first Group III-V compound semiconductor, epitaxially on a single crystal growth substrate 1 by Metal Organic Vapor Phase Epitaxy, and a Hydride Vapor Phase Epitaxial Growth step of growing a current spreading layer 7 on the light emitting layer section 24 epitaxially by Hydride Vapor Phase Epitaxial Growth Method, are conducted in this order. Then, the current spreading layer 7 is grown, having a low-rate growth layer 7a positioned close to the light emitting layer side and then a high-rate growth layer 7b, having a growth rate of the low-rate growth layer 7a lower than that of the high-rate growth layer 7b, so as to provide a method of fabricating a light emitting device capable of preventing hillock occurrence while forming the thick current spreading layer.
    Type: Application
    Filed: March 19, 2007
    Publication date: December 10, 2009
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Fumitaka Kume, Masayuki Shinohara
  • Patent number: 7629619
    Abstract: A Group III nitride-based compound semiconductor light-emitting device having a quantum well structure, includes a well layer, a first layer formed on one surface of the well layer, a second layer formed on the other surface of the well layer, a first region provided in the vicinity of the interface between the first layer and the well layer, and a second region provided in the vicinity of the interface between the second layer and the well layer. A composition of the first and second regions gradually changes such that the lattice constants of the first and second layers approach the lattice constant of the well layer as a position approaches said well layer.
    Type: Grant
    Filed: January 27, 2006
    Date of Patent: December 8, 2009
    Assignee: Toyota Gosei Co., Ltd.
    Inventors: Tetsuya Taki, Mitsuhisa Narukawa, Masato Aoki, Koji Okuno, Yusuke Toyoda, Kazuki Nishijima, Shuhei Yamada
  • Publication number: 20090294756
    Abstract: The present invention discloses a light emitting diode structure and a method for fabricating the same. In the present invention, a substrate is placed in a solution to form a chemical reaction layer. Next, the substrate is etched to form a plurality of concave zones and a plurality of convex zones with the chemical reaction layer overhead. Next, the chemical reaction layer is removed to form an irregular geometry of the concave zones and convex zones on the surface of the substrate. Then, a semiconductor light emitting structure is epitaxially formed on the surface of the substrate. Thereby, the present invention can achieve a light emitting diode structure having improved internal and external quantum efficiencies.
    Type: Application
    Filed: August 10, 2009
    Publication date: December 3, 2009
    Inventors: Chia-Ming Lee, Hung-Cheng Lin, Jen-Inn Chyi
  • Patent number: 7622745
    Abstract: A n-type GaAs buffer layer 2, a n-type GaInP buffer layer 3, a n-type AlGaInP cladding layer 4, an undoped AlGaAs guide layer 5, an AlGaAs/GaAs multiquantum well (MQW) active layer 6, a first p-type AlGaInP cladding layer 7, a p-type GaInP etching stopper layer 8, a second p-type AlGaInP cladding layer 9, a C-doped AlGaAs layer (Zn-diffusion suppressing layer) 10, a p-type GaInP intermediate layer 11, and a p-type GaAs cap layer 12 are sequentially grown on a n-type GaAs substrate 1.
    Type: Grant
    Filed: August 18, 2006
    Date of Patent: November 24, 2009
    Assignee: Hitachi Cable, Ltd.
    Inventor: Ryoji Suzuki
  • Patent number: 7608862
    Abstract: A light emitting device comprises at least two lead wires, a light emitting element that is disposed on an end portion of at least one of said lead wires and connected electrically with the end portion and the other lead wire, and a phosphor that absorbs at least part of the light emitted from said light emitting element and emanates light having different wavelengths from the wavelength of the light emitted from said light emitting element, wherein the excitation spectrum of said phosphor has a flat region in a wavelength range including a primary wavelength of the light from said light emitting element.
    Type: Grant
    Filed: March 1, 2005
    Date of Patent: October 27, 2009
    Assignees: Fujikura Ltd., National Institute for Materials Science
    Inventors: Ken Sakuma, Koji Omichi, Naoto Hirosaki
  • Patent number: 7601985
    Abstract: A semiconductor light-emitting device includes: a substrate; a first conductivity type layer formed on the substrate and including a plurality of group III-V nitride semiconductor layers of a first conductivity type; an active layer formed on the first conductivity type layer; and a second conductivity type layer formed on the active layer and including a group III-V nitride semiconductor layer of a second conductivity type. The first conductivity type layer includes an intermediate layer made of AlxGa1?x?yInyN (wherein 0.001?x<0.1, 0<y<1 and x+y<1).
    Type: Grant
    Filed: September 15, 2006
    Date of Patent: October 13, 2009
    Assignee: Panasonic Corporation
    Inventors: Yoshitaka Kinoshita, Hidenori Kamei
  • Patent number: 7602116
    Abstract: A light apparatus is capable of emitting light of multiple wavelengths using a nanometer fluorescent material. The light apparatus comprises an initial light source that emits initial color light. The initial light source is covered with a transparent film member; and the inside or the surface of the film member, or the initial light source, is coated with at least one nanometer fluorescent material. The nanometer fluorescent material absorbs the initial color light and gets excited, and in the excitement it emits fluorescent light which is different from the initial color light. The initial color light and the fluorescent light combine to form light of multiple wavelengths, and the light of multiple wavelengths is emitted by the light apparatus. Besides, a combination of nanometer fluorescent materials of various particle sizes enables the emission of multiple-wavelength light of various dominant wavelengths.
    Type: Grant
    Filed: January 27, 2005
    Date of Patent: October 13, 2009
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Shih Hsiung Chan, Jian Shihn Tsang
  • Patent number: 7589357
    Abstract: A semiconductor device capable of stabilizing operations thereof is provided. This semiconductor device comprises a substrate provided with a region having concentrated dislocations at least on part of the back surface thereof, a semiconductor element layer formed on the front surface of the substrate, an insulator film formed on the region of the back surface of the substrate having concentrated dislocations and a back electrode formed to be in contact with a region of the back surface of the substrate other than the region having concentrated dislocations.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: September 15, 2009
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Masayuki Hata, Tadao Toda, Shigeyuki Okamoto, Daijiro Inoue, Yasuyuki Bessho, Yasuhiko Nomura, Tsutomu Yamaguchi
  • Patent number: 7586129
    Abstract: A single chip with multi-LED comprises a substrate on which an N-type semiconductor layer, an active layer and a P-type semiconductor layer are successively stacked. At least one N-type electrode is connected to the N-type semiconductor layer, and is exposed to an opening through the active layer and the P-type semiconductor layer. Further, at least one groove divides the P-type semiconductor layer into a plurality of separated regions, and a P-type electrode is disposed on each separated region.
    Type: Grant
    Filed: December 1, 2006
    Date of Patent: September 8, 2009
    Assignee: Advanced Optoelectronic Technology Inc.
    Inventors: Chih Peng Hsu, Chester Kuo, Chih Pang Ma
  • Patent number: 7575946
    Abstract: In a method for making a compound semiconductor including a substrate and a compound semiconductor layer having a lattice mismatch ratio of 2% or more relative to the substrate, the method includes a first epitaxial growth step of forming a buffer layer on the substrate, the buffer layer having a predetermined distribution of lattice mismatch ratios in the thickness direction so as to reduce strain; and a second epitaxial growth step of forming the compound semiconductor layer on the buffer layer. The first epitaxial growth step is carried out by metal organic chemical vapor deposition at a deposition temperature of 600° C. or less.
    Type: Grant
    Filed: March 14, 2005
    Date of Patent: August 18, 2009
    Assignee: Sony Corporation
    Inventors: Yasuo Sato, Tomonori Hino, Hironobu Narui