Made By Depositing Layers, E.g., Alternatingly Conductive And Insulating Layers (epo) Patents (Class 257/E21.016)
  • Patent number: 7371598
    Abstract: The invention includes a first step for forming a first conductive layer composed of a high melting point metal to be in contact with an insulating layer; and a second step for forming a second conductive layer by discharging a composition containing a conductive material so as to be in contact with the first conductive layer. The first conductive layer is formed prior to forming the second conductive layer by droplet discharging, and hence, adhesiveness and peel resistance of the second conductive layer are improved. Furthermore, the insulating layer is covered with the first conductive layer, thereby preventing damage or destruction of the insulating layer.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: May 13, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Osamu Nakamura, Junko Sato
  • Patent number: 7303936
    Abstract: A technique for forming anti-stiction bumps on a bottom surface of a micro-electro mechanical (MEM) structure includes a number of process steps. The MEM structure is fabricated from an assembly that includes a support substrate bonded to a single-crystal semiconductor layer, via an insulator layer. A plurality of holes are formed through the single-crystal semiconductor layer to the insulator layer on an interior portion of a defined movable structure. A portion of the insulator layer underneath the holes is removed. The holes are then filled with a conformal film that extends below a lower surface of the defined movable structure to provide a plurality of anti-stiction bumps. A trench is then formed through the single-crystal semiconductor layer to the insulator layer to form the defined movable structure. Finally, a remainder of the insulator layer underneath the defined movable structure is removed to free the defined movable structure.
    Type: Grant
    Filed: April 13, 2005
    Date of Patent: December 4, 2007
    Assignee: Delphi Technologies, Inc.
    Inventor: Dan W. Chilcott
  • Patent number: 7164203
    Abstract: A composite film comprised of three layers is formed by ALD on a substrate with a substrate interface surface. A first layer is coupled to the substrate interface surface. The first layer provides adhesion to the substrate interface surface and initiation of layer by layer ALD growth. A second layer is positioned between the first and third layers and provides a conducting diffusion barrier between the substrate and subsequent overlaying film. A third layer has a surface that is configured to provide adhesion and a texture template in preparation for a subsequent overlaying film. The composite engineered barrier structures are applied to interconnect, capacitor and transistor applications.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: January 16, 2007
    Assignee: Genus, Inc.
    Inventors: Ana R. Londergan, Thomas E. Seidel
  • Publication number: 20060118907
    Abstract: Disclosed is a metal-insulator-metal (MIM) capacitor structure formed by a metal interconnection process of trench-exposed metal layers formed on stacked interlayer insulating layers. The MIM capacitor uses a conductive layer conformally formed on the metal interconnection and/or trench regions to enlarge constituent electrode surface areas.
    Type: Application
    Filed: November 2, 2005
    Publication date: June 8, 2006
    Inventor: Duk-Seo Park