Abstract: A solar cell includes an absorber layer formed of a CIGAS, copper, indium, gallium, aluminum, and selenium. A method for forming the absorber layer provides for using an indium-aluminum target and depositing an aluminum-indium film as a metal precursor layer using sputter deposition. Additional metal precursor layers such as a CuGa layer are also provided and a thermal processing operation causes the selenization of the metal precursor layers. The thermal processing operation/selenization operation converts the metal precursor layers to an absorber layer. In some embodiments, the absorber layer includes a double graded chalcopyrite-based bandgap.

Abstract: Disclosed is a method for producing a copper indium selenium (CIS) or copper indium gallium selenium (CIGS) thin-film light-absorbing layer. The method includes forming a coating layer of CIGS slurry, removing a solvent, a dispersant and a binder from the coating layer to form a powder coat layer, pressing the powder coat layer to improve its particle packing density, and heating the powder layer to form a dense thin film. The method uses a powder process as a non-vacuum process to produce a CIS or CIGS thin film in high yield at low cost. Further disclosed is a method for manufacturing a thin-film solar cell including the production method.

Abstract: A method of p-type doping cadmium telluride (CdTe) is disclosed. The method comprising the steps of, (a) providing a first component comprising cadmium telluride (CdTe) comprising an interfacial region, and (b) subjecting the CdTe to a functionalizing treatment to obtain p-type doped CdTe, said functionalizing treatment comprising a thermal treatment of at least a portion of the interfacial region in the presence of a first material comprising a p-type dopant, and of a second material comprising a halogen. A method of making a photovoltaic cell is also disclosed.

Abstract: A solar cell includes an absorber layer formed of a CIGAS, copper, indium, gallium, aluminum, and selenium. A method for forming the absorber layer provides for using an indium-aluminum target and depositing an aluminum-indium film as a metal precursor layer using sputter deposition. Additional metal precursor layers such as a CuGa layer are also provided and a thermal processing operation causes the selenization of the metal precursor layers. The thermal processing operation/selenization operation converts the metal precursor layers to an absorber layer. In some embodiments, the absorber layer includes a double graded chalcopyrite-based bandgap.

Abstract: Methods of manufacturing a semiconductor device, a method of manufacturing a memory cell, a semiconductor device, a semiconductor processing device, and a memory cell, are provided. In one embodiment a method of manufacturing a semiconductor device is provided including forming a metal doped chalcogenide layer using light irradiation at least partially during provision of the metal.

Abstract: Disclosed is a method of fabricating a thin film solar cell including introducing a reaction solution into a reaction chamber, fixing a supporter onto a loader, disposing the loader in the reaction chamber to immerse the supporter into the reaction solution, and heating the supporter and coating a buffer layer. In addition, an apparatus of fabricating a thin film solar cell including a reaction chamber mounted with an inlet of a reaction solution and an outlet of waste water, and a loader disposed in the reaction chamber and being capable of moving up and down, is disclosed.

Abstract: A thin film transistor (“TFT”) array panel according to an exemplary embodiment of the present invention includes a substrate, a first storage electrode formed on the substrate, a first TFT formed on the substrate and separated from the first storage electrode, a first insulating layer formed on the first storage electrode and the first TFT and having a first opening disposed on the first storage electrode, a pixel electrode connected to the first TFT and overlapping the first storage electrode in the first opening, and a second insulating layer disposed between the first storage electrode and the pixel electrode in the first opening, wherein at least a portion of the boundary of the pixel electrode overlaps the first storage electrode and is disposed in the first opening. Accordingly, storage appropriate capacitance is ensured and a reduction of the aperture ratio may be decreased.

Abstract: A method of p-type doping cadmium telluride (CdTe) is disclosed. The method comprising the steps of, (a) providing a first component comprising cadmium telluride (CdTe) comprising an interfacial region, and (b) subjecting the CdTe to a functionalizing treatment to obtain p-type doped CdTe, said functionalizing treatment comprising a thermal treatment of at least a portion of the interfacial region in the presence of a first material comprising a p-type dopant, and of a second material comprising a halogen. A method of making a photovoltaic cell is also disclosed.

Abstract: A deposition method and a system are provided to deposit a CdS buffer layer on a surface of a solar cell absorber layer of a flexible workpiece from a process solution including all chemical components of the CdS buffer layer material. CdS is deposited from the deposition solution while the flexible workpiece is heated and elastically shaped by a heated shaping plate to retain the process solution on the solar cell absorber layer. The flexible workpiece is elastically shaped by pulling a back surface of the flexible workpiece into a cavity area in the heated shaping plate using an attractive force.

Abstract: A solution of a hydrazine-based precursor of a metal chalcogenide is prepared by adding an elemental metal and an elemental chalcogen to a hydrazine compound. The precursor solution can be used to form a film. The precursor solutions can be used in preparing field-effect transistors, photovoltaic devices and phase-change memory devices.

Abstract: An accelerated and simple-to-realize fast method for thermally converting metallic precursor layers on any desired substrates into semiconducting layers, and also an apparatus suitable for carrying out the method and serving for producing solar modules with high efficiency are provided. The substrates previously prepared at least with a metallic precursor layer are heated in a furnace, which is segmented into a plurality of temperature regions, at a pressure at approximately atmospheric ambient pressure in a plurality of steps in each case to a predetermined temperature up to an end temperature between 400° C. and 600° C. and are converted into semiconducting layers whilst maintaining the end temperature in an atmosphere comprising a mixture of a carrier gas and vaporous chalcogens.

Abstract: An image sensor including a second line formed at an upper part of a photodiode region as a transparent electrode for passing light. The second line is composed of a polymeric material having transparency and conductivity.

Abstract: According to embodiments of the invention, word line patterns are placed on a semiconductor substrate in a cell array region and at least one gate pattern is placed on the semiconductor substrate in a peripheral circuit region. Side walls of the word line patterns and the gate pattern are covered with word line spacers and gate spacers having the same width as that of the word line spacers, respectively. The semiconductor substrate having the word line spacers and the gate spacers is covered with an interlayer insulating layer. A self-aligned contact hole formed in the interlayer insulating layer penetrates a predetermined region between the word line patterns. The self-aligned contact hole is formed by etching the interlayer insulating layer and the word line spacers. The side walls of the self-aligned contact hole are covered with a self-aligned contact spacer having a width different from that of the gate spacers.

Abstract: A memory element comprising first and second electrodes is provided. The first electrode is tapered such that a first end of the first electrode is larger than a second end of the first electrode. A resistance variable material layer is located between the first and second electrodes, and the second end of the first electrode is in contact with the resistance variable material. Methods for forming the memory element are also provided.

Abstract: Methods of forming barrier layers and structures thereof are disclosed. A nitrogen rich region is formed at a top surface of a barrier layer by exposing the barrier layer to a nitridation treatment. The nitrogen rich region increases the oxidation resistance of the barrier layer. The barrier layers have improved diffusion barrier properties. A stack of barrier layers may be formed, with one or more of the barrier layers in the stack being exposed to a nitridation treatment.

Abstract: A method for controlling silver doping of a chalcogenide glass in a resistance variable memory element is disclosed herein. The method includes forming a silver layer over a chalcogenide glass layer. Processing the silver layer via heat treating, light irradiation, or a combination of both to form a layer comprising silver interstitially formed in a chalcogenide glass layer; silver-selenide formed in a layer comprising silver interstitially formed in a chalcogenide glass layer; or a silver doped chalcogenide glass layer having silver-selenide formed therein.