Abstract: Processes for making a solar cell by depositing various layers of components on a substrate and converting the components into a thin film photovoltaic absorber material. Processes of this disclosure can be used to control the stoichiometry of metal atoms in making a solar cell for targeting a particular concentration and providing a gradient of metal atom concentration. A selenium layer can be used in annealing a thin film photovoltaic absorber material.

Abstract: Methods for treating a semiconductor material, and for making devices containing a semiconducting material, are presented. One embodiment is a method for treating a semiconductor material that includes a chalcogenide. The method comprises contacting at least a portion of the semiconductor material with a chemical agent. The chemical agent comprises a solvent, and an iodophor dissolved in the solvent.

Abstract: Provided are methods of forming a phase change memory device. A semiconductor device having a lower electrode and an interlayer insulating layer may be prepared. The lower electrode may be surrounded by the interlayer insulating layer. Source gases, a reaction gas and a purge gas may be injected into a process chamber of a semiconductor fabrication device to form a phase change material layer on a semiconductor substrate. The source gases may be simultaneously injected into the process chamber. The phase change material layer may be in contact with the lower electrode through the interlayer insulating layer. The phase change material layer may be etched to form a phase change memory cell in the interlayer insulating layer. An upper electrode may be formed on the phase change memory cell.

Abstract: Disclosed is a method of fabricating a thin film solar cell including introducing a reaction solution into a reaction chamber, fixing a supporter onto a loader, disposing the loader in the reaction chamber to immerse the supporter into the reaction solution, and heating the supporter and coating a buffer layer. In addition, an apparatus of fabricating a thin film solar cell including a reaction chamber mounted with an inlet of a reaction solution and an outlet of waste water, and a loader disposed in the reaction chamber and being capable of moving up and down, is disclosed.

Abstract: A method for fabricating a copper indium diselenide semiconductor film is provided using substrates having a copper and indium composite structure. The substrates are placed vertically in a furnace and a gas including a selenide species and a carrier gas are introduced. The temperature is increased from about 350° C. to about 450° C. to initiate formation of a copper indium diselenide film from the copper and indium composite on the substrates.

Abstract: A method of forming a Group II-VI multijunction semiconductor device comprises providing a Group IV substrate, forming a first subcell from a first Group II-VI semiconductor material, forming a second subcell from a second Group II-VI semiconductor material, and removing the substrate. The first subcell is formed over the substrate and has a first bandgap, while the second subcell is formed over the first subcell and has a second bandgap which is smaller than the first bandgap. Additional subcells may be formed over the second subcell with the bandgap of each subcell smaller than that of the preceding subcell and with each subcell preferably separated from the preceding subcell by a tunnel junction. Prior to the removal of the substrate, a support layer is affixed to the last-formed subcell in opposition to the substrate.

Abstract: A nonvolatile memory element and associated production methods and memory element arrangements are presented. The nonvolatile memory element has a changeover material and a first and second electrically conductive electrode present at the changeover material. To reduce a forming voltage, a first electrode has a field amplifier structure for amplifying a field strength of an electric field generated by a second electrode in a changeover material. The field amplifier structure is a projection of the electrodes which projects into the changeover material. The memory element arrangement has multiple nonvolatile memory elements which are arranged in matrix form and can be addressed via bit lines arranged in column form and word lines arranged in row form.

Abstract: The thermal management and method for large scale processing of CIS and/or CIGS based thin film overlaying glass substrates. According to an embodiment, the present invention provides a method for fabricating a copper indium diselenide semiconductor film. The method includes providing a plurality of substrates, each of the substrates having a copper and indium composite structure. The method also includes transferring the plurality of substrates into a furnace, each of the plurality of substrates provided in a vertical orientation with respect to a direction of gravity, the plurality of substrates being defined by a number N, where N is greater than 5. The method further includes introducing a gaseous species including a selenide species and a carrier gas into the furnace and transferring thermal energy into the furnace to increase a temperature from a first temperature to a second temperature, the second temperature ranging from about 350° C. to about 450° C.

Abstract: Methods of fabricating integrated circuit memory cells and integrated circuit memory cells are disclosed. Formation of an integrated circuit memory cell include forming a first electrode on a substrate. An insulation layer is formed on the substrate with an opening that exposes at least a portion of a first electrode. An amorphous variable resistivity material is formed on the first electrode and extends away from the first electrode along sidewalls of the opening. A crystalline variable resistivity material is formed in the opening on the amorphous variable resistivity material. A second electrode is formed on the crystalline variable resistivity material.

Abstract: A phase change memory and a method of manufacture are provided. The phase change memory includes a layer of phase change material treated to increase the hydrophobic nature of the phase change material. The hydrophobic nature of the phase change material improves adhesion between the phase change material and an overlying mask layer. The phase change material may be treated, for example, with a plasma comprising N2, NH3, Ar, He, O2, H2, or the like.

Abstract: A method for forming a semiconductor thin film includes the steps of applying an inorganic semiconductor fine particle-dispersion solution on a substrate and drying the coating to form a semiconductor fine particle layer, and immersing the semiconductor fine particle layer in a solution to form a semiconductor thin film.

Abstract: A phase change memory device is manufactured by forming a sacrificial layer and a hard mask layer on a lower electrode; performing a first etching these layers and forming on the lower electrode a first stack pattern having a first width less than a width of the lower electrode; performing a second etching the first stack pattern and forming a second stack pattern having a second width less than the first width; forming an insulation to cover the second stack pattern; CMPing the insulation layer to expose the sacrificial layer; removing the sacrificial layer to define a contact hole; forming a lower electrode contact in the contact hole; and forming a phase change layer and an upper electrode on the insulation layer including the lower electrode contact. By manufacturing the phase change memory device in this manner, the size of the contact hole can be decreased and uniformly defined.

Abstract: A fabricating process for a substrate with an embedded passive component is provided. The fabricating process includes the following steps. First, a substrate including a top conductive layer, a bottom conductive layer, and at least a dielectric layer is provided. The top conductive layer and the bottom conductive layer are separately disposed on a top surface and a bottom surface of the dielectric layer. Next, a plurality of plating through holes is formed in the substrate. Then, the top and the bottom conductive layers are patterned to form a patterned top conductive layer and a patterned bottom conductive layer separately, and the dielectric layer is exposed in part. The patterned top conductive layer and the patterned bottom conductive layer have many traces and many trenches formed by the traces. Thereafter, the trenches are filled with a material, wherein the traces and the material are adapted for forming the passive component.

Abstract: A memory cell and a method of making the same, that includes insulating material deposited on a substrate, a bottom electrode formed within the insulating material, a plurality of insulating layers deposited above the bottom electrode and at least one of which acts as an intermediate insulating layer. Then defining a via in the insulating layers above the intermediate insulating layer, creating a channel for etch with a step spacer, defining a pore in the intermediate insulating layer, removing all insulating layers above the intermediate insulating layer, filling the entirety of the pore with phase change material, and forming an upper electrode above the phase change material. Additionally, the formation of bit line connections with the upper electrode.

Abstract: A slurry composition for chemical mechanical polishing (CMP) of a phase-change memory device is provided. The slurry composition comprises deionized water and iron or an iron compound. The slurry composition can achieve high polishing rate on a phase-change memory device and improved polishing selectivity between a phase-change memory material and a polish stop layer (e.g., a silicon oxide film), can minimize the occurrence of processing imperfections (e.g., dishing and erosion), and can lower the etch rate on a phase-change memory material to provide a high-quality polished surface. Further provided is a method for polishing a phase-change memory device using the slurry composition.

Abstract: Liquid-based indium selenide and copper selenide precursors, including copper-organoselenides, particulate copper selenide suspensions, copper selenide ethylene diamine in liquid solvent, nanoparticlulate indium selenide suspensions, and indium selenide ethylene diamine coordination compounds in solvent, are used to form crystalline copper-indium-selenide, and/or copper indium galium selenide films (66) on substrates (52).

Abstract: Precursor layers and methods of forming Group IBIIIAVIA solar cell absorbers with bandgap grading using such precursor layers are described. The Group IBIIIAVIA absorber includes a top surface with a Ga/(Ga+In) molar ratio in the range of 0.1-0.3. The Group IBIIIAVIA solar cell absorber is formed by reacting the layers of a multilayer material structure which includes a metallic film including Cu, In and Ga formed on a base, a layer of Se formed on the metallic film, and a second metallic layer substantially including Ga formed on the layer of Se.

Abstract: The present invention relates to a method for producing an n-type ZnTe system compound semiconductor single crystal having high carrier concentration and low resistivity, the ZnTe system compound semiconductor single crystal, and a semiconductor device produced by using the ZnTe system compound semiconductor as a base member. Concretely, a first dopant and a second dopant are co-doped into the ZnTe system compound semiconductor single crystal so that the number of atoms of the second dopant becomes smaller than the number of atoms of the first dopant, the first dopant being for controlling a conductivity type of the ZnTe system compound semiconductor to a first conductivity type, and the second dopant being for controlling the conductivity type to a second conductivity type different from the first conductivity type. By the present invention, a desired carrier concentration can be achieved with a doping amount smaller than in earlier technology, and crystallinity of the obtained crystal can be improved.