Abstract: A method of producing a nitride semiconductor crystal uses a metal organic chemical vapor deposition process and offers good controllability with respect to a p-type nitride semiconductor crystal. To that end, an organic metal compound of a group III element, a hydride of nitrogen, and an organic compound having any of the partial structures C—C—O, C—C?O, C?C—O, C?C?O, C?C—O, and C—O—C are used as source materials, and by a metal organic chemical vapor deposition process, C and O atoms are simultaneously introduced into the crystal to obtain p-type conductivity.

Abstract: The present invention provides a method for producing an n-type Group III nitride semiconductor product having a high Si concentration and exhibiting favorable crystallinity. In the production method, specifically, an AlN buffer layer is formed on a sapphire substrate by MOCVD, and then a first layer (thickness: 2 ?m) is formed from undoped GaN on the buffer layer by MOCVD at 1,140° C. Subsequently, a second layer (thickness: 200 nm) is formed from SiO2 on the first layer by plasma CVD, and then the second layer is removed by use of BHF (buffered hydrofluoric acid). Next, a GaN layer (thickness: 50 nm) is grown, by MOCVD at 1,140° C., on the first layer exposed by removal of the second layer without supply of an n-type dopant gas. Thus, on the first layer is provided a third layer formed of n-type GaN doped with Si at a high concentration and exhibiting favorable crystallinity.

Abstract: A nitride semiconductor device includes a first nitride semiconductor layer formed on a substrate, a defect induced layer formed on the first nitride semiconductor layer, and a second nitride semiconductor layer formed on the defect induced layer, contacting the defect induced layer, and having an opening through which the defect induced layer is exposed. The defect induced layer has a higher crystal defect density than those of the first and second nitride semiconductor layers.

Abstract: A semiconductor wafer is produced at a step of forming a lattice relaxation or a partly lattice-relaxed strain relaxation SiGe layer on an insulating layer in a SOI wafer comprising an insulating layer and a SOI layer, wherein at least an upper layer side portion of the SiGe layer is formed on the SOI layer at a gradient of Ge concentration gradually decreasing toward the surface and then subjected to a heat treatment in an oxidizing atmosphere.

Abstract: This disclosure describes a semiconductor device that can be used as a mixer at RF frequencies extending from a few tens of GHz into the THz frequency range. The device is composed of narrow bandgap semiconductors grown by solid source molecular beam epitaxy. The device can comprise a GaSb substrate, a AlSb layer on the GaSb substrate, a In0.69Al0.31As0.41Sb0.59 layer, on the AlSb layer and wherein the In0.69Al0.31As0.41Sb0.59 comprises varying levels of Te doping, a In0.27Ga0.73Sb layer on the In0.69Al0.31As0.41 Sb0.59 layer, wherein the In0.27Ga0.73Sb layer is Be doped, wherein the first section of the In0.69Al0.31As0.41Sb0.59 layer has is Te doped, wherein the second section of the In0.69Al0.31As0.41Sb0.59 layer has a grade in Te concentration, and wherein the third section of the In0.69Al0.31As0.41Sb0.59 layer is Te doped.

Abstract: A method for fabricating a back-illuminated semiconductor imaging device on an ultra-thin semiconductor-on-insulator wafer (UTSOI) is disclosed. The UTSOI wafer includes a mechanical substrate, an insulator layer, and a seed layer. At least one dopant is applied to the semiconductor substrate. A first portion of an epitaxial layer is grown on the seed layer. A predefined concentration of carbon impurities is introduced into the first portion of the epitaxial layer. A remaining portion of the epitaxial layer is grown. During the epitaxial growth process, the at least one dopant diffuses into the epitaxial layer such that, at completion of the growing of the epitaxial layer, there exists a net dopant concentration profile which has an initial maximum value at an interface between the seed layer and the insulator layer and which decreases monotonically with increasing distance from the interface within at least a portion of at least one of the semiconductor substrate and the epitaxial layer.

Abstract: A doped silicon layer is formed in a batch process chamber at low temperatures. The silicon precursor for the silicon layer formation is a polysilane, such as trisilane, and the dopant precursor is an n-type dopant, such as phosphine. The silicon precursor can be flowed into the process chamber with the flow of the dopant precursor or separately from the flow of the dopant precursor. Surprisingly, deposition rate is independent of dopant precursor flow, while dopant incorporation linearly increases with the dopant precursor flow.

Abstract: This disclosure describes a semiconductor device that can be used as a mixer at RF frequencies extending from a few tens of GHz into the THz frequency range. The device is composed of narrow bandgap semiconductors grown by solid source molecular beam epitaxy. The device can comprise a GaSb substrate, a AlSb layer on the GaSb substrate, a In0.69Al0.31As0.41Sb0.59 layer, on the AlSb layer and wherein the In0.69Al0.31As0.41Sb0.59 comprises varying levels of Te doping, a In0.27Ga0.73Sb layer on the In0.69Al0.31As0.41 Sb0.59 layer, wherein the In0.27Ga0.73Sb layer is Be doped, wherein the first section of the In0.69Al0.31As0.41Sb0.59 layer has is Te doped, wherein the second section of the In0.69Al0.31As0.41Sb0.59 layer has a grade in Te concentration, and wherein the third section of the In0.69Al0.31As0.41Sb0.59 layer is Te doped.

Abstract: The invention provides a forming process of a thin film pattern capable of properly realizing a thin line. The forming process of a thin film pattern of the invention can be a process of forming a thin film pattern by arranging a functional liquid on a substrate P. The process can include a bank forming step to set up banks protrudingly on the substrate corresponding to the thin film pattern, a repellent liquefaction step of imparting a liquid repellent property to the bank by CF4 plasma processing, and a material arranging step of arranging the functional liquid between the banks imparted with the liquid repellent property.