Abstract: In order to provide a method for producing semiconductor devices that can use the highly productive W to W method, and achieve a high yield, a method for producing semiconductor devices comprises a step (S401) in which a reconstituted wafer is prepared by replacing defective chips with non-defective chips, a step (S403) in which the reconstituted wafer and the base wafer are connected to one another by laminating, a step (S406) in which through-electrodes are formed in the reconstituted wafer, and a step (S409) in which a separate reconstituted wafer is laminated onto and connected to the reconstituted wafer having through-electrodes.

Abstract: A vacuum assembly used for warming processed substrates above the dew point to prevent unwanted moisture on the processed substrate surfaces as well as reducing negative impact on manufacturing throughput. The vacuum assembly includes a processing chamber, a substrate handling robot, and a heater which may be an optical heater. The processing chamber is configured to cryogenically process one or more substrates. The transfer chamber is connected to the processing chamber and houses the substrate handling robot. The substrate handling robot is configured to displace one or more substrates from the processing chamber to the transfer chamber. The heater is connected to the transfer chamber above the substrate handling robot such that the heater emits energy incident on the substrate when the substrate handling robot displaces the substrate in the transfer chamber.

Abstract: Embodiments of the present invention provide apparatus and methods for supporting and controlling a substrate during thermal processing. One embodiment of the present invention provides an apparatus for processing a substrate. The apparatus includes a chamber body defining an inner volume, a substrate support disposed in the inner volume, and an auxiliary force assembly configured to apply an auxiliary force to the substrate. Another embodiment provides a gas delivery assembly configured to adjust a thermal mass of a fluid flow delivered to position, control and/or rotate a substrate.

Abstract: An array test method of an organic light emitting diode (OLED) display substrate is provided. The OLED display substrate includes a plurality of pixel circuits. Each pixel circuit includes an anode, a first transistor for transmitting a data signal that controls an amount of light emission of an OLED according to a scan signal, a driving transistor for receiving the data signal, generating a driving current corresponding to the data signal, and transmitting the driving current to the OLED, and a second transistor for diode-connecting a gate electrode and a drain electrode of the driving transistor.

Abstract: A display panel, in which a plurality of drive units in a transistor array substrate include a faulty drive unit, and a plurality of pixel electrodes include a first pixel electrode corresponding to the faulty drive unit and a second drive unit corresponding to a non-faulty drive unit. A portion of the second pixel electrode is embedded in the corresponding contact hole, and is in contact with a power supply pad of the non-faulty drive unit, so that the second pixel electrode is electrically connected to the non-faulty drive unit. An insulator is inserted between the first pixel electrode and a power supply pad of the faulty drive unit, so that the first pixel electrode is electrically insulated from the faulty drive unit.

Abstract: A monitor wafer for use in monitoring a preclean process and method of making same are described. One embodiment is a monitor wafer comprising a silicon base layer; a capping layer disposed on the silicon base layer; and a barrier layer disposed on the USG layer. The monitor wafer further comprises a copper (“Cu”) seed layer disposed on the barrier layer; and a thick Cu layer disposed on the Cu seed layer.

Abstract: A silicon carrier structure for electronic packaging includes a base substrate, a silicon carrier substrate disposed on the base substrate, a memory chip disposed on the silicon carrier substrate, a microprocessor chip disposed on the silicon carrier substrate, an input/output chip disposed on the silicon carrier substrate, and a clocking chip disposed on the silicon carrier substrate.

Abstract: Drive units arranged on a transistor array substrate include faulty drive units. The pixel electrodes include first pixel electrodes and second pixel electrodes, the first pixel electrodes corresponding one-to-one to the faulty drive units, and the second pixel electrodes corresponding one-to-one to the non-faulty drive units, a portion of each second pixel electrode is embedded in the contact hole corresponding thereto, and is in contact with a power supply pad of the non-faulty drive unit corresponding thereto, so that the second pixel electrode is electrically connected to the non-faulty drive unit. Each first pixel electrode is electrically insulated from the faulty drive unit corresponding thereto, and is connected by a connector to any of the second pixel electrodes adjacent thereto. A surface of each connector facing the interlayer insulation film is entirely in contact with the interlayer insulation film.

Abstract: Methods and apparatus for providing constant emissivity of the backside of susceptors are described. Provided is a method comprising: providing a susceptor in a deposition chamber, the susceptor comprising a susceptor plate and a layer comprising an oxide, a nitride, an oxynitride, or combinations thereof, the layer being stable in the presence of the reactive process gases; and locating the wafer on a support surface of the susceptor plate. The method can further comprise selectively depositing an epitaxial layer or a non-epitaxial layer on a surface of the wafer. The method can also further comprise selectively etching to maintain the oxide, nitride, oxynitride, or combinations thereof layer.

Abstract: Recess markers are implanted in a material during deposition and used during etching of the material for in-situ removal rate and removal homogeneity-over-radius definitions. An embodiment includes depositing a material on a substrate, implanting two dopants at two predetermined times, respectively, during deposition of the material, etching the material, detecting depths of the two dopants during etching, calculating the removal rate of the material in situ from the depths of the two dopants, and determining from the removal rate an etching stop position. Embodiments further include laterally implanting two dopants in a material at a predetermined depth during deposition, etching the material, detecting the positions and intensities of the two dopants during etching, and calculating lateral homogeneity of the material in situ from intensities of the dopants. Embodiments further include in situ corrective action for the removal process based on the determined removal rate and lateral homogeneity.

Abstract: A substrate including phosphor is remotely illuminated by an LED. Optical radiation that emerges through the substrate is measured. Portions of the substrate, such as raised features on the substrate, are then selectively removed responsive to the measuring, so as to obtain a desired optical radiation. In removing portions of the substrate, holes may be drilled through the substrate to provide a separate path for light from the LED that does not pass through the phosphor. Alternatively, a separate LED may be provided outside the dome.

Abstract: Embodiments of the present invention provide apparatus and method for reducing non uniformity during thermal processing. One embodiment provides an apparatus for processing a substrate comprising a chamber body defining a processing volume, a substrate support disposed in the processing volume, wherein the substrate support is configured to rotate the substrate, a sensor assembly configured to measure temperature of the substrate at a plurality of locations, and one or more pulse heating elements configured to provide pulsed energy towards the processing volume.

Abstract: A method for large scale manufacture of photovoltaic devices includes loading a substrate into a load lock station and transferring the substrate in a controlled ambient to a first process station. The method includes using a first physical deposition process in the first process station to cause formation of a first conductor layer overlying the surface region of the substrate. The method includes transferring the substrate to a second process station, and using a second physical deposition process in the second process station to cause formation of a second layer overlying the surface region of the substrate. The method further includes repeating the transferring and processing until all thin film materials of the photovoltaic devices are formed. In an embodiment, the invention also provides a method for large scale manufacture of photovoltaic devices including feed forward control.

Abstract: Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).

Abstract: A method for detecting soft errors in an integrated circuit (IC) due to transient-particle emission, the IC comprising at least one chip and a substrate includes mixing an epoxy with a radioactive source to form a hot underfill (HUF); underfilling the chip with the HUF; sealing the underfilled chip; measuring a radioactivity of the HUF at an edge of the chip; measuring the radioactivity of the HUF on a test coupon; testing the IC for soft errors by determining a current radioactivity of the HUF at the time of testing based on the measured radioactivity; and after the expiration of a radioactive decay period of the radioactive source, using the IC in a computing device by a user.

Abstract: Embodiments of the disclosure relate to a method of evaluating a semiconductor wafer dicing process, comprising providing evaluation lines extending in at least one scribe line of the wafer, dicing the wafer in the scribe line, evaluating the length of the evaluation lines, providing an information about their length, and using the information to evaluate the dicing process.

Abstract: In some embodiments of the invention, encapsulated semiconducting nanomaterials are described. In certain embodiments the nanostructures described are semiconducting nanomaterials encapsulated with ordered carbon shells. In some aspects a method for producing encapsulated semiconducting nanomaterials is disclosed. In some embodiments applications of encapsulated semiconducting nanomaterials are described.

Abstract: According to one embodiment, a method includes acquiring information about a two-dimensional distribution of secondary electron intensity for a measurement target pattern, extracting, by a first method, an edge position of an edge for correction value acquisition, extracting, by a second method, an edge position of the edge for correction value acquisition, acquiring a difference between the edge positions extracted by the first and second methods, as a correction value, extracting, by the second method, an edge position of a desired edge based on the information about the two-dimensional distribution, and correcting the edge position of the desired edge based on the correction value.

Abstract: An electrical system and method for making the same includes a main circuit board and a plurality of contact pads located on a surface of the main circuit board. The contact pads are electrically conductive. Additionally, an integrated circuit package having at least one electrical device is attached to the surface of the main circuit board. A ball grid array made from a plurality of solder balls is located on a bottom side of the integrated circuit package. The ball grid array has a plurality of solder balls being electrically conductive and in electrical communication with the at least one electrical device. The solder balls further include solder balls of different material properties.

Abstract: Disclosed is a technology that can obtain high in-plane uniformity of etching while etching a substrate using plasma. A proper temperature of a focus ring capable of performing etching having high in-plane uniformity is identified in advance for each of the multilayers formed on a wafer, the temperature is reflected to a processing recipe as a set temperature, and a heating mechanism and a cooling mechanism are controlled such that the temperature of the focus ring is within an appropriate temperature range including the set temperature thereof for each of the layers to be successively etched. Heat of the focus ring is radiated using a laser and is discharged to a supporting table without using a heater, to independently separate the heating mechanism and the cooling mechanism from each other.

Abstract: With the stage kept in an as-heated state, the semiconductor wafer is placed over the stage (step S10). Then, with the elapse of first time, a controller causes a pressure inside a vacuum chamber to rise to a second pressure higher than a first pressure (step S40). After the semiconductor wafer is placed over the stage, a pressure difference between a pressure inside the vacuum chamber and a pressure inside the adsorption port is set to a minimum value at which the semiconductor wafer is not allowed to slide over the protrusions. Further, in step S40 as well, the pressure difference is kept at the minimum value at which the semiconductor wafer is not allowed to slide over the protrusions.

Abstract: A device is disclosed for releasably receiving a singulated semiconductor chip having a first main surface and a second main surface opposite the first main surface. The device includes a support structure. At least one elastic element is arranged on the support structure. Electrical contact elements are arranged on the at least one elastic element and adapted to be contacted to the first main surface of the semiconductor chip. A foil is adapted to be arranged over the second main surface of the semiconductor chip.

Abstract: A method for producing VDMOS transistors in which a specific layer arrangement and a specific method sequence allow setting up an improved gate contact when simultaneously producing source and gate contacts using a single contact hole mask (photo mask).

Abstract: A semiconductor device includes a semiconductor chip with a gate electrode, and a stress detecting element placed on a surface of the semiconductor chip, and which detects stress applied to the surface. The semiconductor device controls a control signal to be applied to the gate electrode in response to stress detected by the stress detecting element. The stress detecting element is preferably provided as a first stress detecting element which detects stress applied to a central portion of the semiconductor chip in plan view. The stress detecting element is preferably provided as a second stress detecting element which detects stress applied to a circumferential portion of the semiconductor chip in plan view.

Abstract: A process system adapted for processing of or with a material therein. The process system includes: a sampling region for the material; an infrared photometric monitor constructed and arranged to transmit infrared radiation through the sampling region and to responsively generate an output signal correlative of the material in the sampling region, based on its interaction with the infrared radiation; and process control means arranged to receive the output of the infrared photometric monitor and to responsively control one or more process conditions in and/or affecting the process system.

Abstract: An integrated circuit (IC) has an under-bump metal (UBM) pad disposed between a solder bump and a semiconductor portion of the IC. A UBM layer is disposed between the solder bump and the semiconductor portion and includes the UBM pad and a UBM field. The UBM pad has a contact perimeter formed with the solder bump. The UBM pad extends beyond the contact perimeter a sufficient distance to block alpha particles emitted from the surface of the solder bump from causing an upset event in the semiconductor portion. The UBM field is separated from each UBM pad by a gap extending from the UBM pad to the UBM field so as to electrically isolate the UBM field from the UBM pad.

Abstract: A silicon carbide semiconductor device is provided that includes a semiconductor layer made of silicon carbide and having a surface tilted at an angle in a range of not less than 50° and not more than 65° relative to the {0001} plane, and an insulating film formed to contact the surface of the semiconductor layer. A maximum value of the nitrogen concentration in a region within 10 nm from the interface between the semiconductor layer and the insulating film is not less than 1×1021 cm?3, and the semiconductor device has a channel direction in a range of ±10° relative to the direction orthogonal to the <?2110> direction in the surface of the semiconductor layer. A method of manufacturing the silicon carbide semiconductor device is also provided.

Abstract: Certain embodiments provide a semiconductor device manufacturing system including processing devices used in processing processes, a wafer transfer device, a processing characteristic measuring unit, a device characteristic measuring unit, data server, and an analysis server. The wafer transfer device conveys the wafer to the processing devices such that a direction of the wafer differs according to each processing process. The data server stores data. The data include processing characteristic data that is the processing characteristic of the wafer for each processing process measured by the processing characteristic measuring unit, the direction of the wafer for each processing process, and device characteristic data that is the device characteristic of the wafer measured by the device characteristic measuring unit.

Abstract: The present invention provides a substrate processing method to process a substrate including at least a process layer, an intermediate layer, and a mask layer which are stacked in this order. The mask layer includes an aperture configured to expose a portion of the intermediate layer. The substrate processing method includes a material deposition step of depositing a material on a side surface of the aperture and exposing a portion of the process layer by etching the exposed portion of the intermediate layer by plasma generated from a deposit gas, and an etching step of etching the exposed portion of the process layer.

Abstract: A method for manufacturing system includes 3D-IC comprising at least first layer of first transistors and second layers of second transistors and, perform a test for the circuit constructed with said first transistors and switch in function constructed with said second transistors to replace function constructed with said first transistors.

Abstract: For the production of a white LED having a predetermined color temperature, a blue LED (2a-2d) or a UV LED is coated with a conversion layer (5) which absorbs the blue light or UV light and emits light of greater wavelength. In accordance with the invention, the exact wavelength of the LED (2a-2d) is determined and the color conversion agent (5) is applied over this LED (2a-2d) in a quantity dependent upon the determined wavelength. Through this, the tolerance of the color temperature can be significantly reduced. The color conversion agent may be applied by means of dispenser or stamp, and the quantity and/or concentration selected in dependence upon the determined wavelength. Inkjet printing, deposition from the gas phase or selective removal by means of a laser is, however, also possible. The invention also relates to light sources produced in accordance with this method.

Abstract: Methods, systems, and apparatuses are described for improved integrated circuit packages. An integrated circuit package includes a semiconductor substrate and a semiconductor die. The semiconductor substrate has opposing first and second surfaces, a plurality of vias through the semiconductor substrate, and routing one or both surfaces of the semiconductor substrate. The die is mounted to the first surface of the semiconductor substrate. An encapsulating material encapsulates the die on the first surface of the semiconductor substrate.

Abstract: A semiconductor device manufacturing method includes the steps of: forming a transistor on a surface side of a silicon layer of a silicon-on-insulator substrate, the silicon-on-insulator substrate being formed by laminating a substrate, an insulating layer, and the silicon layer; forming a first insulating film covering the transistor and a wiring section including a part electrically connected to the transistor on the silicon-on-insulator substrate; measuring a threshold voltage of the transistor through the wiring section; forming a supporting substrate on a surface of the first insulating film with a second insulating film interposed between the supporting substrate and the first insulating film; removing at least a part of the substrate and the insulating layer on a back side of the silicon-on-insulator substrate; and adjusting the threshold voltage of the transistor on a basis of the measured threshold voltage.

Abstract: A method for making a sample for evaluation of laser irradiation position and evaluating the sample, and an apparatus which is switchable between a first mode of modification of semiconductor and a second mode of making and evaluating the sample. Specifically, a sample is made by irradiating a semiconductor substrate for evaluation with a pulse laser beam while the semiconductor substrate is moved for evaluation at an evaluation speed higher than a modifying treatment speed, each relative positional information between pulse-irradiated regions in the sample is extracted, and stability of the each relative positional information between pulse-irradiated regions is evaluated. The evaluation speed is such a speed that separates the pulse-irradiated regions on the sample from each other in a moving direction.

Abstract: A method and apparatus for depositing a phosphor via a compression molding process, the method involving forming a plurality of light-emitting devices on a wafer, evaluating emission characteristics of the plurality of light-emitting devices, and re-arraying and aligning the plurality of light-emitting devices on a carrier substrate according to the emission characteristics; depositing the phosphor on the plurality of re-arrayed light-emitting devices via a compression molding process; and dicing the plurality of re-arrayed light-emitting devices on the carrier substrate.

Abstract: A method to manufacture an optical device with enhanced high frequency performance is disclosed. The method includes steps of: (a) forming semiconductor layers on a semiconductor substrate, (b) etching the semiconductor layers by using a mask to form a plurality of diffraction gratings, where the mask provides a plurality of periodic patterns each corresponding to respective gratings and having a specific pitch different from others, (c) forming an active layer on the etched semiconductor layers, (d) measuring a maximum optical gain of the active layer, (e) selecting one of diffraction gratings based on the measured optical gain, and (f) forming a current confinement structure aligned with the selected diffraction grating.

Abstract: By providing a protective layer in an intermediate manufacturing stage, an increased surface protection with respect to particle contamination and surface corrosion may be achieved. In some illustrative embodiments, the protective layer may be used during an electrical test procedure, in which respective contact portions are contacted through the protective layer, thereby significantly reducing particle contamination during a respective measurement process.

Abstract: A method and system for repairing photomasks is disclosed. A scanning electron microscope (SEM) is used to identify, measure, and correct defects. The SEM is operated in multiple modes, including a measuring mode and a repair mode. The repair mode is of higher landing energy and exposure time than the measuring mode, and induces shrinkage in the photoresist to correct various features, such as vias that are too small.

Abstract: An IC including first metal layer having wiring running in a first direction; a second metal layer having wiring running in a second direction perpendicular to the first direction; and a first via layer between the first metal layer and the second metal layer, the first via layer including a viabar interconnecting the first metal layer to the second metal layer at a first location where the first metal layer vertically coincides with the second metal layer and, at a second location, connecting to wiring of the first metal layer but not wiring of the second metal layer.

Abstract: An optical wavelength monitor photodiode integrated on a wafer and/or an optical device and coupled to optical components thereof provides wavelength measurement. The optical wavelength monitor includes a photodiode configured to output a signal that is representative of a wavelength of the light. An additional photodiode may be included in the optical wavelength monitor, each photodiode differing from the other in operating characteristics. The monitor may be used in testing the optical device while in wafer form and when the optical device has been cleaved from the wafer at the bar level. Testing/monitoring of the optical device may also be performed during use, for example, to control the wavelength of a laser such as a tunable laser.

Abstract: An object is to provide a method for manufacturing a lighting device, in which a problem of a short circuit between an upper electrode and a lower electrode of a light-emitting element is solved without reducing a light-emitting property of a normal portion of the light-emitting element to the utmost. In a light-emitting element including an upper electrode, an electroluminescent layer, and a lower electrode, a short-circuited portion that is undesirably formed between the upper electrode and the lower electrode is irradiated with a laser beam, whereby a region where the short-circuited portion is removed is formed, and then the region is filled with an insulating resin having a light-transmitting property. Thus, the problem of the short circuit between the upper electrode and the lower electrode is solved and yield of a lighting device is improved.

Abstract: The instant disclosure relates to a device and method for recrystallising a silicon wafer or a wafer comprising at least one silicon layer. The silicon wafer or the at least one silicon layer of the wafer is totally molten.

Abstract: A method and a system for providing fusing after packaging of semiconductor devices are disclosed. In one embodiment, a semiconductor device is provided comprising a substrate comprising a fuse area, at least one fuse disposed in the fuse area, and at least one layer disposed over the substrate, wherein the at least one layer comprises at least one opening exposing the at least one fuse.

Abstract: A method includes depositing a thin film on a first surface of a first substrate and moving a second surface of a second substrate into contact with the thin film such that the thin film is located between the first and second surfaces. The method further includes generating electromagnetic (EM) radiation of a first wavelength, the first wavelength selected such that the thin film absorbs EM radiation at the first wavelength. Additionally, the method includes directing the EM radiation through one of the first and second substrates and onto a region of the thin film until the first and second substrates are fused in the region.

Abstract: The invention provides a dry etching method capable of obtaining a good profile with little side etch without receiving the restriction of a micro loading effect. A dry etching method for etching a sample having formed on the surface thereof a pattern with an isolated portion and a dense portion using plasma comprises a first etching step using an etching gas containing a CF-based gas and a nitrogen gas in which an etching rate of a dense portion of the pattern is greater than the etching rate of the isolated portion of the mask pattern, and a second etching step in which the etching rate of the isolated portion of the pattern is greater than the etching rate of the dense portion of the pattern.

Abstract: Methods, systems, and devices associated with surface modifying a semiconductor material are taught. One such method includes providing a semiconductor material having a target region and providing a dopant fluid layer that is adjacent to the target region of the semiconductor material, where the dopant fluid layer includes at least one dopant. The target region of the semiconductor material is lased so as to incorporate the dopant or to surface modify the semiconductor material. During the surface modification, the dopant in the dopant fluid layer is actively replenished.

Abstract: A semiconductor memory includes a memory cell array that includes data cells of x bits and redundant cells of y bits for each word; a position-data storage unit that stores, for each word, defective-cell position data of defective cells of the data cells and the redundant cells; and a read circuit that reads data from cells of x bits based on the defective-cell position data stored in the position-data storage unit for a specified word of which address is specified as read address, the cells of x bits being formed by the data cells of x bits and the redundant cells of y bits of the specified word other than the defective cells.

Abstract: A method of updating calibration data of a first position detection system adapted to determine the position of an object, is presented. The first position detection system includes a target and a plurality of sensors one of which is mounted on an object and the calibration data including coefficients relating an apparent measured position to an actual position and which can be used to convert an apparent measured position to an actual position thereby to correct for physical imperfections in the first position detection system and enable determination of the actual position from the apparent measured position.

Abstract: In order to manufacture an epitaxial wafer having satisfactory flatness over its entire surface, epitaxial layers are experimentally grown upon actual wafer samples under various different layer formation conditions, the thickness profiles are measured over the entire surfaces of these wafers before and after growth of the layers, and, from the differences thereof, layer thickness profiles over the entire areas of the epitaxial layers under the various different layer formation conditions are ascertained and stored. Thereafter, the thickness profile of a substrate wafer is measured over its entire area, this is added to each of the layer thickness profiles under the various different layer formation conditions which have been stored, and the planarities of the manufactured wafers which would be manufactured under these various different layer formation conditions are predicted.

Abstract: In a substrate processing control method, a first process acquires a first-reflectance-spectrum of a beam reflected from the first-fine-structure and a second-reflectance-spectrum of a beam reflected from the second-fine-structure for each of varying-pattern-dimensions of the first-fine-structure when the pattern-dimension of the first-fine-structure is varied. A second process acquires reference-spectrum-data for each of the varying-pattern-dimensions of the first-fine-structure by overlapping the first-reflectance-spectrum with the second-reflectance-spectrum. A third process actually measures beams reflected from the first and the second-fine-structure, respectively, after irradiating light beam on to the substrate and acquiring reflectance-spectrums of the actual-measured beams as actual-measured spectrum data.