By Using Super-conducting Material (epo) Patents (Class 257/E21.594)
  • Patent number: 8319277
    Abstract: A semiconductor device that includes multiple logic circuit cells having respective logic circuits formed therein and multiple interconnects connected to the corresponding logic circuit cells. At least one of the interconnects has an opening formed therein so as to have an opening ratio different from one or more of the opening ratios of the remaining interconnects.
    Type: Grant
    Filed: January 22, 2010
    Date of Patent: November 27, 2012
    Assignee: Fujitsu Limited
    Inventors: Hideki Kitada, Takahiro Kimura