Abstract: When a gate insulating film is formed on a silicon carbide substrate, the silicon carbide substrate is first oxidized with an oxidation reactant gas to form the gate insulating film on the surface of the silicon carbide substrate. The silicon carbide substrate on which the gate insulating film has been formed is nitrided with a nitriding reactant gas. The oxidation and the nitriding are performed continuously in the same diffusion furnace while a temperature of 1200° C. to 1300° C. inclusive is maintained.

Abstract: A trench groove is formed and a silicon oxide film is buried in the periphery of a channel region of (0001) surface 4h-SiC semiconductor element. The oxide film in the trench groove is defined in such a planar layout that a tensile strain is applied along the direction of the c-axis and a compressive strain is applied along two or more of axes on a plane perpendicular to the c-axis. For example, trench grooves buried with an oxide film may be configured to such a layout that they are in a trigonal shape surrounding the channel, or are arranged symmetrically with respect to the channel as a center when arranged discretely.

Abstract: This semiconductor device includes a silicon carbide layer of a first conductivity type having first and second principal surfaces and including an element region and a terminal region surrounding the element region on the first principal surface. The silicon carbide layer includes a first dopant layer of the first conductivity type contacting with the first principal surface and a second dopant layer of the first conductivity type located closer to the second principal surface than the first dopant layer is. The terminal region has, in its surface portion with a predetermined depth under the first principal surface, a terminal structure including respective portions of the first and second dopant layers and a ring region of a second conductivity type running through the first dopant layer to reach the second dopant layer. The dopant concentration of the first dopant layer is twice to five times as high as that of the second dopant layer 22.

Abstract: A method for manufacturing a silicon carbide semiconductor device includes the following steps. A silicon carbide substrate is heated in an atmosphere containing oxygen, so as to form a gate insulating film on and in contact with the silicon carbide substrate. The silicon carbide substrate having the gate insulating film is heated at 1250° C. or more in an atmosphere containing nitrogen and nitrogen monoxide. A value obtained by dividing partial pressure of the nitrogen monoxide by a total of partial pressure of the nitrogen and the partial pressure of the nitrogen monoxide in the second heating step is more than 3% and less than 10%. Accordingly, there can be provided a method for manufacturing a silicon carbide semiconductor device having high mobility.

Abstract: A silicon carbide semiconductor device includes a silicon carbide substrate and a contact electrode. The silicon carbide substrate includes an n type region and a p type region that makes contact with the n type region. The contact electrode makes contact with the n type region and the p type region. The contact electrode contains Ni atoms and Si atoms. The number of the Ni atoms is not less than 87% and not more than 92% of the total number of the Ni atoms and the Si atoms. Accordingly, there can be provided a silicon carbide semiconductor device, which can achieve ohmic contact with an n type impurity region and can achieve a low contact resistance for a p type impurity region, as well as a method for manufacturing such a silicon carbide semiconductor device.

Abstract: To provide: a technique capable of suppressing a titanium nitride film that is exposed at the side surface of an opening from turning into a titanium oxide film even when water permeates the opening over a pad from outside a semiconductor device and thus improving the reliability of the semiconductor device; and a technique capable of suppressing a crack from occurring in a surface protective film of a pad and improving the reliability of a semiconductor device. An opening is formed so that the diameter of the opening is smaller than the diameter of another opening and the opening is included in the other opening. Due to this, it is possible to cover the side surface of an antireflection film that is exposed at the side surface of the other opening with a surface protective film in which the opening is formed. As a result of this, it is possible to form a pad without exposing the side surface of the antireflection film.

Abstract: A silicon carbide semiconductor device is provided that includes a semiconductor layer made of silicon carbide and having a surface with a trench having a sidewall formed of a crystal plane tilted at an angle in a range of not less than 50° and not more than 65° relative to the {0001} plane, and an insulating film formed to contact the sidewall of the trench. A maximum value of the nitrogen concentration in a region within 10 nm from the interface between the sidewall of the trench and the insulating film is not less than 1×1021 cm?3, and the semiconductor device has a channel direction in a range of ±10° relative to the direction orthogonal to the <?2110> direction in the sidewall of the trench. A method of manufacturing the silicon carbide semiconductor device is also provided.

Abstract: To provide: a technique capable of suppressing a titanium nitride film that is exposed at the side surface of an opening from turning into a titanium oxide film even when water permeates the opening over a pad from outside a semiconductor device and thus improving the reliability of the semiconductor device; and a technique capable of suppressing a crack from occurring in a surface protective film of a pad and improving the reliability of a semiconductor device. An opening is formed so that the diameter of the opening is smaller than the diameter of another opening and the opening is included in the other opening. Due to this, it is possible to cover the side surface of an antireflection film that is exposed at the side surface of the other opening with a surface protective film in which the opening is formed. As a result of this, it is possible to form a pad without exposing the side surface of the antireflection film.

Abstract: A semiconductor processing component has an outer surface portion comprised of silicon carbide, the outer surface portion having a skin impurity level and a bulk impurity level. The skin impurity level is average impurity level from 0 nm to 100 nm of depth into the outer surface portion, the bulk impurity level is measured at a depth of at least 3 microns into the outer surface portion, and the skin impurity level is not greater than 80% of the bulk impurity level.

Abstract: A method for manufacturing a SiC semiconductor device includes: forming an impurity layer in a SiC layer; and forming an oxide film on the SiC layer. The forming the impurity layer includes: implanting an impurity in the SiC layer; applying a cap layer on the SiC layer; annealing the cap layer to be transformed to a carbon layer; annealing the SiC layer to activate the impurity with covering the SiC layer with the carbon layer; removing the carbon layer; and performing a sacrifice oxidation process. The performing the sacrifice oxidation process includes: forming a sacrifice oxide film; and removing the sacrifice oxide film. The forming the oxide film is performed after the performing the sacrifice oxidation process.

Abstract: A process is described for producing silicon carbide crystals having increased minority carrier lifetimes. The process includes the steps of heating and slowly cooling a silicon carbide crystal having a first concentration of minority carrier recombination centers such that the resultant concentration of minority carrier recombination centers is lower than the first concentration.

Abstract: A silicon carbide semiconductor device is disclosed. The silicon carbide semiconductor device includes a substrate; a drift layer having a first conductivity type and located on a first surface of the substrate; and a vertical type semiconductor element. The vertical type semiconductor element includes: an impurity layer having a second conductivity type, and located in a surface portion of the drift layer; and a first conductivity type region located in the drift layer, spaced away from the impurity layer, located closer to the substrate than the impurity layer, and having an impurity concentration higher than the drift layer.

Abstract: A method of manufacturing a silicon carbide semiconductor device includes forming a trench for a MOS gate in an SiC substrate by dry etching. Thereafter, the substrate with the trench is heat treated. The heat treatment includes heating the substrate in an Ar gas atmosphere or in a mixed gas atmosphere containing SiH4 and Ar at a temperature between 1600° C. and 1800° C., and thereafter in a hydrogen gas atmosphere at a temperature between 1400° C. and 1500° C. The present manufacturing method smoothens the trench inner surface and rounds the corners in the trench to prevent the electric field from localizing thereto.

Abstract: A silicon carbide metal semiconductor field-effect transistor includes a bi-layer silicon carbide buffer for improving electron confinement in the channel region and/or a layer disposed over at least the channel region of the transistor for suppressing surface effects caused by dangling bonds and interface states. Also, a sloped MESA fabrication method which utilizes a dielectric etch mask that protects the MESA top surface during MESA processing and enables formation of sloped MESA sidewalls.

Abstract: Higher voltage device isolation structures (40, 60, 70, 80, 90, 90?) are provided for semiconductor integrated circuits having strongly doped buried layers (24, 24?). One or more dielectric lined deep isolation trenches (27, 27?, 27?, 27??) separates adjacent device regions (411, 412; 611, 612; 711, 712; 811, 812; 911, 912). Electrical breakdown (BVdss) between the device regions (411, 412; 611, 612; 711, 712; 811, 812; 911, 912) and the oppositely doped substrate (22, 22?) is found to occur preferentially where the buried layer (24, 24?) intersects the dielectric sidewalls (273, 274; 273?, 274?; 273?, 274?) of the trench (27, 27?, 27?, 27??). The breakdown voltage (BVdss) is increased by providing a more lightly doped region (42, 42?, 62, 72, 82) of the same conductivity type as the buried layer (24, 24?), underlying the buried layer (24, 24?) at the trench sidewalls (273, 274; 273?, 274?; 273?, 274?).

Abstract: A magnetic memory device includes a magnetic tunneling junction (MTJ) structure having a cylindrical shape. Elements of the MTJ structure are co-axial. The MTJ structure includes a conductive layer, an insulating layer co-axially formed around the conductive layer and a material layer formed around the insulating layer, the material layer being co-axial with the conductive layer and having a plurality of magnetic layers. The material layer includes a lower magnetic layer, a tunneling layer, and an upper magnetic layer that are sequentially stacked around and along the conductive layer.

Abstract: Fabrication of a light emitting device includes etching of a substrate of the light emitting device. The etch may be an aqueous etch sufficient to increase an amount of light extracted through the substrate. The etch may be a direct aqueous etch of a silicon carbide substrate. The etch may remove damage from the substrate that results from other processing of the substrate, such as damage from sawing the substrate. The etch may remove an amorphous region of silicon carbide in the substrate.

Abstract: A method of manufacturing a thin film transistor (TFT) which is manufactured such that source and drain electrodes directly contact source and drain regions without contact holes.

Abstract: A manufacturing method of a silicon carbide semiconductor device includes the steps of: preparing a semiconductor substrate including a silicon carbide substrate, a drift layer and a first semiconductor layer; forming a plurality of first trenches in a cell portion; forming a gate layer on an inner wall of each first trench by an epitaxial growth method; forming a first insulation film on the surface of the semiconductor substrate; forming a gate electrode on the first insulation film for connecting to the gate layer electrically; forming a source electrode on the first insulation film for connecting to the first semiconductor layer in the cell portion; and forming a drain electrode connected to the silicon carbide substrate electrically.

Abstract: An electrostatic discharge (ESD) protection structure and a method for forming the same are provided. The structure includes a substrate having a buried layer, and a first and a second high-voltage well region on the buried layer. The first and second high-voltage well regions have opposite conductivity types and physically contact each other. The structure further includes a field region extending from the first high-voltage well region into the second high-voltage well region, a first doped region in the first high-voltage well region and physically contacting the field region, and a second doped region in the second high-voltage well region and physically contacting the field region. The first and second doped regions and the first high-voltage well region form a bipolar transistor that can protect an integrated circuit from ESD.

Abstract: Silicon carbide semiconductor devices and methods of fabricating silicon carbide semiconductor devices are provided by successively etching a mask layer to provide windows for formation of a source region of a first conductivity type, a buried silicon carbide region of a second conductivity type opposite to the first conductivity type and a second conductivity type well region in a first conductivity type silicon carbide layer. The source region and the buried silicon carbide region are formed utilizing a first window of the mask layer. Then, the well region is formed utilizing a second window of the mask layer, the second window being provided by a subsequent etch of the mask layer having the first window.

Abstract: A switching element combining a self-aligned, vertical junction field effect transistor with etched-implanted gate and an integrated antiparallel Schottky barrier diode is described. The anode of the diode is connected to the source of the transistor at the device level in order to reduce losses due to stray inductances. The SiC surface in the SBD anode region is conditioned through dry etching to achieve a low Schottky barrier height so as to reduce power losses associated with the turn on voltage of the SBD.

Abstract: Provided is a monocrystalline silicon carbide ingot containing a dopant element, wherein a maximum concentration of the dopant element is less than 5×1017 atoms/cm3 and the maximum concentration is 50 times or less than that of a minimum concentration of the dopant element. Also provided is a monocrystalline silicon carbide wafer made by cutting and polishing the monocrystalline silicon carbide ingot, wherein a electric resistivity at room temperature of the wafer is 5×103 ?cm or more. Further provided is a method for manufacturing the monocrystalline silicon carbide including growing the monocrystalline silicon carbide on a seed crystal from a sublimation material by a sublimation method. The sublimation material includes a solid material containing a dopant element, and the specific surface of the solid material containing the dopant element is 0.5 m2/g or less.