Abstract: A semiconductor device has a substrate and an electrical component disposed over a surface of the substrate. An antenna interposer is disposed over the substrate. A first encapsulant is deposited around the antenna interposer. The first encapsulant has a high dielectric constant. The antenna interposer has a conductive layer operating as an antenna and an insulating layer having a low dielectric constant less than the high dielectric constant of the first encapsulant. The antenna interposer is made from an antenna substrate having a plurality of antenna interposers. Bumps are formed over the antenna substrate and the antenna substrate is singulated to make the plurality of antenna interposers. A second encapsulant is deposited over the electrical component. The second encapsulant has a low dielectric constant less than the high dielectric constant of the first encapsulant. A shielding layer is disposed over the second encapsulant.

Abstract: A method including disposing a structural adhesive onto an elevated surface of a first chip that includes a cavity disposed below the elevated surface. The method includes contacting a carrier with the structural adhesive. The carrier includes a second chip that optically aligns with a lateral surface of the cavity. The method includes curing the structural adhesive so that the carrier and host chip are mechanically anchored. An apparatus includes a first chip including a cavity located between lateral walls of the first chip and a carrier mechanically anchored with the first chip at a top portion of the lateral walls. The carrier includes a second chip that optically aligns with the first chip at a side portion of one of the lateral walls. The first and second chips are free of contact at a bottom surface of the second chip and a bottom surface of the cavity.

Abstract: A smart IC substrate according to an embodiment includes: a substrate including one surface and the other surface; a circuit pattern and a connection circuit pattern disposed on the one surface; and a coil pattern disposed on the other surface, wherein a chip mounting region is formed on the other surface, the coil pattern is electrically connected to a first terminal and a second terminal, the substrate includes a first region disposed inside the coil pattern and a second region disposed outside the coil pattern, the first terminal is disposed in the first region, the second terminal is disposed in the second region, a first via is formed in the first region corresponding to the circuit pattern of the substrate, a second via is formed in the second region of the substrate, a third via is formed in the first region corresponding to the connection circuit pattern of the substrate, and a connection member is disposed inside the second via.

Abstract: Method for the electrochemical metallization of a double-sided electrical circuit for a chip card. Contacts and current leads are located on a front face. An antenna and connection pads are located on a rear face. This method includes an operation of electrochemically depositing at least one layer of electrically conductive material on connection pads, while supplying these connection pads with current via the current leads, contacts and metallized holes establishing electrical continuity between the front face and the rear face. This method furthermore includes, after the operation of electrochemically depositing at least one layer of electrically conductive material, an operation of electrically isolating at least one metallized hole from a connection pad. Electrical circuit obtained using this method.

Abstract: A semiconductor device has a substrate and an electrical component disposed over a surface of the substrate. An antenna interposer is disposed over the substrate. A first encapsulant is deposited around the antenna interposer. The first encapsulant has a high dielectric constant. The antenna interposer has a conductive layer operating as an antenna and an insulating layer having a low dielectric constant less than the high dielectric constant of the first encapsulant. The antenna interposer is made from an antenna substrate having a plurality of antenna interposers. Bumps are formed over the antenna substrate and the antenna substrate is singulated to make the plurality of antenna interposers. A second encapsulant is deposited over the electrical component. The second encapsulant has a low dielectric constant less than the high dielectric constant of the first encapsulant. A shielding layer is disposed over the second encapsulant.

Abstract: A method of using shielded straps with RFID tag designs is disclosed. Specifically, the RFID device, in one embodiment, comprises a bridge conductor which couples the antenna and pair of strap pads together. Thus, the coupling between the bridge conductor and the strap conductor, the coupling between the bridge conductor and the antenna conductor, and the coupling between the antenna conductor and the strap conductor increases the total capacitance of the RFID strap device. Further, the presence of the bridge conductor also reduces the area occupied for a given inductance, and provides a higher effective capacitance when the bridge strap is connected to the antenna.

Abstract: Methods and apparatuses are provided for manufacturing a transaction card. The disclosed methods and apparatuses may be used to form a transaction card frame within a mold. The transaction card frame may include one or more recessed portions formed within a first surface of the transaction card frame. The one or more recessed portions may be configured for affixing one or more electronic components.

Abstract: In one embodiment, the semiconductor module includes a module substrate and a first substrate mounted on and electrically connected to a first surface of the module substrate. The first substrate has one or more first electrical connectors of the semiconductor module, and the first substrate electrically connecting the first electrical connector to the module substrate.

Abstract: Space- and cost-efficient antenna apparatus and methods of making and using the same. In one embodiment, the antenna is formed using a deposition process, whereby a conductive fluid or other material is deposited directly on one or more interior components of a host device (e.g., cellular phone or tablet computer). The antenna can be formed in a substantially three-dimensional “loop” shape, and obviates several costly and environmentally unfriendly processing steps and materials associated with prior art antenna manufacturing approaches.

Abstract: A semiconductor device, in which an integrated circuit portion and an antenna are easily connected, can surely transmit and receive a signal to and from a communication device. The integrated circuit portion is formed of a thin film transistor over a surface of a substrate so that the area occupied by the integrated circuit portion is increased. The antenna is provided over the integrated circuit portion, and the thin film transistor and the antenna are connected. Further, the area over the substrate occupied by the integrated circuit portion is 0.5 to 1 times as large as the area of the surface of the substrate. Thus, the size of the integrated circuit portion can be close to the desired size of the antenna, so that the integrated circuit portion and the antenna are easily connected and the semiconductor device can surely transmit and receive a signal to and from the communication device.

Abstract: It is an object of the present invention to provide a highly sophisticated functional IC card that can ensure security by preventing forgery such as changing a picture of a face, and display other images as well as the picture of a face. An IC card comprising a display device and a plurality of thin film integrated circuits; wherein driving of the display device is controlled by the plurality of thin film integrated circuits; a semiconductor element used for the plurality of thin film integrated circuits and the display device is formed by using a polycrystalline semiconductor film; the plurality of thin film integrated circuits are laminated; the display device and the plurality of thin film integrated circuits are equipped for the same printed wiring board; and the IC card has a thickness of from 0.05 mm to 1 mm.

Abstract: This IC card is provided with a module having an inlet, an adhesive layer covering the module, and a first base material and second base material sandwiching the module with interposition of the adhesive layer. The module is disposed on one face of the first base material with interposition of a viscous layer which has a thickness that varies according to the thickness at each area of the module, and its two ends are narrower than its other parts when viewed from the outer face side of the first base material or the outer face side of the second base material. According to this IC card, it is possible to offer the IC card with a flat surface, and without occurrence of strain in the embedded IC chip.

Abstract: In a state where an adhesive tape is attached onto a main surface of a semiconductor wafer, a trench is formed in a rear surface of the semiconductor wafer. For forming the trench in the rear surface of the semiconductor wafer, after coating a resist film on the rear surface of the semiconductor wafer, the resist film is patterned by using the photolithography technology. The patterning of the resist film is performed so as not to leave the resist film in the region where the trench is to be formed. Then, the trench is formed in a predetermined region of the semiconductor wafer by the dry etching technology using the patterned resist film as a mask. Specifically, the trench is formed in the region near the dicing line.

Abstract: Application form of and demand for an IC chip formed with a silicon wafer are expected to increase, and further reduction in cost is required. An object of the invention is to provide a structure of an IC chip and a process capable of producing at a lower cost. A feature of the invention is to use a metal film and a reactant having the metal film as a separation layer. An etching rate of the metal film or the reactant having metal is high, and a physical means in addition to a chemical means of etching the metal film or the reactant having metal can be used in the invention. Thus, the IDF chip can be manufactured more simply and easily in a short time.

Abstract: A liquid crystal display panel capable of preventing flicker and improving reflectance include a thin film transistor substrate having a gate line, a data line, a thin film transistor connected to the gate and data lines, and a reflective electrode connected to the thin film transistor and covering at least part of the gate line, a color filter substrate having a color filter and a common electrode forming an electric field with the reflective electrode. Liquid crystals are disposed between the thin film transistor substrate and the color filter substrate. The reflective electrode shields the liquid crystals from a gate signal.

Abstract: The present invention provides an ID chip or an IC card in which the mechanical strength of an integrated circuit can be enhanced without suppressing a circuit scale. An ID chip or an IC card of the present invention has an integrated circuit in which a TFT (a thin film transistor) is formed from an insulated thin semiconductor film. Further, an ID chip or an IC card of the present invention has a light-emitting element and a light-receiving element each using a non-single-crystal thin film for a layer conducting photoelectric conversion. Such a light-emitting element or a light-receiving element may be formed consecutively to (integrally with) an integrated circuit or may be formed separately and attached to an integrated circuit.

Abstract: The present invention provides a microwave annealing method for a plastic substrate. The method comprises pulsed microwave annealing to an organic photo-voltaic device to avoid warpage and degradation of the plastic substrate. Utilizing pulsed microwave annealing method can improve the wettability of the organic layer on the plastic substrate verified by contact angle measurement, and achieving the organic solar cell fabricated with higher power conversion efficiency.

Abstract: The reliability of a semiconductor device is enhanced. A first lead frame, a first semiconductor chip, a second lead frame, and a second semiconductor chip are stacked over an assembly jig in this order with solder in between and solder reflow processing is carried out to fabricate their assembly. Thereafter, this assembly is sandwiched between first and second molding dies to form an encapsulation resin portion. The upper surface of the second die is provided with steps. At a molding step, the second lead frame is clamped between the first and second dies at a position higher than the first lead frame; and a third lead frame is clamped between the first and second dies at a higher position. The assembly jig is provided with steps at the same positions as those of the steps in the upper surface of the second die in positions corresponding to those of the same.

Abstract: A semiconductor package and a method for manufacturing the same is provided for minimizing or preventing warpage and twisting of semiconductor chip bodies as a result of thinning them during gringing. The semiconductor package includes a semiconductor chip body and a substrate. The semiconductor chip body has a first surface, a second surface facing away from the first surface, through-electrodes which pass through the semiconductor chip body and project from the second surface, and a warpage prevention part which projects in the shape of a fence along an edge of the second surface. The substrate has a substrate body and connection pads which are formed on an upper surface of the substrate body, facing the second surface, and which are connected with the projecting through-electrodes.

Abstract: A ferrite substrate, a winding-embedded ferrite resin layer, and an IC-embedded ferrite resin layer are laminated, the ferrite substrate has a ferrite first protruding part that protrudes into the ferrite resin layer from the surface thereof, the winding inside the ferrite resin layer is arranged winding around the first protruding part, and the IC overlaps the first protruding part in the resin layer. According to this configuration, high integration can be achieved, and the IC is arranged at a site where the ferrite first protruding part, the height of which fluctuates little as a result of thermal expansion, overlaps the ferrite resin layer, the thickness of which is thinned by the first protruding part and varies little as a result of thermal expansion, minimizing variations in the gap between the winding and the IC as a result of thermal expansion, and achieving greater stability of electrical characteristics.

Abstract: Application form of and demand for an IC chip formed with a silicon wafer are expected to increase, and further reduction in cost is required. An object of the invention is to provide a structure of an IC chip and a process capable of producing at a lower cost. A feature of the invention is to use a metal film and a reactant having the metal film as a separation layer. An etching rate of the metal film or the reactant having metal is high, and a physical means in addition to a chemical means of etching the metal film or the reactant having metal can be used in the invention. Thus, the IDF chip can be manufactured more simply and easily in a short time.

Abstract: This invention discloses a crystalline substrate based device including a crystalline substrate having formed thereon a microstructure; and at least one packaging layer which is sealed over the microstructure by means of an adhesive and defines therewith at least one gap between the crystalline substrate and the at least one packaging layer. A method of producing a crystalline substrate based device is also disclosed.

Abstract: A manufacturing method of a thin film solar cell comprises performing dry cleaning of an insulation substrate on which a transparent electrode is formed, patterning the transparent electrodes to be spaced apart from each other, performing dry cleaning of the patterned transparent electrodes, forming a semiconductor layer on surfaces of the transparent electrodes and patterning a metal electrode on the semiconductor layer.

Abstract: In order to extend the communication distance of an electronic tag chip, it is required to reduce power consumption of the electronic tag chip. After having formed capacitors and diodes on an SOI (Silicon on Insulator), remove a silicon substrate of the SOI. It becomes possible to reduce the capacitors and diodes of the electronic tag chip in parasitic capacitance relative to the ground, which makes it possible to reduce the power consumption of the electronic tag chip, thereby enabling the electronic tag chip to increase in communication distance thereof.

Abstract: A flash-memory device has a printed-circuit board assembly (PCBA) with a PCB with a flash-memory chip and a controller chip. The controller chip includes an input/output interface circuit to an external computer over a Secure-Digital (SD) interface, and a processing unit to read blocks of data from the flash-memory chip. The PCBA is encased inside an upper case and a lower case, with SD contact pads on the PCB that fit through contact openings in the upper case. Supporting end ribs under each of the SD contact pads and middle ribs support the PCB at a slanted angle to the centerline of the device. The PCB slants upward at the far end to allow more thickness for the chips mounted to the bottom surface of the PCB, and slants downward at the insertion end to position the SD contact pads near the centerline.

Abstract: A wireless IC device includes a radiating plate, a wireless IC chip, and a feeder circuit board, on which the wireless IC chip is mounted. The feeder circuit board includes a resonant circuit with an inductance element, and the resonant circuit is electromagnetically coupled with the radiating plate. The wireless IC chip is interposed between the radiating plate and the feeder circuit board.

Abstract: A semiconductor package and a method for manufacturing the same is provided for minimizing or preventing warpage and twisting of semiconductor chip bodies as a result of thinning them during grinding. The semiconductor package includes a semiconductor chip body and a substrate. The semiconductor chip body has a first surface, a second surface facing away from the first surface, through-electrodes which pass through the semiconductor chip body and project from the second surface, and a warpage prevention part which projects in the shape of a fence along an edge of the second surface. The substrate has a substrate body and connection pads which are formed on an upper surface of the substrate body, facing the second surface, and which are connected with the projecting through-electrodes.

Abstract: A leadframe design for forming leadframe-based semiconductor packages having curvilinear shapes is disclosed. The leadframes may each include one or more curvilinear slots corresponding to curvilinear edges in the finished and singulated semiconductor package. After encapsulation, the integrated circuit packages on the panel may be singulated by cutting the integrated circuits from the leadframe panel into a plurality of individual integrated circuit packages. The slots in the leadframe advantageously allow each leadframe to be singulated using a saw blade making only straight cuts.

Abstract: The invention relates to a card for contactless data and/or energy transmission by means of external devices, containing a multilayer card body which has a substrate layer for accommodating an antenna coil having exposed coil connections on a top side of the substrate layer which are connected in an electrically conductive manner to connections for a chip module containing a chip, the chip being enclosed in a recess in the substrate layer; the windings of the antenna coil extend on the top side of the substrate layer, and a compensation layer extends on the top side of the substrate layer; the compensation layer has a chip module opening for placing the chip module on the substrate layer, and has a bridge opening for the contacting of connections of an antenna bridge which extends transverse to the windings.

Abstract: A carrier structure embedded with semiconductor chips is disclosed, which comprises a core board and a plurality of semiconductor chips mounted therein. The core board comprises two metal plates between which an adhesive material is disposed. An etching stop layer is deposited on the both surfaces of the core board. Pluralities of cavities are formed to penetrate through the core board. The semiconductor chips each have an active surface on which a plurality of electrode pads are disposed, and those are embedded in the cavities and mounted in the core board. An etching groove formed on the core board between the neighboring semiconductor chips is filled with the adhesive material. The present invention avoids the production of metal burrs when the carrier structure is cut.

Abstract: The Invention, titled the “Split Chip” by the Inventor, contemplates an RFID enabled consumer oriented tracking system which protects consumer privacy by splitting a miniaturized silicon RFID transponder circuit into a retained piece and a detached piece. The two pieces are electrically connected by a fine piece of conductive material. Each piece is dependent upon the other in order to disgorge data. The electrical connection between the two pieces can be severed by the consumer by tearing the fine piece of conductive material at a designated spot on the substrate making the Split Chip moribund. Upon a return or refund of the consumer item the original data can be recovered through a laser guidance system which connects the retained piece and its alpha numeric identifier to a back end host computer administration network.

Abstract: A method is provided for manufacturing an integrated electronic component arranged on a substrate wafer. According to the method, at least one metallization step is performed, and a value of an electrical parameter of the integrated electronic component is determined after the at least one metallization step. A subsequent metallization step is performed after determining the value of the electrical parameter. The subsequent metallization step is performed using an adjustment mask chosen from n predefined masks based on a desired value of the electrical parameter, so as to obtain the desired value of the electrical parameter of the integrated electronic component after manufacturing. In one preferred embodiment, a series of electrical tests is performed on the wafer using test equipment, and the value of the electrical parameter is determined using the same test equipment as is used to perform the series of electrical tests.

Abstract: A manufacturing method of a wiring board and a semiconductor device at low cost and by a simple process, without performing complicated steps many times is proposed. Furthermore, a manufacturing method of a wiring board at low cost and with fewer adverse effects on the environment, and a manufacturing method of a semiconductor device using the wiring board are proposed. A pattern of a conductive material is formed over a first substrate, a conductive film is formed over the pattern by an electrolytic plating process, the pattern and the conductive film are separated, an IC chip including at least one thin film transistor is formed over a second substrate, and the conductive film is electrically connected to the IC chip.

Abstract: A memory card assembly with a simplified structure. The memory card assembly has a memory card assembly a printed wiring board substrate and at least one integrated circuit unit mounted and electrically connected to the printed wiring board substrate. A rigid ring is fitted over a periphery of the printed wiring board substrate to encircle the integrated circuit die therein. Thereby, a dam with an open top is constructed over the printed wiring board substrate. A filler resin material is then filled within the open dam to cover the printed wiring board substrate and integrated circuit unit.

Abstract: A process yield of a semiconductor device is enhanced. To that end, there is provided a semiconductor device comprising a substrate having a component mount face with semiconductor chips mounted thereon, the substrate being provided with a plurality of connection leads, and a cap made of resin, placed over the component mount face of the substrate so as to cover the same, the a cap having a first body part, and a second body part larger in thickness than the first body part. Because product information in the form of inscriptions is engraved on the top surface side of the second body part of the cap, the product information can be displayed without the use of an ink mark, it is possible to prevent occurrence of marking defects due to ink bleed, and so forth, thereby enhancing the process yield of a memory card (the semiconductor device).

Abstract: Wiring lines for the supply of a voltage to feed a drive voltage to an integrated circuit formed in a semiconductor chip are disposed so as to cover a main surface of the semiconductor chip, so that, if the wiring lines are removed for the purpose of analyzing information stored in the semiconductor chip, the integrated circuit does not operate and it is impossible to analyze the information. Further, there is provided a processing detector circuit for detecting that the wiring lines have been tampered with. When the processing detector circuit detects a change in the state of the wiring lines, the integrated circuit is reset. Thus, it is possible to improve the security of information stored on the card.

Abstract: The present description describes back-end processes, the use of which may help overcome these problems and limitations of the prior art. In one optional embodiment, the back-end process includes depositing a layer over a wafer. The wafer contains a plurality of circuit die for respective RFID tags. The wafer also has exposed metallic regions. The exposed metallic regions include first regions having electrical contacts to the plurality of circuit die and second regions having electrical contacts to the wafer's electrical test sites. The method includes forming exposed first regions and unexposed second regions by etching the layer over the first regions but not over the second regions. The method also includes plating metallic bumps on the exposed first regions.

Abstract: It is an object of the present invention to provide a highly sophisticated functional IC card that can ensure security by preventing forgery such as changing a picture of a face, and display other images as well as the picture of a face. An IC card comprising a display device and a plurality of thin film integrated circuits; wherein driving of the display device is controlled by the plurality of thin film integrated circuits; a semiconductor element used for the plurality of thin film integrated circuits and the display device is formed by using a polycrystalline semiconductor film; the plurality of thin film integrated circuits are laminated; the display device and the plurality of thin film integrated circuits are equipped for the same printed wiring board; and the IC card has a thickness of from 0.05 mm to 1 mm.

Abstract: An array of electrically conductive members, formed around the edges of a semiconductor device or chip, penetrate from one major surface of the device to the other major surface. In an area located inward of this array, a multiplicity of thermally conductive members also penetrate from one major surface to the other major surface. The semiconductor device can be manufactured from a semiconductor wafer by creating holes that penetrate partway through the wafer, filling the holes with metal to form the electrically conductive members and thermally conductive members, and then grinding the lower surface of the wafer to expose the ends of the electrically conductive members and thermally conductive members before dicing the wafer into chips. The thermally conductive members improve heat dissipation performance when semiconductor chips of this type are combined into a stacked multichip package.

Abstract: An electronic device, such as a mini card, has an inlay substrate for the electronic device. The inlay includes a substrate layer, a communication interface having a first metallization supported by the substrate layer, a hole or a hole location area, for attachment to an external device, and a second metallization surrounding at least partially the hole or its location area. The second metallization strengthens the card at the hole area. The method includes realizing the first and second metallizations on the same machine and/or at the same time.

Abstract: A memory card includes: a package in the form of a thin plate made of an insulating material and configured to be inserted into and removed from a slot of an external apparatus; a plurality of contacts provided on the package and configured to transmit a signal to and from the external apparatus; the contacts being juxtaposed in a direction perpendicular to a loading/unloading direction, in which the memory card is loaded into or unloaded from the external apparatus, in a region of a flat face, which is one of faces of the package in a thicknesswise direction, except locations on the opposite sides in the direction perpendicular to the loading/unloading direction; and a pair of side labels adhered to the locations on the opposite sides of the upper face of the package and extending along the loading/unloading direction.

Abstract: Wiring lines for the supply of a voltage to feed a drive voltage to an integrated circuit formed in a semiconductor chip are disposed so as to cover a main surface of the semiconductor chip, so that, if the wiring lines are removed for the purpose of analyzing information stored in the semiconductor chip, the integrated circuit does not operates and it is impossible to analyze the information. Further, there is provided a processing detector circuit for detecting that the wiring lines have been tampered with. When the processing detector circuit detects a change in the sate of the wiring lines, the integrated circuit is reset. Thus, it is possible to improve the security of information stored on the card.

Abstract: A storage apparatus 10 is disclosed, that comprises a wiring substrate 11 having a first surface and a second surface, a flat type external connection terminal 12a disposed on the first surface of the wiring substrate 11, a semiconductor device 14 disposed on the second surface of the wiring substrate 11 and having a connection terminal 14a connected to the flat type external connection terminal 12a, a molding resin 15 for coating the semiconductor device 14 on the second surface of the wiring substrate 11, a card type supporting frame 10a having a concave portion or a hole portion fitting the wiring substrate 11, the semiconductor device 14, and the molding resin 15 in such a manner that the flat type external connection terminal 12a is exposed to the first surface of the wiring substrate 11, and adhesive resin a adhering integrally the flat type external connection terminal 12a, the wiring substrate 11, the semiconductor device 14, the molding resin 15, and the card type supporting frame 10a.

Abstract: Apparatuses and methods for forming displays are claimed. One embodiment of the invention includes a contact smart card wherein fluidic self assembly is used to build the microelectronic structures on the display such that a contact smart data is transmitted unidirectionally. A contact smart card is inserted directly into a device that transfers data to a display coupled to the smart card. Another embodiment of the invention relates to a contactless smart card in which fluidic self assembly is also used here to build the display. Data is transmitted to an antenna that is embedded in the contactless card in which a plurality of blocks were deposited thereon.

Abstract: Application form of and demand for an IC chip formed with a silicon wafer are expected to increase, and further reduction in cost is required. An object of the invention is to provide a structure of an IC chip and a process capable of producing at a lower cost. A feature of the invention is to use a metal film and a reactant having the metal film as a separation layer. An etching rate of the metal film or the reactant having metal is high, and a physical means in addition to a chemical means of etching the metal film or the reactant having metal can be used in the invention. Thus, the IDF chip can be manufactured more simply and easily in a short time.

Abstract: A substrate structure with embedded semiconductor chip and a fabrication method thereof are provided. The method includes: providing a carrier board having a first surface and an opposing second surface, wherein a first opening and an opposing second opening are formed in the first and second surfaces respectively, and a portion of the first opening communicates with the second opening; mounting at least one semiconductor chip to bottom of the first opening to be received in the first opening; filling an adhesive material in the first and second openings and in a gap between the chip and the carrier board to adhere the chip; forming a dielectric layer on the carrier board and the chip; and forming a circuit layer on the dielectric layer and forming conductive structures in the dielectric layer, so that the circuit layer is electrically connected to the chip via the conductive structures.

Abstract: A semiconductor device includes: a semiconductor substrate having an active face; a first electrode provided on or above the active face; an external connection terminal provided on or above the active face and electrically connected to the first electrode; and a connection terminal provided on or above the active face of the semiconductor substrate.

Abstract: An IC body is loaded to a case 2 made of thermosetting resin material and sealed with a sealing portion made of thermosetting resin material to be integrated, whereby an IC card is manufactured. The IC body comprises: a wiring substrate formed with an external connection terminal at a back surface thereof; a semiconductor chip loaded over a surface of the wiring substrate and electrically connected to the external connection terminal via a interconnect; and the sealing portion made of thermosetting resin material so as to cover the semiconductor chip and a bonding wire. The sealing portion is formed so that the external connection terminal is exposed. The present invention makes it possible to heighten the strength of IC cards and at the same time, to reduce the manufacturing cost and improve the reliability.

Abstract: Apparatuses and methods for forming microelectronic assemblies are claimed. One embodiment of the invention includes a contact smart card wherein fluidic self assembly is used to build the microelectronic structures on the microelectronic assembly such that a contact smart data is transmitted unidirectionally. A contact smart card is inserted directly into a device that transfers data to a microelectronic assembly coupled to the smart card. Another embodiment of the invention relates to a contactless smart card in which fluidic self assembly is also used here to build the microelectronic assembly. Data is transmitted to an antenna that is embedded in the contactless card in which a plurality of blocks were deposited thereon.

Abstract: A storage apparatus 10 is disclosed, that comprises a wiring substrate 11 having a first surface and a second surface, a flat type external connection terminal 12a disposed on the first surface of the wiring substrate 11, a semiconductor device 14 disposed on the second surface of the wiring substrate 11 and having a connection terminal 14a connected to the flat type external connection terminal 12a, a molding resin 15 for coating the semiconductor device 14 on the second surface of the wiring substrate 11, a card type supporting frame 10a having a concave portion or a hole portion fitting the wiring substrate 11, the semiconductor device 14, and the molding resin 15 in such a manner that the flat type external connection terminal 12a is exposed to the first surface of the wiring substrate 11, and adhesive resin a adhering integrally the flat type external connection terminal 12a, the wiring substrate 11, the semiconductor device 14, the molding resin 15, and the card type supporting frame 10a.