Abstract: The present application relates to a chip heat dissipating structure, a chip structure, a circuit board and a supercomputing device, and the chip heat dissipating structure includes a plating layer covered on the chip, where the plating layer includes a first metal layer and a second metal layer arranged in sequence. By adding two metal layer on the top of the chip by physical sputtering, the heat sink may be soldered onto the metal layer through a solder layer, so that the heat sink is fixed to the top of the chip; the main component of the solder layer is metal tin, and the metal layer has a higher thermal conductivity than an epoxy resin material mounted on a traditional heat sink, thereby solving a problem of the heat dissipation bottleneck of a resin material in the chip, thus improving a heat dissipation effect of the chip.

Abstract: A manufacturing method and application of an optical interconnection module are disclosed. According to example embodiments, by providing the method of manufacturing the optical interconnection module in which an optical fiber optical coupler is disposed at its lower portion by using the FOWLP process, it is possible to provide advantages such as lightness, thinness and compactness of the optical interconnection module, guarantee of signal integrity, and high yield in mass production. Further, it is possible to provide a structure providing an electrical ground to an electronic chip by mounting the electronic chip on ETB and capable of being used as a heat dissipation path.

Abstract: A circuit system and method of manufacturing a printed circuit board includes providing an integrated circuit package mounted on a first side of a printed circuit board and a power regulator connected to power terminals of the integrated circuit package through a cutout in the printed circuit board. The power regulator draws power from the printed circuit board by way of side pins around a periphery of the cutout.

Abstract: An electronic device includes a first electronic component including a first main body, a second electronic component including a second main body, a mounting substrate having a mounting surface, and a heat dissipator having an attaching surface. The mounting surface and the attaching surface face each other in the z direction. The first main body and the second main body are disposed between the mounting substrate and the heat dissipator in the z direction and arranged side by side in the x direction. The first main body has a first front surface facing the attaching surface and a first back surface facing the mounting surface. The second main body has a second front surface facing the attaching surface and a second back surface facing the mounting surface. The dimension of the second main body in the z direction is smaller than the dimension of the first main body in the z direction. The first front surface and the second front surface overlap with each other as viewed in the x direction.

Abstract: Embodiments may relate to a microelectronic package comprising that includes a solder thermal interface material (STIM). The STIM may include indium and a dopant material which may provide a number of benefits to the STIM. The STIM may physically and thermally couple a die and an integrated heat spreader (IHS). Other embodiments may be described or claimed.

Abstract: A component carrier including a stack with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure. A component embedded in the stack, and a heat removal body configured for removing heat from the component is connected to the stack and preferably to the component. The heat removal body including a component-sided first heat removal structure thermally coupled with the component, and a second heat removal structure thermally coupled with the first heat removal structure and facing away from the component.

Abstract: Embodiments of the present application relates to a chip heat dissipation structure, a chip structure, a circuit board, and a supercomputing device, and the chip heat dissipation structure includes: a plating layer covering a wafer of the chip; where the plating layer includes a first metal layer, a second metal layer, and a third metal layer sequentially arranged. Three metal layers are added on a top of the chip by physical sputtering, so that a heat sink can be welded on the metal layers by a solder layer, and then the heat sink is fixed on the top of the chip; a main component of the solder layer is metal tin, and the metal layer have a higher thermal conductivity than an epoxy adhesive material mounted on a conventional heat sink.

Abstract: A hybrid thermal interface material (TIM) suitable for an integrated circuit (IC) die package assembly. The hybrid TIM may include a heat-spreading material having a high planar thermal conductivity, and a supplemental material having a high perpendicular thermal conductivity at least partially filling through-holes within the heat-spreading material. The hybrid TIM may offer a reduced effective spreading and vertical thermal resistance. The heat-spreading material may have high compressibility (low bulk modulus or low hardness), such as a carbon-based (e.g., graphitic) material. The supplemental material may be of a suitable composition for filling the through-hole. The heat-spreading material, once compressed by a force applied through an IC die package assembly, may have a thickness substantially the same as that of the supplemental material such that both materials make contact with the IC die package and a thermal solution.

Abstract: A semiconductor device includes: an insulated circuit substrate; a power semiconductor element mounted on the insulated circuit substrate; a first terminal having a plate-like shape having a first main surface and electrically connected to the power semiconductor element; a second terminal having a second main surface opposed to the first main surface of the first terminal and electrically connected to the power semiconductor element; an insulating sheet interposed between the first main surface and the second main surface; and a conductive film provided on at least one of the first main surface side and the second main surface side of the insulating sheet.

Abstract: Embodiments of a transistor package construction is disclosed, including: a transistor comprising: a source; and a drain; and a package comprising: a metallic back surface that is electrically connected to the drain; a top surface comprising a notch; and a thermally conductive and electrically insulating layer covering at least a portion of the metallic back surface of the package.

Abstract: A device package and a method of forming a device package are described. The device package includes a lid with one or more legs on an outer periphery of the lid, a top surface, and a bottom surface, where the lid is disposed on the substrate. The legs of the lid are attached to the substrate with a sealant. The device package also has one or more dies disposed on the substrate. The die(s) are below the bottom surface of the lid, where each of the dies has a top surface and a bottom surface. The device package further includes a retaining structure disposed between the bottom surface of the lid and the top surface of the die, where the retaining structure has one or more inner walls. The device package includes a thermal interface material disposed within the inner walls of the retaining structure and above the top surface of the die.

Abstract: A liquid-cooled heat sink has three parts: the water block, the X-clamp, and a copper plate. The water block has an inlet connected to a resin shell. Inside the shell, a fractal inlet manifold divides the inlet coolant flow into several sub streams that eventually exit in the form of uniformly distributed liquid jets through small nozzles/microjets at the bottom of the shell. The union between the shell and the copper plate forms a flood chamber, where the jets impinge on the copper plate, dissipating the heat supplied to the copper plate in contact with the heat source. The warm liquid is removed from the flood chamber through an outlet manifold embedded with the resin shell.

Abstract: Described is a multi-chip module that may include a Redistribution Layer (RDL) substrate having Integrated Circuit (IC) dies mounted to a first surface of the RDL substrate. A second plurality of IC dies may be mounted to an opposite second surface. A plurality of sockets can be mounted upon the second plurality of IC dies and a cold plate then mounted to the first plurality of IC dies. The mounting structure may include socket frames coupled to the plurality of sockets.

Abstract: A power semiconductor component is specified, having a power semiconductor device arranged within a housing, wherein a heat sink is exposed on a first surface of the housing; a wiring substrate which receives the housing with the power semiconductor device and which has a first main surface and a second main surface. A heat dissipation region with increased thermal conductivity is arranged on the second main surface. The housing is arranged on the wiring substrate in such a way that the heat sink is connected to the heat dissipation region via a solder layer. A number of spacers which are arranged between the heat sink and the heat dissipation region are embedded in the solder layer. Furthermore, a method for producing a power semiconductor component is specified.

Abstract: A semiconductor device includes a semiconductor chip, a circuit board, a heat releasing plate, an adhesive member, and a conductive member. The circuit board transmits a signal of the semiconductor chip. The heat releasing plate has the semiconductor chip disposed thereon, and has an opening in a region on the outer side of a semiconductor chip placement region that is a region in which the semiconductor chip is disposed. The adhesive member is disposed in a region on the outer side of the opening on a different surface of the heat releasing plate from the surface on which the semiconductor chip is disposed, and bonds the circuit board and the heat releasing plate to each other. The conductive member connects the semiconductor chip and the circuit board to each other via the opening.

Abstract: A fixing device includes a circuit board, a first cover, a reinforcing piece, and a double-layer chip. The circuit board has a first surface and a second surface opposite to each other. The first cover is disposed adjacent to the first surface and has a first bump which has a first abutting surface facing the first surface. The reinforcing piece is located on the first surface and adjacent to the first bump. The double-layer chip has an upper layer and a lower layer which are electrically connected. An upper surface of the upper layer and a lower surface of the lower layer are respectively located on opposite sides of the double-layer chip, and an area of the upper surface is smaller than an area of the lower surface. The lower layer of the double-layer chip and the second surface of the circuit board are electrically connected.

Abstract: In general aspect, a semiconductor device package can include a substrate and a semiconductor die disposed on and coupled with the substrate. The semiconductor device package can further include a leadframe having an indentation defined therein, at least a portion of the indentation being disposed on and coupled with the semiconductor die via a conductive adhesive.

Abstract: A bond layer including at least one metal region in a plan view is disposed on a surface layer portion of a substrate formed from a semiconductor. A semiconductor element is disposed on the bond layer and includes a first transistor disposed on a first metal region that is a metal region as the at least one metal region of the bond layer and including a collector layer electrically coupled to the first metal region, a base layer disposed on the collector layer, and an emitter layer disposed on the base layer. A first emitter electrode is disposed on the emitter layer of the first transistor. A first conductor protrusion is disposed on the first emitter electrode. The thermal conductivity of the semiconductor material of the surface layer portion is higher than that of each of the collector layer, the base layer, and the emitter layer of the first transistor.

Abstract: Techniques and systems for a semiconductor laser, namely a grating-coupled surface-emitting (GCSE) comb laser, having thermal management for facilitating dissipation of heat, integrated thereon. The thermal management is structured in manner that prevents deformation or damage to the GCSE laser chips included in the semiconductor laser implementation. The disclosed thermal management elements integrated in the laser can include: heat sinks; support bars; solder joints; thermal interface material (TIM); silicon vias (TSV); and terminal conductive sheets. Support bars, for example, having the GCSE laser chip positioned between the bars and having a height that is higher than a thickness of the GCSE laser chip. Accordingly, the heat sink can be placed on top of the support bars such that heat is dissipated from the GCSE laser chip, and the heat sink is separated from directed contact with the GCSE laser chip due to the height of the support bars.

Abstract: A thermal interface structure may be formed comprising a thermally conductive substrate having a first surface and an opposing second surface, a first liquid metal layer on the first surface of the thermally conductive substrate, and a second liquid metal layer on the second surface of the thermally conductive substrate. The thermal interface structure may be used in an integrated circuit assembly or package between at least one integrated circuit device and a heat dissipation device.

Abstract: A semiconductor package includes a package substrate; a plurality of lower chip structures on the package substrate; an upper chip structure on the plurality of lower chip structures and covering portions of upper surfaces of the plurality of lower chip structures; a non-conductive adhesive layer on a lower surface of the upper chip structure and receiving upper portions of the plurality of lower chip structures; and a molded member on the plurality of lower chip structures and the upper chip structure.

Abstract: A set of electronic package elements intended to be mounted on an electronic board having a component to be cooled including: a chassis, a heatsink fixed by a retaining piece inside the chassis, a cover configured to be fixed on the chassis so as to retain the electronic board in the package. The heatsink is configured to be fixed on the electronic board while maintaining a predetermined distance between a lower face of the heatsink and the component. The cover is configured to be able to be fixed by a fixing point to the heatsink. The retaining piece is connected to the heatsink so as to allow the heatsink a translational movement relative to the chassis in three orthogonal directions.

Abstract: Pierced thermal interface constructions including a thermal interface material (TIM) structure comprising: a TIM sheet comprising a plurality of piercings, where each of the plurality of piercings comprises a cavity and displaced material, and where the displaced material from each of the plurality of piercings protrudes away from the TIM sheet.

Abstract: A miniaturized oscillating heat pipe (OHP) embedded within an integrated circuit (IC) is provided. The miniaturized oscillating heat pipe (OHP) integrally formed within an integrated circuit (IC) is fabricated to form a monolithic IC device using silicon (or similar future semiconductors) fabrication techniques. The OHP is operable to transfer high local heat fluxes within the IC device to more accessible locations on the IC device for heat rejection to an available heat sink.

Abstract: Embodiments disclosed herein include semiconductor dies and methods of forming such dies. In an embodiment, the semiconductor die comprises a semiconductor substrate, an active device layer in the semiconductor substrate, where the active device layer comprises one or more transistors, an interconnect layer over a first surface of the active device layer, a first bonding layer over a surface of the semiconductor substrate, a second bonding layer secured to the first bonding layer, and a heat spreader attached to the second bonding layer.

Abstract: A sensing device for a vehicular sensing system includes a housing having a front housing portion and a metallic rear housing portion. A first printed circuit board and a second printed circuit board are disposed in the housing. The second printed circuit board is electrically connected to the first printed circuit board, which has an electrical connector for electrically connecting the sensing device to a vehicle wire harness. The second printed circuit board has circuitry thereat, with the circuitry generating heat when the sensing device is operating. The rear housing portion comprises a thermally conductive element that extends through an aperture of the first printed circuit board and is thermally coupled at the second printed circuit board. The thermally conductive element conducts heat generated by the circuitry of the second printed circuit board to the rear housing portion to dissipate the heat from the sensing device.

Abstract: To achieve miniaturization, a high-frequency module includes a mounting substrate, a power amplifier, and an electronic component. The mounting substrate has a first main surface and a second main surface on opposite sides. The power amplifier is arranged on a mounting substrate. The power amplifier has a driver stage amplifier and an output stage amplifier. The driver stage amplifier is arranged on the second main surface of the mounting substrate. The output stage amplifier is arranged on the first main surface of the mounting substrate. The electronic component is arranged on the first main surface of the mounting substrate. The electronic component overlaps the driver stage amplifier in a plan view from a thickness direction of the mounting substrate.

Abstract: A substrate layered structure including a first circuit board; a second circuit board overlapping the first circuit board; and interposer blocks interposed between the first circuit board and the second circuit board and spaced apart from each other. Further, each corresponding interposer block includes a dielectric block body; a plurality of signal via holes passing through the dielectric block body and transferring signals between the first circuit board and the second circuit board; and a plurality of signal pads arranged at first ends of the signal via holes and connected to the first circuit board and arranged at second ends of the signal via holes and connected to the second circuit board.

Abstract: Provided are a package structure and a method of forming the same. The package structure includes a first die, a second die group, an interposer, an underfill layer, a thermal interface material (TIM), and an adhesive pattern. The first die and the second die group are disposed side by side on the interposer. The underfill layer is disposed between the first die and the second die group. The adhesive pattern at least overlay the underfill layer between the first die and the second die group. The TIM has a bottom surface being in direct contact with the first die, the second die group, and the adhesive pattern. The adhesive pattern separates the underfill layer from the TIM.

Abstract: A power module includes a power source module and a metallic heat-dissipation substrate. The power source module has an input pin and an output pin soldered on and electrically connected with a system board and includes a printed circuit board. The printed circuit board has a first surface and a second surface. At least a heat-generating component is disposed on the second surface. The metallic heat-dissipation substrate has a first surface and a second surface opposite to each other. The first surface has at least a fixing position and at least a heat-dissipating position. The fixing position is directly or indirectly connected with the second surface. A gap accumulated by tolerances is existed between the heat-dissipating position and the heat-generating component. A gap-filling material is filled into the gap. The second surface and the system board are soldered with each other. Therefore, the heat-dissipation efficiency is enhanced.

Abstract: A semiconductor assembly is described that includes a substrate having top and bottom sides. An integrated circuit die coupled to the substrate includes first and second distinct sets of ground pads. In some embodiments, the first and second sets of ground pads are configured to have distinct ground return paths to a host system. In further embodiments, one of the ground return paths may include a metal plate coupled between ground contacts on the top side of the substrate and ground contacts on a printed circuit board of the host system.

Abstract: A cooling system for cooling components in an information handling system contained in a portable chassis comprises a die plate for receiving heat from a component, a heat pipe for transferring heat from the die plate to a single heat exchanger, a fan for generating an airflow across the heat exchanger and a thermal battery. The heat pipe comprises at least one curvature and the thermal battery is coupled to the die plate and has a length and a width such that the thermal battery is in contact with the heat pipe from the die plate to a point past the at least one curvature. The thermal battery may be formed from a thermally conductive material, be a vapor chamber or otherwise facilitate heat transfer to a heat pipe from the die plate to a point past the curvature for improved cooling.

Abstract: The disclosure provides a liquid-cooling heat dissipation device. The liquid-cooling heat dissipation device is configured to be in thermal contact with an expansion card. The liquid-cooling heat dissipation device includes a base plate, a thermally-conductive component and a heat exchanger. The base plate is configured to be mounted on the expansion card. The thermally-conductive component is mounted on the base plate. The thermally-conductive component and the base plate together form a liquid chamber therebetween. The heat exchanger is mounted on the base plate and connected to the liquid chamber.

Abstract: According to an aspect of the disclosure, an example microelectronic device assembly includes a substrate, a microelectronic element electrically connected to the substrate, a stiffener element overlying the substrate, and a heat distribution device overlying the rear surface of the microelectronic element. The stiffener element may extend around the microelectronic element. The stiffener element may include a first material that has a first coefficient of thermal expansion (“CTE”). A surface of the stiffener element may face toward the heat distribution device. The heat distribution device may include a second material that has a second CTE. The first material may be different than the second material. The first CTE of the first material of the stiffener element may be greater than the second CTE of the second material of the heat distribution device.

Abstract: Described herein is a hybrid cooling device and a cooling method that use a combination of phase change cooling and air cooling. The hybrid cooling device includes a closed loop two phase system, one or more fans, and an assembly clamp. The two phase system further includes a cold plate, an integrated channel, and a radiator, and a pressure sensor. The cold plate can include phase change fluid for extracting heat from electronics on a printed circuit board sandwiched between the cold plate and the assembly clamp. The one or more fans can be used to create airflows for cooling both the cold plate and the radiator. The pressure sensor can be used to control the operation of the hybrid cooling device, which can be deployed in different system environments and server configurations.

Abstract: A housing for an electric machine includes a cooling device arranged on the periphery of a support plate, the cooling device contacts a heat-conducting ring connected to the housing, and the support plate as well as components arranged thereon have vibration damping and an electric insulation to provide advantageous structural conditions such that an advantageous cooling effect is achieved, and regions within the cooling device can be provided for fitting elements of the support plate.

Abstract: A thermal bridge includes an upper bridge assembly including upper plates arranged in an upper plate stack and a lower bridge assembly including lower plates arranged in a lower plate stack. The thermal bridge includes upper spring elements extending from upper plates having upper mating interfaces engaging lower plates to bias the upper plates in a first biasing direction generally away from the lower bridge assembly. The thermal bridge includes lower spring elements extending from lower plates having lower mating interfaces engaging upper plates to bias the lower plates in a second biasing direction generally away from the upper bridge assembly. A bridge frame having connecting elements extends through the upper plates and the lower plates to hold the upper plates in the upper plate stack and to hold the lower plates in the lower plate stack.

Abstract: Semiconductor packages having support members are provided. Support members can mitigate damage to a semiconductor die mounted on a semiconductor package. In some embodiments, an arrangement of support packages can be formed at respective locations of a frame layer that serves as a stiffener for the semiconductor package. Each support member in the arrangement can be formed from a same material of the frame layer or a different material. In some embodiments, a support member can be mounted or otherwise coupled to an exposed surface of the frame layer. In addition or in other embodiments, a support member can be mounted on a surface that supports the semiconductor die. The arrangement of support members can include support members comprising a first material and/or other support members formed from respective materials. A support member can be formed from a metal, a metal alloy, a semiconductor, a polymer, a composite material, or a porous material.

Abstract: The present invention provides a chip integration module, including a die, a passive device, and a connecting piece, where the die is provided with a die bonding portion, the passive device is provided with a passive device bonding portion, the die bonding portion of the die and the passive device bonding portion of the passive device are disposed opposite to each other, and the connecting piece is disposed between the die bonding portion and the passive device bonding portion and is connected to the die bonding portion and the passive device bonding portion. The chip integration module of the present invention achieves easy integration and has low costs. Moreover, a path connecting the die to the passive device becomes shorter, which can improve performance of the passive device. The present invention further discloses a chip package structure and a chip integration method.

Abstract: Disclosed are a light emission device including a magnetoactive element, a method of fabricating the same, and an electronic device including the light emission device. The disclosed light emission device may include a light emission layer; a first electrode and a second electrode spaced apart from each other on a first surface side of the light emission layer; and a magnetoactive fluid layer disposed on a second surface side of the light emission layer and having a plurality of nanostructures of which arrangement and distribution is configured to change according to application of a magnetic field. The light emitting properties of the light emission layer may be changed according to the arrangement and distribution of a plurality of nanostructures in the magnetoactive fluid layer. The plurality of nanostructures may include conductive nanowire and magnetic nanoparticle provided on the surfaces of the conductive nanowire.

Abstract: An electronic apparatus includes a first circuit board, a second circuit board, one or more electronic components, an enclosure portion, and a second housing. The electronic components are mounted on at least one of opposing surfaces of the first circuit board and the second circuit board that oppose each other. The enclosure portion supports a surface of each of the first circuit board and the second circuit board to oppose each other with a predetermined gap therebetween. The enclosure portion encloses a gap space that includes the one or more electronic components within a space between the first circuit board and the second circuit board. The second housing accommodates the first circuit board, the second circuit board, and the enclosure portion. The enclosure portion contacts the housing.

Abstract: An electronic ballast is provided with an elongated housing; a heat sink module disposed in the housing and including a channel extending from one end to an other end; a plurality of power semiconductor modules disposed on both sides of the heat sink module respectively; an inlet assembly disposed at one end of the heat sink module proximate to a first panel at one end of the housing; an outlet assembly disposed at the other end of the heat sink module proximate to a second panel at an other end of the housing; and a fan disposed between the other end of the heat sink module and the second panel. Only a small portion of heat is dissipated by surface areas of the housing. Thus, the housing can be made compact to save space.

Abstract: Methods for adjusting and/or limiting the conductivity range of a nanotube fabric layer are disclosed. In some aspects, the conductivity of a nanotube fabric layer is adjusted by functionalizing the nanotube elements within the fabric layer via wet chemistry techniques. In some aspects, the conductivity of a nanotube fabric layer is adjusted by functionalizing the nanotube elements within the fabric layer via plasma treatment. In some aspects, the conductivity of a nanotube fabric layer is adjusted by functionalizing the nanotube elements within the fabric layer via CVD treatment. In some aspects, the conductivity of a nanotube fabric layer is adjusted by functionalizing the nanotube elements within the fabric layer via an inert ion gas implant.

Abstract: The semiconductor package as well as a method for making it and using it is disclosed. The semiconductor package comprises a semiconductor chip having at least one heat-generating semiconductor device and a volumetrically expandable chamber disposed to sealingly surround the semiconductor chip, the volumetrically expandable chamber filled entirely with a non-electrically conductive liquid in contact with the semiconductor device and circulated within the volumetrically expandable chamber at least in part by the generated heat of the at least one semiconductor device to cool the at least one semiconductor device.

Abstract: A packaged semiconductor device includes a package substrate, an integrated circuit (IC) die mounted on the package substrate, and a heat spreader mounted on the package substrate. The heat spreader surrounds at least a portion of the IC die and includes a lid with a plurality of openings. An inner portion of the heat spreader includes a plurality of thermally conductive protrusions adjacent the die.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, at least two pads, a passivation layer, at least two under bump metallization (UBM) layers and at least two bumps. The pads are disposed adjacent to each other on the substrate along the first direction. The passivation layer covers the substrate and the peripheral upper surface of each pad to define an opening. Each of the openings defines an opening projection along the second direction. The opening projections are disposed adjacent to each other but not overlapping with each other. Furthermore, the first direction is perpendicular to the second direction. The UBM layers are disposed on the corresponding openings, and the bumps are respectively disposed on the corresponding UBM layers. With the above arrangements, the width of each bump of the semiconductor structure of the present invention could be widened without being limited by the bump pitch.

Abstract: The semiconductor package as well as a method for making it and using it is disclosed. The semiconductor package comprises a semiconductor chip having at least one heat-generating semiconductor device and a volumetrically expandable chamber disposed to sealingly surround the semiconductor chip, the volumetrically expandable chamber filled entirely with a non-electrically conductive liquid in contact with the semiconductor device and circulated within the volumetrically expandable chamber at least in part by the generated heat of the at least one semiconductor device to cool the at least one semiconductor device.

Abstract: The invention includes semiconductor packages having grooves within a semiconductor die backside; and includes semiconductor packages utilizing carbon nanostructures (such as, for example, carbon nanotubes) as thermally conductive interface materials. The invention also includes methods of cooling a semiconductor die in which coolant is forced through grooves in a backside of the die, and includes methods of making semiconductor packages.

Abstract: Systems and methods are disclosed for fabricating a semiconductor device by forming heat conducting nanowires on a first side of a wafer; and depositing semiconductor structures on a second side of the wafer.

Abstract: A germanium semiconductor radiation detector contact made of yttrium metal. A thin (˜1000 ?) deposited layer of yttrium metal forms a thin hole-barrier and/or electron-barrier contact on both p- and n-type germanium semiconductor radiation detectors. Yttrium contacts provide a sufficiently high hole barrier to prevent measurable contact leakage current below ˜120 K. The yttrium contacts can be conveniently segmented into multiple electrically independent electrodes having inter-electrode resistances greater than 10 G?. Germanium semiconductor radiation detector diodes fabricated with yttrium contacts provide good gamma-ray spectroscopy data.