Foil-like Cooling Fins Or Heat Sinks (epo) Patents (Class 257/E23.103)
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Patent number: 7658865Abstract: Conducting liquid crystal polymer matrix comprising carbon nanotubes aligned in the matrix is provided, along with use thereof and method of fabrication.Type: GrantFiled: December 17, 2007Date of Patent: February 9, 2010Assignee: International Business Machines CorporationInventor: Minhua Lu
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Publication number: 20100013086Abstract: A power semiconductor device with improved productivity, reduced size and reduction of amounting area therefore is provided. In the provided power semiconductor device, an external terminal does not limit an increase in current. The power semiconductor device is sealed with transfer molding resin. In the power semiconductor device, a cylindrical external terminal communication section is arranged on a wiring pattern so as to be substantially perpendicular to the wiring pattern. An external terminal can be inserted and connected to the cylindrical external terminal communication section. The cylindrical external terminal communication section allows the inserted external terminal to be electrically connected to the wiring pattern. A taper is formed at, at least, one end of the cylindrical external terminal communication section, which one end is joined to the wiring pattern.Type: ApplicationFiled: July 16, 2009Publication date: January 21, 2010Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Yoshiko OBIRAKI, Seiji Oka, Osamu Usui, Yasushi Nakayama, Takeshi Oi
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Patent number: 7646093Abstract: An apparatus including a first die mounted on a primary side of an electronic package and a second die mounted on a secondary side of the electronic package between the electronic package and a printed circuit board. The apparatus further comprising a thermal component thermally connected to the second die and mounted on the printed circuit board, the thermal component comprising a set of pins extending from a heat sink through a set of through-holes in the printed circuit board. A method including positioning a set of thermal connectors through a printed circuit board, the thermal connectors extending from a primary side of the printed circuit board to a secondary side of the printed circuit board opposite the primary side. The method further including thermally connecting the thermal connectors to a die positioned between an electronic package and the primary side of the printed circuit board to transfer heat from the die to the secondary side of the printed circuit board.Type: GrantFiled: December 20, 2006Date of Patent: January 12, 2010Assignee: Intel CorporationInventors: Henning Braunisch, Chuan Hu, Gloria Alejandra Camacho Bragado
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Patent number: 7632716Abstract: A package for high frequency usages 10 has a notched area 16 on each longitudinal end of a substantially rectangular heat sink plate 11 for fastening the package to a base 20 with a screw. The package includes a joined member 17 formed by joining a surface of a ring-like frame member 12 made of a ceramic material to the longitudinal center of a surface of heat sink plate 11 and joining another surface to an external connection terminal 15. The other surface of heat sink plate 11 presents a curved protruding shape 18 bowing from its longitudinal ends toward its longitudinal center, so that curved protruding shape 18 causes at least an area of the other surface heat sink plate 11 that corresponds to an area dedicated for mounting a semiconductor device 19 within ring-like frame member 12 to make a close contact with base 20 when the package is fastened to base 20 by the screw at notched areas 16.Type: GrantFiled: May 9, 2006Date of Patent: December 15, 2009Assignee: Sumitomo Metal (SMI) Electronics Devices, Inc.Inventors: Ichirou Muraki, Kouichi Nakasu, Akiyoshi Osakada
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Patent number: 7632717Abstract: The specification describes a lidded MCM IC plastic overmolded package with a chimney-type heat sink. The lid is mechanically decoupled from the chimneys by a compliant conductive polymer plug.Type: GrantFiled: August 15, 2008Date of Patent: December 15, 2009Assignee: Agere Systems Inc.Inventors: Robert B. Crispell, Robert Scott Kistler, John W. Osenbach
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Publication number: 20090302458Abstract: A heat sink (1) for power module is capable of mounting a power device (101) on at least a surface of the heat sink. The heat sink includes a refrigerant passage (1d) in which cooling medium that dissipates heat generated by the power device (101) flows and a corrugated fin body (1a) arranged in the refrigerant passage (1d). The corrugated fin body (1a) has crests (21b) and troughs (21c) that extend in the flow direction of the cooling medium, and side walls (21a) each of which connects the corresponding one of the crests (21b) with the adjacent one of the troughs (21c). Each adjacent pair of the side walls (21a) and the corresponding one of the crests (21b) or the corresponding one of the troughs (21c) arranged between the adjacent side walls (21a) form a fin (21). Each of the side walls (21a) has a louver (31) that operates to, at least, rotate the cooling medium flowing in the associated fin (21). The heat sink (1) thus has a further improved heat dissipating performance.Type: ApplicationFiled: June 27, 2006Publication date: December 10, 2009Inventors: Hidehito Kubo, Masahiko Kimbara, Keiji Toh, Kota Otoshi, Eiji Kono, Katsufumi Tanaka, Nobuhiro Wakabayashi, Shintaro Nakagawa, Yuichi Furukawa, Shinobu Yamauchi
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Publication number: 20090302459Abstract: A heat dissipating structure includes: a heat spreader; and a plurality of compliant beams attached to the heat spreader. The beams are formed of a high-conductive material such that a maximum stress of each beam is less than a fatigue stress of the high-conductive material; said beams are placed at an angle relative to a chip surface such that the beams are able to exert bending compliance in response to x, y, and z forces exerted upon them. The structure also includes a thermal material interface for bonding said structure to the chip surface. Both the heat spreader and the compliant beams can be machined from a copper block. An alternative heat dissipating structure includes compliant beams soldered to the chip surface.Type: ApplicationFiled: August 7, 2009Publication date: December 10, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Timothy J. Chainer
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Patent number: 7613004Abstract: A heat sink comprising: a heat dissipating portion comprising a plurality of metal fins each having a heat receiving portion and a heat dissipating portion having elasticity; a fin fixing member to transfix said plurality of metal fins; a metal plate having a plurality of slits into which said respective heat dissipating portions are inserted and press-connected thereto with use of said elasticity; and a joining portion to join said metal plate and said heat dissipating portions which are inserted into said respective slits and fixed thereto.Type: GrantFiled: March 17, 2004Date of Patent: November 3, 2009Assignee: The Furukawa Electric Co., Ltd.Inventor: Chiyoshi Sasaki
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Publication number: 20090267215Abstract: Disclosed is a power module having improved joint reliability. Specifically disclosed is a power module including a power module substrate wherein a circuit layer is brazed on the front surface of a ceramic substrate, a metal layer is brazed on the rear surface of the ceramic substrate and a semiconductor chip is soldered to the circuit layer. The metal layer is composed of an Al alloy having an average purity of not less than 98.0 wt. % but not more than 99.9 wt. % as a whole. In this metal layer, the Fe concentration in the side of a surface brazed with the ceramic substrate is set at less than 0.1 wt. %, and the Fe concentration in the side of a surface opposite to the brazed surface is set at not less than 0.1 wt. %.Type: ApplicationFiled: October 26, 2007Publication date: October 29, 2009Applicants: Mitsubishi Materials Corporation, TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Takeshi Kitahara, Hiroya Ishizuka, Yoshirou Kuromitsu, Tomoyuki Watanabe
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Publication number: 20090267222Abstract: An integrated circuit (IC) package is provided. The IC package includes a substantially planar substrate having a plurality of contact pads on a first surface electrically connected through the substrate to a plurality of solder ball pads on a second surface of the substrate, an IC die having a first surface mounted to the first surface of the substrate, and a heat sink assembly coupled to a second surface of the IC die and to a first contact pad on the first surface of the substrate to provide a thermal path from the IC die to the first surface of the substrate. The IC die has a plurality of I/O pads electrically connected to the plurality of contact pads on the first surface of the substrate. The IC die is mounted to the first surface of the substrate in a flip chip orientation.Type: ApplicationFiled: July 2, 2009Publication date: October 29, 2009Applicant: Broadcom CorporationInventors: Chonghua Zhong, Reza-ur Rahman Khan
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Patent number: 7592695Abstract: A compound heat sink for the removal of thermal energy useful for, inter alia, electronic devices or other components. The compound heat sink includes a die cast base element; an extruded dissipation element having a thermal conductivity of at least about 150 W/m-K; and a thermal connection material positioned between and in thermal contact with each of the base element and the dissipation element, wherein the thermal connection material having an in-plane thermal conductivity greater than the thermal conductivity of the dissipation element.Type: GrantFiled: December 11, 2006Date of Patent: September 22, 2009Assignee: GrafTech International Holdings Inc.Inventors: Bradley E. Reis, Julian Norley, Prathib Skandakumaran
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Patent number: 7586179Abstract: Disclosed in this specification is a wireless semiconductor package with multiple dies, at least two of which are attached to a thermally and electrically conductive heat sink. The package provides an efficient means for dissipating heat.Type: GrantFiled: October 9, 2007Date of Patent: September 8, 2009Assignee: Fairchild Semiconductor CorporationInventors: Paul Armand Calo, Margie T. Rios, Tiburcio A. Maldo, JoonSeo Son, Erwin Ian V. Almagro
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Publication number: 20090194862Abstract: There is provided a semiconductor module having improved heat radiation efficiency. A semiconductor module includes a semiconductor element, a pair of Cu heat radiating plates sandwiching the semiconductor element, insulating and heat radiating plates sandwiching the Cu heat radiating plates, heat radiating fins sandwiching the insulating and heat radiating plates, and solder applied between the Cu heat radiating plates and the insulating and heat radiating plates as well as between the insulating and heat radiating plates and the heat radiating fins.Type: ApplicationFiled: June 8, 2007Publication date: August 6, 2009Applicant: Toyota Jidosha Kabushiki KaishaInventor: Akio Kitami
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Patent number: 7564124Abstract: A semiconductor package including stacked packages is disclosed. The semiconductor die package includes a first heat sink structure, a first semiconductor die attached to the first heat sink structure and having a first exterior surface, an intermediate conductive element attached to the first semiconductor die, a second semiconductor die attached to the second heat sink structure, and a second heat sink structure attached to the second semiconductor die and comprising a second exterior surface. A molding material is disposed around the first and second semiconductor dice, where the molding material exposes the first exterior surface of the first heat sink structure and exposes the second exterior surface of the second heat sink structure.Type: GrantFiled: August 29, 2006Date of Patent: July 21, 2009Assignee: Fairchild Semiconductor CorporationInventors: SangDo Lee, Tiburcio A. Maldo
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Patent number: 7545033Abstract: A power module for low voltage applications, which does not include an insulated metal substrate is disclosed. The module includes a power shell and a plurality of lead frames each lead frame including a conductive pad on which one or more MOSFETs may be electrically mounted. The MOSFETs are electrically connected via wire bonds.Type: GrantFiled: July 28, 2006Date of Patent: June 9, 2009Assignee: International Rectifier CorporationInventor: William Grant
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Patent number: 7538423Abstract: A heat sink includes a base portion formed of insulating diamond, and a plurality of pressure contacting members formed of the insulating diamond and arranged on the base portionType: GrantFiled: September 22, 2006Date of Patent: May 26, 2009Assignee: Kabushiki Kaisha ToshibaInventors: Tomio Ono, Tadashi Sakai, Naoshi Sakuma, Hiroaki Yoshida, Mariko Suzuki
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Publication number: 20090122486Abstract: The invention includes semiconductor packages having grooves within a semiconductor die backside; and includes semiconductor packages utilizing carbon nanostructures (such as, for example, carbon nanotubes) as thermally conductive interface materials. The invention also includes methods of cooling a semiconductor die in which coolant is forced through grooves in a backside of the die, and includes methods of making semiconductor packages.Type: ApplicationFiled: January 20, 2009Publication date: May 14, 2009Applicant: MICRON TECHNOLOGY, INC.Inventors: Chandra Mouli, Gurtej S. Sandhu
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Publication number: 20090072372Abstract: A Planar Memory Module (PAMM) device comprising a generally planar card comprising a first side and a second side, the first side having a plurality of couplings and the second side having a plurality of connectors, a plurality of memory devices coupled to the card via a first portion of the plurality of couplings, and at least one hub chip coupled to the card via a second portion of the plurality of couplings. Each of the plurality of couplings is connected to an associated one of the plurality of connectors.Type: ApplicationFiled: June 20, 2008Publication date: March 19, 2009Inventors: Paul COTEUS, Kevin C. Gower, Shawn Anthony Hall, Gareth Geoffrey Hougham, Dale J. Pearson
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Patent number: 7495280Abstract: A MOS device having corner spacers and a method for forming the same are provided. The method includes forming a gate structure overlying a substrate, forming a first dielectric layer over the gate structure and the substrate, forming a second dielectric layer on the first dielectric layer, forming a third dielectric layer on the second dielectric layer, and etching the first, the second and the third dielectric layers using the third dielectric layer as a mask. The remaining first and second dielectric layers have an L-shape. The method further includes implanting source/drain regions, removing remaining portions of the third dielectric layer, blanket forming a fourth dielectric layer, etching the fourth dielectric layer, siliciding exposed source/drain regions, and forming a contact etch stop layer. The remaining portion of the fourth dielectric layer forms corner spacers.Type: GrantFiled: May 16, 2006Date of Patent: February 24, 2009Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Cheng-Yao Lo
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Patent number: 7468554Abstract: A heat sink board having a first heat sink and a second heat sink with a smaller linear expansion coefficient than that of the first heat sink and being bonded to the first heat sink to form the heat sink board. The second heat sink is fitted to the first heat sink, and a material of the first heat sink in the vicinity of a boundary between the fitted heat sinks is plastically deformed for close adhesion to the second heat sink. A forming method makes bonding between the first and second heat sinks possible at room temperature, and the heat sink board made of a composite member having a high flat-surface accuracy can be easily and reliably obtained.Type: GrantFiled: March 11, 2005Date of Patent: December 23, 2008Assignee: Hitachi, Ltd.Inventors: Kouji Harada, Hiroatsu Tokuda, Kazuo Ojima, Masayuki Kobayashi
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Patent number: 7446412Abstract: Some aspects include a heat sink base, an upper metal cladded to an upper surface of the heat sink base, the upper metal defining at least one groove, and a heat sink fin disposed in the groove and secured to the upper metal. Some aspects may also include a lower metal cladded to a lower surface of the heat sink base, and a pedestal secured to the lower cladding.Type: GrantFiled: March 28, 2006Date of Patent: November 4, 2008Assignee: Intel CorporationInventor: Paul J Gwin
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Publication number: 20080251909Abstract: A double-face-cooled semiconductor module with an upper arm and a lower arm of an inverter circuit includes first and second heat dissipation members, each having a heat dissipation surface on one side and a conducting member formed on another side through an insulation member. On the conducting member on the first dissipation plate is provided with a fixing portion that fixes a collector surface of the semiconductor chip and a gate conductor connected to a gate terminal of the semiconductor module. The gate electrode terminal and the gate conductor are wire bonded. The conducting member on the second heat dissipation member is connected to an emitter surface of the semiconductor chip connected to the first heat dissipation member. The productivity and reliability are improved by most of formation operations for the upper and lower arms series circuit on one of the heat dissipation member.Type: ApplicationFiled: April 1, 2008Publication date: October 16, 2008Applicant: Hitachi, Ltd.Inventors: Takeshi TOKUYAMA, Kinya NAKATSU, Ryuichi SAITO
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Patent number: 7423341Abstract: The specification describes a lidded MCM IC plastic overmolded package with chimney-type heat sink. The lid is mechanically decoupled from the chimneys by a compliant conductive polymer plug.Type: GrantFiled: August 16, 2006Date of Patent: September 9, 2008Assignee: Agere Systems Inc.Inventors: Robert B. Crispell, Robert Scott Kistler, John W. Osenbach
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Patent number: 7414311Abstract: A ball grid array housing, a semiconductor device having a ball grid array housing and an electronic circuit are disclosed. In one embodiment, a ball grid array housing includes a substrate with solder ball connections pointing out from a housing and at least one semiconductor chip. For better heat dissipation from the housing, the ball grid includes a metallic cooling foil, or a metallic cooling plate. A method of making a ball grid array is also disclosed.Type: GrantFiled: June 12, 2007Date of Patent: August 19, 2008Assignee: Infineon Technologies AGInventor: Georg Meyer-Berg
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Publication number: 20080191339Abstract: The invention concerns a module comprising a carrier element, a semiconductor device mounted on said carrier element and a silicon-based insulating layer. The silicon-based insulating layer is arranged on the side of the carrier element opposite to the semiconductor device. The invention further concerns a module comprising a semiconductor device, a mold compound at least partly covering the semiconductor device and a silicon-based passivation layer. The silicon-based passivation layer covers at least partly the periphery of the mold compound.Type: ApplicationFiled: February 9, 2007Publication date: August 14, 2008Applicant: Infineon Technologies AGInventors: Raif Otremba, Xaver Schloegel
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Patent number: 7411290Abstract: An integrated circuit chip is provided, the integrated circuit chip having: a base portion, the base portion having a peripheral wall forming an elevated perimeter depending away from a surface of the base potion; a plurality of extensions extending away from the surface, a periphery of each of the plurality of extensions being spaced away from the peripheral wall, the plurality of extensions further comprising a first group of extensions and a second group of extensions, each of the first group of extensions having a greater peripheral area than a peripheral area of each of the second group of extensions and the first group of extensions being aligned with a portion of an integrated circuit disposed on another surface of the base, the portion of the integrated circuit generating a higher heat flux than other portions of the integrated circuit, and a plate secured to the elevated perimeter, the plate the plate covering the plurality of extensions and further comprising an inlet opening and an outlet opening.Type: GrantFiled: August 5, 2005Date of Patent: August 12, 2008Assignee: Delphi Technologies, Inc.Inventors: Poh-Seng Lee, Shih-Chia Chang
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Patent number: 7372146Abstract: A semiconductor module includes a parts-mounting or packaging substrate, a plurality of power metal insulator semiconductor (MIS) chips which have top surfaces and back surfaces and are mounted by flip chip bonding on or above the package substrate while letting the top surfaces face the package substrate, a drive-use integrated circuit (IC) chip which is mounted by flip chip bonding above the package substrate for driving the gates of metal insulator semiconductor field effect transistors (MISFETs) that are formed on the power MIS chips a plurality of heat sinks disposed on or above the back surfaces of the power MIS chips, and a resin member for sealing the power MIS chips and the driver IC chip together in a single package.Type: GrantFiled: December 13, 2005Date of Patent: May 13, 2008Assignee: Kabushiki Kaisha ToshibaInventor: Nobuyuki Sato
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Patent number: 7365422Abstract: A package of a leadframe with heatsinks, including a leadframe, a die, a first heatsink and a second heatsink. The leadframe has a die pad and a plurality of leads, and the leads are disposed around the die pad. The die is disposed on the die pad. The first heatsink is disposed on a first side of the leadframe and has a plurality of first positioning portions. The second heatsink is disposed on a second side of the leadframe. The second heatsink has a plurality of second positioning portions. The second positioning portions correspond to the first positioning portions of the first heatsink, whereby the warping problem of the leadframe is resolved.Type: GrantFiled: December 21, 2005Date of Patent: April 29, 2008Assignee: Advanced Semiconductor Engineering, Inc.Inventors: Pai-Chou Liu, Jun-Cheng Liu, Kenneth Kinhang Ku, Yu-Li Chung
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Patent number: 7358605Abstract: A heat dissipation structure for an electronic device comprises a plurality of covering members made of a compressed wooden material, and a metal heat dissipation frame held between the covering members, and a portion of the heat dissipation frame is exposed outside of the electronic device.Type: GrantFiled: February 22, 2005Date of Patent: April 15, 2008Assignee: Olympus CorporationInventor: Tatsuya Suzuki
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Patent number: 7348604Abstract: The light-emitting module according to the present invention comprises a heat dissipation element, a substrate for example a metal core printed circuit board (MCPCB), or FR4 board which is coupled to one or more light-emitting elements and provides a means for operative connection of the light-emitting elements to a source of power. The substrate is positioned such that it is thermally coupled to the heat dissipation element. The light-emitting module further comprises a housing element which matingly connects with the heat dissipation element, wherein the housing element may further comprise an optical element integrated therein for manipulation of the light generated by the one or more light-emitting elements.Type: GrantFiled: May 19, 2006Date of Patent: March 25, 2008Assignee: TIR Technology LPInventor: George E. Matheson
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Patent number: 7320177Abstract: In a method of manufacturing a radiator, the blade of a carving tool is applied at a specific angle to the surface of a metal plate with a high coefficient of thermal conductivity, the carving tool is advanced while the angle is maintained, and the surface of the metal plate is carved out to form plate-shaped heat-radiating fins vertically upward. A radiator is manufactured in which a plurality of heat-radiating fins are integrally formed vertically upward at a specific pitch from a single metal plate by repeating a step in which the carving tool is retracted at a specific pitch, the metal plate is carved out, and a heat-radiating fin is formed. A radiator that has high radiation efficiency and is highly safe during handling can be manufactured at low cost.Type: GrantFiled: January 24, 2005Date of Patent: January 22, 2008Assignee: Nakamura Seisakusho KabushikigaishaInventor: Hideyuki Miyahara
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Patent number: 7316789Abstract: Conducting liquid crystal polymer matrix comprising carbon nanotubes aligned in the matrix is provided, along with use thereof and method of fabrication.Type: GrantFiled: November 2, 2004Date of Patent: January 8, 2008Assignee: International Business Machines CorporationInventor: Minhua Lu
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Publication number: 20080001275Abstract: A Planar Memory Module (PAMM) device comprising a generally planar card comprising a first side and a second side, the first side having a plurality of couplings and the second side having a plurality of connectors, a plurality of memory devices coupled to the card via a first portion of the plurality of couplings, and at least one hub chip coupled to the card via a second portion of the plurality of couplings. Each of the plurality of couplings is connected to an associated one of the plurality of connectors.Type: ApplicationFiled: September 14, 2007Publication date: January 3, 2008Inventors: Paul Coteus, Kevin Gower, Shawn Hall, Gareth Hougham, Dale Pearson
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Patent number: 7304372Abstract: A semiconductor package including a bidirectional compound semiconductor component and two power semiconductor devices connected in a cascode configuration.Type: GrantFiled: September 21, 2006Date of Patent: December 4, 2007Assignee: International Rectifier CorporationInventors: Kunzhong Hu, Chuan Cheah
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Patent number: 7301232Abstract: An integrated circuit package includes a die mounted on a substrate, an integrated heat spreader set above the die, and an array of carbon nanotubes mounted between the die and the integrated heat spreader. The integrated heat spreader is fixed on the substrate, and includes an inner face. The array of carbon nanotubes is formed on the inner face of the integrated heat spreader. Top and bottom ends of the carbon nanotubes perpendicularly contact the integrated heat spreader and the die respectively. Each carbon nanotube can be capsulated in a nanometer-scale metal having a high heat conduction coefficient.Type: GrantFiled: January 27, 2005Date of Patent: November 27, 2007Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Charles Leu, Tai-Cherng Yu, Chuan-De Huang, Wen-Jeng Huang, Jhy-Chain Lin, Ga-Lane Chen
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Patent number: 7298043Abstract: A semiconductor device having a wiring substrate, a semiconductor element mounted on the wiring substrate via a heat sink, a wire electrically connecting the wiring substrate and the semiconductor element, the wiring substrate having through holes each connected to the wire or the heat sink, and external electrodes formed on a back surface of the wiring substrate and connected to the through holes. An insulating layer is formed between the heat sink and the semiconductor element, and the heat sink is divided into at least two sections. Hence, the back surface of the semiconductor element maintains an electrically disconnected state irrespective of the potential of the heat sink, and the heat dissipation design is allowed greater flexibility. Thus, the external electrodes connected to the heat sink via the through holes are connected to the mounting substrate wirings having satisfactory heat dissipation efficiency, allowing the heat of the semiconductor element to escape efficiently.Type: GrantFiled: March 15, 2006Date of Patent: November 20, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Takashi Yui
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Patent number: 7288840Abstract: An apparatus for cooling a surface having a metal structure made of a material with high thermal conductivity, and designed to provide efficient cooling of the surface while minimizing mechanical stress between the metal structure and the surface.Type: GrantFiled: January 18, 2005Date of Patent: October 30, 2007Assignee: International Business Machines CorporationInventors: Bruce K. Furman, Yves Martin, Theodore G. van Kessel
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Patent number: 7268426Abstract: A packaged semiconductor chip includes features such as a chip carrier having a large thermal conductor which can be solder-bonded to a circuit panel so as to provide enhanced thermal conductivity to the circuit panel and electromagnetic shielding and a conductive enclosure which partially or completely surrounds the packaged chip to provide additional heat dissipation and shielding. The packaged unit may include both an active semiconductor chip and a passive element, desirably in the form of a chip, which includes resistors and capacitors. Inductors may be provided in whole or in part on the chip carrier.Type: GrantFiled: February 20, 2004Date of Patent: September 11, 2007Assignee: Tessera, Inc.Inventors: Michael Warner, Lee Smith, Belgacem Haba, Glenn Urbish, Masud Beroz, Teck-Gyu Kang
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Patent number: 7256493Abstract: A ball grid array housing, a semiconductor device having a ball grid array housing and an electronic circuit are disclosed. In one embodiment, a ball grid array housing includes a substrate with solder ball connections pointing out from a housing and at least one semiconductor chip. For better heat dissipation from the housing, the ball grid includes a metallic cooling foil, or a metallic cooling plate. A method of making a ball grid array is also disclosed.Type: GrantFiled: June 2, 2005Date of Patent: August 14, 2007Assignee: Infineon Technologies AGInventor: Georg Meyer-Berg
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Patent number: 7235889Abstract: The present invention is directed toward systems, packages, and methods for providing improved thermal performance in such packages and systems. Embodiments of the invention include a semiconductor integrated circuit (IC) package having a substrate with a heat spreader mounted on the substrate. An IC die is mounted to the heat spreader such that the heat spreader lies in between the die and the substrate. The invention is also directed to a heat spreader plate useable in a semiconductor package. The heat spreader plate comprises a plate comprised of thermally conductive material suitable for attachment to a packaging substrate wherein the plate includes openings for exposing electrical bonding surfaces of a packaging substrate when the heater spreader plate is mounted on the packaging substrate. Such openings enable wirebonding between the exposed electrical bonding surfaces of the substrate and an integrated circuit die to complete construction of a package including the heatspreader.Type: GrantFiled: September 10, 2004Date of Patent: June 26, 2007Assignee: LSI CorporationInventors: Maurice O. Othieno, Hong T. Lim, Qwai H. Low
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Publication number: 20070029665Abstract: The invention relates to a method and apparatus for controlling the temperature of integrated circuit chips. Specifically, the invention relates to method and apparatus for controlling the temperature gradient across integrated circuit chips.Type: ApplicationFiled: August 5, 2005Publication date: February 8, 2007Inventors: Poh-Seng Lee, Shih-Chia Chang
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Publication number: 20070004216Abstract: Electronic assemblies and methods for forming assemblies are described. One method of forming a semiconductor device includes providing a support substrate and forming a diamond layer on the support substrate. The diamond layer is detached from the support substrate and diced into a plurality of diamond heat spreader bodies. A material comprising a metal is formed on a first diamond heat spreader body of the plurality of diamond heat spreader bodies. A die is positioned on the first diamond heat spreader body so that the material comprising a metal is between the die and the first diamond heat spreader body. The method also includes heating the material comprising a metal and coupling the die to the first diamond heat spreader body. After the coupling the die to the first diamond heat spreader body, the method also includes coupling the die to a substrate, wherein the die is positioned between the first diamond heat spreader body and the substrate. Other embodiments are described and claimed.Type: ApplicationFiled: June 30, 2005Publication date: January 4, 2007Inventors: Chuan Hu, Richard Emery
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Patent number: 7119433Abstract: In an integrated circuit packaging structure, such as in a SCM, DCM, or MCM, a method and apparatus for increasing heat spreader size and thus thermal performance is disclosed. The packaging structure includes a first substrate; an electronic device operably coupled to a top surface defining the first substrate; a heat spreader having a first surface operably coupled to a top surface defining the electronic device and an opposite second surface in thermal communication with a second substrate; and a frame defining an opening therethrough. The frame is further defined by an inwardly extending ledge configured to allow the heat spreader to extend at least to a peripheral edge defining a perimeter of the first substrate. In an exemplary embodiment, the second substrate includes one of a heat sink, cooling plate, thermal spreader, heat pipe, thermal hat, package lid, or other cooling member.Type: GrantFiled: June 16, 2004Date of Patent: October 10, 2006Assignee: International Business Machines CorporationInventors: John S. Corbin, Jr., Gary F. Goth, Dales M. Kent, William P. Kostenko, Roger R. Schmidt, John G. Torok
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Publication number: 20060208353Abstract: A cooling device for an element such as a microprocessor in a computer, and a process for manufacturing the cooling device. The cooling device provides an effective structure of cooling a microprocessor by providing a metallic filler layer and a metal plate layer spreading out heat generated from the microprocessor, and thereby effectively thermally conducting heat away from the microprocessor. Further, a semiconductor thermoelectric module can be utilized to further cool the microprocessor.Type: ApplicationFiled: May 23, 2006Publication date: September 21, 2006Applicant: DTNR LTD.Inventors: Eliezer Adar, Vladimir Gotlib
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Patent number: 7084496Abstract: An optoelectronic assembly for an electronic system includes a transparent substrate having a first surface and an opposite second surface, the transparent substrate being thermally conductive and being metallized on the surface. A support electronic chip set is configured for at least one of providing multiplexing, demultiplexing, coding, decoding and optoelectronic transducer driving and receive functions and is bonded to the second surface of the transparent substrate. A first substrate having a first surface and an opposite second surface, is in communication with the transparent substrate via the metallized second surface and support chip set therebetween. A second substrate is in communication with the second surface of the first substrate and is configured for mounting at least one of data processing, data switching and data storage chips.Type: GrantFiled: January 14, 2004Date of Patent: August 1, 2006Assignee: International Business Machines CorporationInventors: Alan F. Benner, How Tzu Lin, Frank L. Pompeo, Subhash L. Shinde
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Publication number: 20040080914Abstract: An electronic assembly comprising one or more high performance integrated circuits includes at least one high capacity heat sink. The heat sink, which comprises a number of fins projecting substantially radially from a core, is structured to capture air from a fan and to direct the air to optimize heat transfer from the heat sink. The heat sink fins can be formed in different shapes. In one embodiment, the fins are curved. In another embodiment, the fins are bent. In yet another embodiment, the fins are curved and bent. Methods of fabricating heat sinks and electronic assemblies, as well as application of the heat sink to an electronic assembly and to an electronic system, are also described.Type: ApplicationFiled: November 19, 2003Publication date: April 29, 2004Applicant: Intel Corporation.Inventors: Daniel P. Carter, Michael T. Crocker, Ben M. Broili, Tod A. Byquist, David J. Llapitan