Abstract: An interface card assembly adapted for fixing an M.2 interface card to a circuit board body with an M.2 connector is provided. The M.2 interface card includes a connecting end and an end. The interface card assembly includes a heat dissipation plate and a fastener. The heat dissipation plate is disposed at a position adjacent to the M.2 connector, and the heat dissipation plate includes a hole. The fastener is detachably disposed in the hole. The fastener includes a main body and a cantilever, and a clamping part is disposed between the main body and the cantilever. When the M.2 interface card is inserted into the M.2 connector through the connecting end, the fastener moves relative to the heat dissipation plate at the end, so that the M.2 interface card extends into the clamping part and is clamped between the main body and the cantilever.

Abstract: Aspects of the subject disclosure may include, for example, a process that provides a semiconductor substrate and forms repeating, conductive patterns configured for coupling to active circuitry. Each pattern comprises a group of thermally conductive layers, wherein the group of thermally layers is thermally coupled to a thermal source generated by the active circuitry. Thermally conductive vias interconnect the group of thermally conductive layers, wherein a combination of the vias and the group of thermally conductive layers is configured to transfer heat from the thermal source with a desired directionality. The first repeating patterns are thermally coupled to each other to combine the desired directionality of each of the patterns, wherein the combination results in a distributed directionality of the heat from the thermal source thereby reducing a localized concentration of the heat. Other embodiments are disclosed.

Abstract: A semiconductor device includes a substrate, an electronic component, a stiffener ring and an adhesive ring. The substrate has a first surface and a second surface opposite to the first surface. The electronic component is over the first surface of the substrate. The stiffener ring is over the first surface of the substrate. The stiffener ring includes a plurality of side parts and a plurality of corner parts coupled to the side parts. Heights of the corner parts are less than heights of the side parts. The adhesive ring is interposed between the first surface of the substrate and the stiffener ring. The adhesive ring includes a plurality of side portions and a plurality of corner portions coupled to the side portions. Thicknesses of the side portions are less than thicknesses of the corner portions.

Abstract: A heatsink assembly comprising a substrate having an active circuitry, at least one cavity located adjacent to at least one heat producing element of the active circuitry, at least one vessel sealably coupled to said substrate in fluid communication with the at least one cavity, and a phase change material (PCM) contained inside the vessel. The vessel and at least one cavity configured to facilitate migration of the PCM from the vessel into the at least one cavity for absorbing heat produced by the at least one heat producing element of the active circuitry.

Abstract: A microfabrication device is provided. The microfabrication device includes a transistor plane formed on a substrate, the transistor plane including a plurality of field effect transistors; fluidic passages formed within the transistor plane; a dielectric fluid added to the fluidic passages; and a circulating mechanism configured to circulate the dielectric fluid through the transistor plane.

Abstract: A cooling device includes a heat-radiating fin group having a plurality of heat-radiating fins that are arranged parallel to each other in a first direction; first heat pipes, one end of each first heat pipe being configured to be thermally connected to a first heat-generating element, another end of each first heat pipe being thermally connected to the heat-radiating fin group; and second heat pipes, one end of each second heat pipe being configured to be thermally connected to a second heat-generating element, another end of each second heat pipe being thermally connected to the heat-radiating fin group, wherein respective inserted another ends of the first and second heat pipes are disposed on a plane parallel to the first direction and defined in the heat-radiating fin group and have portions parallel to the first direction.

Abstract: A semiconductor device includes a first functional block configured to provide a first predetermined function, a second functional block configured to provide a second predetermined function, a first capacitive device, a second capacitive device, a first coupling path, a first switch device and a second switch device. The first capacitive device is disposed physically proximate the first functional block. The second capacitive device is disposed physically proximate the second functional block. The first coupling path includes at least a first connection node connecting to the first functional block. The first switch device is controlled to selectively connect the first capacitive device to the first connection node. The second switch device is controlled to selectively connect the second capacitive device to the second functional block or a second connection node. The second connection node is disposed on the first coupling path and connecting to the first connection node.

Abstract: A heatsink assembly, a method of producing a heat sink assembly and an electrical device. The heatsink assembly including a heatsink having a surface for receiving a heat source, a copper insert and a layer of low density pyrolytic graphite. The copper insert and the layer of low density pyrolytic graphite are arranged on the surface of the heatsink in layers to form a heat transferring assembly, and the heat transferring assembly is adapted to receive a heat source for transferring the heat from the heat source to the heatsink.

Abstract: A semiconductor package includes a redistribution structure, at least one semiconductor device, a heat dissipation component, and an encapsulating material. The at least one semiconductor device is disposed on and electrically connected to the redistribution structure. The heat dissipation component is disposed on the redistribution structure and includes a concave portion for receiving the at least one semiconductor device and an extending portion connected to the concave portion and contacting the redistribution structure, wherein the concave portion contacts the at least one semiconductor device. The encapsulating material is disposed over the redistribution structure, wherein the encapsulating material fills the concave portion and encapsulates the at least one semiconductor device.

Abstract: A fin block is provided for a calibrating device for the calibrating of an extruded profile. The fin block includes a fin structure, which has a plurality of fins which are spaced apart from one another by grooves and are arranged in longitudinal direction of the fin block, wherein the fins of the fin structure have a variable dimension in longitudinal direction of the fin block. Further, there is provided a method for the production of the above-mentioned fin block and a calibrating device, which includes a plurality of the above-mentioned fin blocks. Furthermore, there is provided a system for the additive manufacture of the above-mentioned fin block, a corresponding computer program and corresponding data set.

Abstract: A heat dissipating circuit board assembly includes a heat sink having a first wall, a second wall spaced from the first wall, and an end wall extending between the first and second walls. The first wall, the second wall, and the end wall collectively define a cavity. The assembly additionally includes a printed circuit board having a first face and a second face opposite the first face. The printed circuit board is located within the cavity such that the first wall of the heat sink extends over the first face and the second wall of the heat sink extends over the second face to allow heat to be transferred from the printed circuit board to the heat sink. The heat sink is configured to interface with a connector socket when the circuit board is connected to the connector socket for stabilizing the printed circuit board.

Abstract: A semiconductor device includes a gate electrode extending in a first direction in a first layer over an active region, a first conductive line extending in the first layer adjacent to the gate electrode, a first power rail extending in a second direction perpendicular to the first direction in a second layer over the first layer, a second conductive line arranged in a third layer over the second layer, and a conductive via extending through the first power rail and electrically connecting the second conductive line to one of the gate electrode and the first conductive line. The conductive via is electrically insulated from the first power rail.

Abstract: An electronic device includes a heat-generating electronic component, a heat spreader and a heat sink. The heat spreader has an area at least about 4 times greater than the heat-generating component. A first surface of the heat spreader is in thermal contact with the first surface of the heat-generating component along a first, non-dielectric interface. The heat sink has greater mass than the heat spreader and comprises one or more layers of thermally conductive material. A first surface of the heat sink is in thermal contact with the second surface of the heat spreader along a second interface having greater area than the first interface. Dielectric thermal interface material is provided at the second interface in direct contact with the heat spreader and the heat sink, such that the second interface is dielectric.

Abstract: A heat dissipation device includes a heat diffusion plate, a resin unit, and a connecting unit. The heat diffusion plate is configured such that the first surface is overlapped with an electronic component via a heat conductive material. The resin unit integrally includes a contact portion, an outer frame portion, and a deformation portion. The contact portion is configured so that at least a part thereof can make surface contact with the second surface of the heat diffusion plate opposite from the first surface. The outer frame portion is configured to surround the contact portion with a gap from the surroundings to form a part of a housing surrounding the electronic component and the heat diffusion plate. The deformation portion is provided between the outer frame portion and the contact portion, and is configured to elastically deform when the contact portion is pressed against the second surface.

Abstract: In a heat sink module and a manufacturing method thereof, the method includes steps of: forming a heat dissipation fin set by aluminum extrusion process, wherein the heat dissipation fin set includes a plate, a plurality of fins extending from one side of the plate and being arranged spaced apart from one another, and a joint portion formed on the other side of the plate; placing the plate in a mold; injecting molten metal into the mold; forming a base by die-casting of the molten metal. The plate and the joint portion are wrapped by the base. The joint portion forms a connection structure including a bump and a notch fitted with the bump, so as to connect and fix the base and the heat dissipation fin set. The heat sink module has the strengthened connection structure and the fins with a superior aspect ratio.

Abstract: Proposed is a heatsink module for an inverter. The heatsink module includes a housing a bottom face, both spaced side walls, and both flanges. The heatsink module include a heat-dissipation plate including a base fixed to the both flanges; and a plurality of heat-dissipation fins extending downward from a bottom of the base. The heatsink module includes a supporter interposed between the bottom face of the housing and the heat-dissipation fins. The supporter has slots defined therein for accommodating at least portions of the heat-dissipation fins respectively.

Abstract: Integrated heat spreaders having electromagnetically-formed features, and semiconductor packages incorporating such integrated heat spreaders, are described. In an example, an integrated heat spreader includes a top plate flattened using an electromagnetic forming process. Methods of manufacturing integrated heat spreaders having electromagnetically-formed features are also described.

Abstract: Examples described herein generally relate to apparatus and methods for rapid thermal processing (RTP) of a substrate. In one example, a process chamber includes chamber body, a window disposed on a first portion of the chamber body, a chamber bottom, and a shield disposed on a second portion of the chamber body. The shield has a flat surface facing the window to reduce reflected radiant energy to a back side of a substrate disposed in the process chamber during operation. The process chamber further includes an edge support for supporting the substrate and a cooling member disposed on the chamber bottom. The cooling member is disposed in proximity of the edge support to cool the edge support during low temperature operation in order to improve the temperature uniformity of the substrate.

Abstract: An integrated circuit package apparatus includes a packaging substrate, an integrated circuit coupled to an upper side of the packaging substrate, an array of contacts coupled to an underside of the packaging substrate for electrically coupling the integrated circuit to a circuit board, and a lid coupled to the upper side of the packaging substrate. In one form, the lid includes a central portion lying on a first plane, corner areas lying on a second plane, and arcuate wall portions disposed between and interconnecting the corner areas and the central portion. Other forms of the lid are provided.

Abstract: An LED manufacturing method includes following steps: providing an LED die; providing an electrode layer having a first section and a second section electrically insulated from the first section, and arranging the LED die on the second section wherein an electrically conductive material electrical connects a bottom of the LED die with second section; forming a transparent conductive layer to electrically connect a top of the LED die with the first section; providing a base and coating an outer surface of the base with a layer of electrically conductive material, defining a continuous gap in the electrically conductive material to divide the electrically conductive material into a first electrode part, and a second electrode part, arranging the electrode layer on the base so that the first section contacts the first electrode part, and the second section contacts the second electrode part.

Abstract: According to various embodiments, a distributed heating transistor includes: a plurality of active regions where transistor action occurs including a heat source; and at least one inactive region where transistor action does not occur and no heat source is present, wherein adjacent active regions are separated by the at least one inactive region. The distributed heating transistor may be configured as field effect transistors (FETs), and bipolar junction transistors (BJTs). Methods for forming the distributed heating transistors are also provided.

Abstract: A chip package is provided, the chip package including: first encapsulation structure; first passivation layer formed over first encapsulation structure and first electrically conductive layer formed over first passivation layer; at least one chip arranged over first electrically conductive layer and passivation layer wherein at least one chip contact pad contacts first electrically conductive layer; at least one cavity formed in first encapsulation structure, wherein at least one cavity exposes a portion of first passivation layer covering at least one chip contact pad; second encapsulation structure disposed over first encapsulation structure and covering at least one cavity, wherein a chamber region over at least one chip contact pad is defined by at least one cavity and second encapsulation structure; wherein second encapsulation structure includes an inlet and outlet connected to chamber region, wherein inlet and outlet control an inflow and outflow of heat dissipating material to and from chamber region

Abstract: A device comprising a substrate, an integrated circuit (IC) die attached to the substrate on one side, a plurality of contact pads on an active side of the IC die, a plurality of thermally and electrically conductive legs, each of the legs attached to a respective one of the contact pads, and an encapsulating material formed around the substrate, the IC die, and a portion of the legs. A contact end of each of the legs is exposed, and one of the contact ends conducts a signal from a transistor in the IC die.

Abstract: An electric device with an insulating substrate consisting of an insulating layer and at least one metallization on a surface side of the insulating layer, the metallization being structured and having an electric component on the metallization. The metallization has a layer thickness that is stepped and is greater in an area adjoining the component.

Abstract: A multi-chip module (MCM) structure comprises more than one semiconductor chip lying in a horizontal plane, the MCM having individual chip contact patches on the chips and a flexible heat sink having lateral compliance and extending in a plane in the MCM and secured in a heat exchange relation to the chips through the contact patches. The MCM has a mismatch between the coefficient of thermal expansion of the heat sink and the MCM and also has chip tilt and chip height mismatches. The flexible heat sink with lateral compliance minimizes or eliminates shear stress and shear strain developed in the horizontal direction at the interface between the heat sink and the chip contact patches by allowing for horizontal expansion and contraction of the heat sink relative to the MCM without moving the individual chip contact patches in a horizontal direction.

Abstract: A semiconductor package includes a printed circuit board, a chip, a protection frame, and a covering layer. The chip is mounted on the printed circuit board and is electrically connected to the printed circuit board through a number of first bonding wires. The protection frame includes a sidewall surrounding the chip and the bonding wires and defines a number of through holes passing through an inner surface and an outer surface of the sidewall. The protection frame is filled with adhesive. The adhesive adheres to the inner surface and covers the chip and the boding wires. The covering layer is coated on the outer surface and covers the through holes.

Abstract: There is provided a semiconductor package module, and more particularly, a semiconductor package module constituted by modularizing power semiconductor devices incapable of being able to be easily integrated due to heat generated therefrom. To this end, the semiconductor package module includes a plurality of semiconductor packages; and a plurality of semiconductor packages; and a heat dissipation member having a pipe shape including a flow channel formed therein and including at least one or more through holes into which the semiconductor packages are inserted.

Abstract: A technology with which the reliability of a package making up a semiconductor device can be enhanced is provided. A feature of the technical idea of the invention is that: a heat sink unit and an outer lead unit are separated from each other: and the outer lead unit is provided with chip placement portions and each of the chip placement portions and each heat sink are joined together. As a result, when a sealing body is formed at a resin sealing step, tying portions function as a stopper for preventing resin leakage and the formation of resin burr in a package product can be thereby prevented. In addition, camber does not occur in the heat sink unit and cracking in a sealing body caused by winding (camber) can be suppressed.

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace, a substrate and an adhesive. The heat spreader includes a post and a base. The conductive trace includes a pad, a terminal, a conductive pattern and first and second vias. The substrate includes the conductive pattern and a dielectric layer. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The post extends upwardly from the base into an opening in the adhesive and an aperture in the substrate, and the base extends laterally from the post. The conductive trace provides signal routing between the pad and the terminal using the conductive pattern and the vias.

Abstract: A multi-chip module (MCM) structure comprises more than one semiconductor chip lying in a horizontal plane, the MCM having individual chip contact patches on the chips and a flexible heat sink having lateral compliance and extending in a plane in the MCM and secured in a heat exchange relation to the chips through the contact patches. The MCM has a mismatch between the coefficient of thermal expansion of the heat sink and the MCM and also has chip tilt and chip height mismatches. The flexible heat sink with lateral compliance minimizes or eliminates shear stress and shear strain developed in the horizontal direction at the interface between the heat sink and the chip contact patches by allowing for horizontal expansion and contraction of the heat sink relative to the MCM without moving the individual chip contact patches in a horizontal direction.

Abstract: A semiconductor device includes a multilayer wiring substrate and a double-sided multi-electrode chip. The double-sided multi-electrode chip includes a semiconductor chip and has multiple electrodes on both sides of the semiconductor chip. The double-sided multi-electrode chip is embedded in the multilayer wiring substrate in such a manner that the double-sided multi-electrode chip is not exposed outside the multilayer wiring substrate. The electrodes of the double-sided multi-electrode chip are connected to wiring layers of the multilayer wiring substrate.

Abstract: A die stack package is provided and includes a substrate, a stack of computing components, at least one thermal plate, which is thermally communicative with the stack and a lid supported on the substrate to surround the stack and the at least one thermal plate to thereby define a first heat transfer path extending from one of the computing components to the lid via the at least one thermal plate and a fin coupled to a surface of the lid and the at least one thermal plate, and a second heat transfer path extending from the one of the computing components to the lid surface without passing through the at least one thermal plate.

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and first and second adhesives. The heat spreader includes a first post, a second post and a base. The conductive trace includes a pad and a terminal. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The first post extends from the base in a first vertical direction into a first opening in the first adhesive, the second post extends from the base in a second vertical direction into a second opening in the second adhesive and the base is sandwiched between and extends laterally from the posts. The conductive trace provides signal routing between the pad and the terminal.

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The heat spreader includes a thermal post and a base. The thermal post extends upwardly from the base into a first opening in the adhesive, and the base extends laterally from the thermal post. The conductive trace includes a pad, a terminal and a signal post. The signal post extends upwardly from the terminal into a second opening in the adhesive.

Abstract: A method of making a semiconductor chip assembly includes providing first and second posts, first and second adhesives and a base, wherein the first post extends from the base in a first vertical direction into a first opening in the first adhesive, the second post extends from the base in a second vertical direction into a second opening in the second adhesive and the base is sandwiched between and extends laterally from the posts, then flowing the first adhesive in the first vertical direction and the second adhesive in the second vertical direction, solidifying the adhesives, then providing a conductive trace that includes a pad and a terminal, wherein the pad extends beyond the base in the first vertical direction and the terminal extends beyond the base in the second vertical direction, providing a heat spreader that includes the posts and the base, then mounting a semiconductor device on the first post, electrically connecting the semiconductor device to the conductive trace and thermally connecting the

Abstract: A method of making a semiconductor chip assembly includes providing first and second posts, first and second adhesives and a base, wherein the first post extends from the base in a first vertical direction into a first opening in the first adhesive and is located within a periphery of the second post, the second post extends from the base in a second vertical direction into a second opening in the second adhesive and the base is sandwiched between and extends laterally from the posts, then flowing and solidifying the adhesives, then providing a conductive trace that includes a pad and a terminal, wherein the pad extends beyond the base in the first vertical direction and the terminal extends beyond the base in the second vertical direction, providing a heat spreader that includes the posts and the base, then mounting a semiconductor device on the first post, electrically connecting the semiconductor device to the conductive trace and thermally connecting the semiconductor device to the heat spreader.

Abstract: The thermal energy transfer techniques of the disclosed embodiments utilize passive thermal energy transfer techniques to reduce undesirable side effects of trapped thermal energy at the circuit level. The trapped thermal energy may be transferred through the circuit with thermally conductive structures or elements that may be produced as part of a standard integrated circuit process. The localized and passive removal of thermal energy achieved at the circuit level rather just at the package level is both more effective and more efficient.

Abstract: A semiconductor module having a semiconductor chip stack and a method for producing the same is disclosed. In one embodiment, a thermally conductive layer with anisotropically thermally conductive particles is arranged between the semiconductor chips. The anisotropically thermally conductive particles have a lower thermal conductivity in a direction vertically with respect to the layer or the film than in a direction of the layer or the film.

Abstract: An integrated circuit chip package is described. The integrated circuit package comprises a substrate, a chip attached to the substrate, and a heat spreader mounted over the chip for sealing the chip therein. The heat spreader includes a thermally-conductive element having a side opposed to the top of the chip for transmitting heat away from the chip to the heat spreader, and a compliant element having a first portion attached to and positioned around the periphery of the thermally-conductive element and a second portion affixed to a surface of the substrate.

Abstract: A method of making a semiconductor chip assembly includes providing a post and a base, mounting an adhesive on the base including inserting the post through an opening in the adhesive, mounting a substrate on the adhesive including inserting the post into an aperture in the substrate, then flowing the adhesive between the post and the substrate in the aperture, solidifying the adhesive, then grinding the post and the adhesive, then mounting a semiconductor device on a heat spreader that includes the post and the base, electrically connecting the semiconductor device to the substrate and thermally connecting the semiconductor device to the heat spreader.

Abstract: A method of making a semiconductor chip assembly includes providing first and second posts, first and second adhesives, first and second conductive layers and a dielectric base, wherein the first post extends from the dielectric base in a first vertical direction into a first opening in the first adhesive and is aligned with a first aperture in the first conductive layer, the second post extends from the dielectric base in a second vertical direction into a second opening in the second adhesive and is aligned with a second aperture in the second conductive layer and the dielectric base is sandwiched between and extends laterally from the posts, then flowing the first adhesive in the first vertical direction and the second adhesive in the second vertical direction, solidifying the adhesives, then providing a conductive trace that includes a pad, a terminal and selected portions of the conductive layers, wherein the pad extends beyond the dielectric base in the first vertical direction and the terminal extends

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The heat spreader includes a post and a base. The conductive trace includes a pad, a terminal and a plated through-hole. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The post extends upwardly from the base into an opening in the adhesive, and the base extends laterally from the post. The conductive trace provides signal routing between the pad and the terminal using the plated through-hole.

Abstract: Methods for fabricating flip-chips are disclosed. In an exemplary method, a flip-chip is mounted, active-surface downward, onto a substrate such that a back-side of the flip-chip is facing upward and electrical connections are made between the chip and an upward-facing surface of the substrate. An adhesive is applied to selected regions not occupied by the flip-chip. A heat-spreader is applied to contact the applied adhesive without contacting the back-side of the flip-chip, leaving a gap between the heat-spreader and the back-side of the flip-chip. The heat-spreader defines at least one through-hole that, when the heat-spreader is placed, is within a perimeter of the flip-chip. The adhesive is cured, and a thermal-insulating material (TIM) is applied through the at least one through-hole so as to fill the gap with the TIM. The methods substantially reduce the probability of die damage that otherwise occurs during attachment of heat-spreaders.

Abstract: An LED assembly can include a heat sink base, at least one LED die attached to the heat sink base, and a lens. One or more layers of phosphor can be formed upon the lens. A heat sink, such as a finned heat sink, can attach the heat sink base to the lens. Heat from the LED die can flow through the heat sink base to the heat sink, from which the heat can be dissipated. Similarly, heat from phosphors can flow through the lens to the heat sink, from which the heat can be dissipated. By removing heat from the LED die, more current can be used to drive the LED die, thus providing brighter light. By removing heat from the phosphors, desired colors can be more reliably provided.

Abstract: An interposer and a semiconductor device including the interposer, which can prevent thermal warpage of an insulative substrate. The interposer is provided with a semiconductor chip in a semiconductor device and may be disposed between the semiconductor chip and a mount board. The interposer includes: a substrate of an insulative resin; an island on one surface of the substrate to be bonded to a rear surface of the chip; a thermal pad on the other surface opposite the one surface opposed to the island with the intervention of the substrate; and a thermal via extending through the substrate from the one surface to the other surface to thermally connect the island to the thermal pad.

Abstract: A semiconductor device includes a semiconductor element 1, a thermal conductor 91 located opposite a major surface of the semiconductor element 1, and a mold resin member 6 molding the semiconductor element 1 and at least a part of the thermal conductor 91, wherein at least a part of a top surface of the thermal conductor 91 has an exposed portion exposed from the mold resin member 6, the exposed portion of the thermal conductor 91 has an opening 11, and a periphery of the opening 11 forms a projecting portion 91b projecting toward an opposite side of the semiconductor element 1.

Abstract: An integrated circuit with a multi-stage matching circuit with an inductive conductive structure with a first end and a second end in the integrated circuit and a capacitor structure in the integrated circuit connected to a tap between the ends of the inductive conductive structure between the inductive conductive structure and a reference potential.

Abstract: An interposer and a semiconductor device including the interposer, which can prevent thermal warpage of an insulative substrate. The interposer is provided with a semiconductor chip in a semiconductor device and may be disposed between the semiconductor chip and a mount board. The interposer includes: a substrate of an insulative resin; an island on one surface of the substrate to be bonded to a rear surface of the chip; a thermal pad on the other surface opposite the one surface opposed to the island with the intervention of the substrate; and a thermal via extending through the substrate from the one surface to the other surface to thermally connect the island to the thermal pad.

Abstract: A module has a substrate, first and second integrated circuits, and a heat sink. The integrated circuits each have a first major surface, a second major surface, a first edge, a second edge, and a third edge and have optical circuits having ports on the first edge and electronic circuits having ports on the second edge. The second edges are connected to the substrate. The first major surface of the second integrated circuit is parallel with the second major surface of the first integrated circuit. The heat sink has a backplane adjacent to the third edge, a first portion along the first major surface of the first integrated circuit, a second portion along the second major surface of the second integrated circuit extending from the backplane, and an insert between the first major surface of the second integrated circuit and the second major surface of the first integrated circuit.

Abstract: An electronic assembly may include a packaging substrate, an integrated circuit (IC) semiconductor chip, a plurality of metal interconnection structures, and a thermoelectric heat pump. The integrated circuit (IC) semiconductor chip may have an active side including input/output pads thereon and a back side opposite the active side, and the IC semiconductor chip may be arranged with the active side facing the first surface of the packaging substrate. The plurality of metal interconnection structures may be between the active side of the IC semiconductor chip and the first surface of the packaging substrate, and the plurality of metal interconnection structures may provide mechanical connection between the active side of the IC semiconductor chip and the first surface of the packaging substrate. The thermoelectric heat pump may be coupled to the packaging substrate with the thermoelectric heat pump being configured to actively pump heat between the IC semiconductor chip and the packaging substrate.