Containing Superconducting Materials (epo) Patents (Class 257/E23.156)
  • Patent number: 8319277
    Abstract: A semiconductor device that includes multiple logic circuit cells having respective logic circuits formed therein and multiple interconnects connected to the corresponding logic circuit cells. At least one of the interconnects has an opening formed therein so as to have an opening ratio different from one or more of the opening ratios of the remaining interconnects.
    Type: Grant
    Filed: January 22, 2010
    Date of Patent: November 27, 2012
    Assignee: Fujitsu Limited
    Inventors: Hideki Kitada, Takahiro Kimura
  • Patent number: 8129832
    Abstract: A mountable integrated circuit package system includes: providing a carrier; mounting a first integrated circuit device over the carrier; mounting a substrate over the first integrated circuit device with the substrate having a conductor-free recess; connecting a first electrical interconnect under the conductor-free recess electrically connecting the carrier and the first integrated circuit device; and forming a package encapsulation over the carrier, the first integrated circuit device, the first electrical interconnect, the conductor-free recess, and partially exposing the substrate.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: March 6, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Flynn Carson, In Sang Yoon, SeongMin Lee, JoHyun Bae