Geometry Or Disposition Of Pixel-elements, Address-lines, Or Gate-electrodes (epo) Patents (Class 257/E27.131)
  • Patent number: 8823123
    Abstract: According to one embodiment, there is provided a solid-state image sensor including a photoelectric conversion layer, and a multilayer interference filter. The multilayer interference filter is arranged to conduct light of a particular color, of incident light, selectively to the photoelectric conversion layer. The multilayer interference filter has a laminate structure in which a first layer having a first refraction index and a second layer having a second refraction index are repeatedly laminated, and a third layer which is in contact with a lower surface of the laminate structure and has a third refraction index. A lowermost layer of the laminate structure is the second layer. The third refraction index is not equal to the first refraction index and is higher than the second refraction index.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: September 2, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Kokubun, Yusaku Konno
  • Patent number: 8772844
    Abstract: Capacitance between a detection capacitor and a reset transistor is the largest among the capacitances between the detection capacitor and transistors placed around the detection capacitor. In order to reduce this capacitance, it is effective to reduce the channel width of the reset transistor. It is possible to reduce the effective channel width by distributing, in the vicinity of the channel of the reset transistor and the boundary line between an active region and an element isolation region, ions which enhance the generation of carriers of an opposite polarity to the channel.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: July 8, 2014
    Assignee: Wi Lan, Inc.
    Inventors: Motonari Katsuno, Ryouhei Miyagawa, Masayuki Matsunaga
  • Patent number: 8723093
    Abstract: An image sensor includes a pixel array with a plurality of pixels. Two or more rows of pixels in the pixel array share a control line in the pixel array, and pixels of the two or more rows of pixels that are in a same column of the pixel array are connected to provide output to different column readout lines. A method includes providing a control signal over a control line within a pixel array to pixels in two or more rows of the pixel array, and reading out signals from the pixels in the two or more rows at a same time over different column readout lines. An image sensor includes a pixel array with a plurality of pixels, and two or more columns of pixels in the pixel array may share a control line in the pixel array for receiving a control signal.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: May 13, 2014
    Inventor: Alexander Krymski
  • Patent number: 8710613
    Abstract: A pickup device according to the present invention includes a photoelectric conversion portion, a charge holding portion configured to include a first semiconductor region, and a transfer portion configured to include a transfer gate electrode that controls a potential between the charge holding portion and a sense node. A second semiconductor region is disposed on a surface of a semiconductor region between the control electrode and the transfer gate electrode. A third semiconductor region is disposed below the second semiconductor region. An impurity concentration of the third semiconductor region is higher than the impurity concentration of the first semiconductor region.
    Type: Grant
    Filed: October 6, 2010
    Date of Patent: April 29, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yuichiro Yamashita, Masahiro Kobayashi, Yusuke Onuki
  • Patent number: 8698158
    Abstract: A display substrate includes a pixel electrode, an m-th data line (‘m’ is a natural number), a floating electrode, a (m+1)-th data line and a storage electrode. The pixel electrode is disposed in a pixel area of the substrate. The m-th data line is disposed at a first side of the pixel electrode and electrically connected to the pixel electrode. The floating electrode partially overlaps with the m-th data line. The (m+1)-th data line is disposed at a second side of the pixel electrode. The storage electrode is spaced apart from the (m+1)-th data line.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: April 15, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Myung-Koo Hur, Sang-Gun Choi
  • Patent number: 8692259
    Abstract: A light-emitting device includes a power feeding line to which a predetermined voltage is supplied; a light-emitting element formed of a first electrode, a second electrode, and a light-emitting layer interposed between the first electrode and the second electrode; and a driving transistor that controls the amount of current supplied to the light-emitting element from the power feeding line. The power feeding line includes a portion interposed between the first electrode and the driving transistor.
    Type: Grant
    Filed: April 11, 2012
    Date of Patent: April 8, 2014
    Assignee: Seiko Epson Corporation
    Inventors: Takehiko Kubota, Eiji Kanda, Ryoichi Nozawa
  • Patent number: 8653526
    Abstract: A display panel having a display area and a gate driving area includes a gate line and plural pixel units in the display area, and a gate driver circuit in the gate driving area. The gate line connects to the pixel units. The gate driver circuit connects to the gate line. The gate driver includes a driving transistor and a driving storage capacitor stacked to each other to form a stack structure, which includes a first electrode, a first dielectric layer, a second electrode, a second dielectric layer, a first semiconductor layer, a drain electrode, and a source electrode, which is connected to the gate line. The driving storage capacitor is formed by the first electrode, the first dielectric layer, and the second electrode. The driving transistor is formed by the second electrode, the second dielectric layer, the first semiconductor layer, the source electrode, and the drain electrode.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: February 18, 2014
    Assignee: AU Optronics Corporation
    Inventors: Chen-Yuan Lei, Meng-Chieh Tsai
  • Patent number: 8633488
    Abstract: An active matrix display device having a pixel structure in which pixel electrodes, gate wirings and source wirings are suitably arranged in the pixel portions to realize a high numerical aperture without increasing the number of masks or the number of steps. The device comprises a gate electrode and a source wiring on an insulating surface, a first insulating layer on the gate electrode and on the source wiring, a semiconductor layer on the first insulating film, a second insulating layer on the semiconductor film, a gate wiring connected to the gate electrode on the second insulating layer, a connection electrode for connecting the source wiring and the semiconductor layer together; and a pixel electrode connected to the semiconductor layer.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: January 21, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai
  • Patent number: 8629440
    Abstract: In view of the problem that a reduced thickness of an EL film causes a short circuit between an anode and a cathode and malfunction of a transistor, the invention provides a display device that has a light emitting element including an electrode and an electroluminescent layer, a wire electrically connected to the electrode of the light emitting element, a transistor provided with an active layer including a source, a drain and a channel forming region, and a power supply line electrically connected to one of the source and the drain of the transistor, wherein the wire is electrically connected to the other of the source and the drain of the transistor, and the width of a part of the electrode in the vicinity of a portion where the electrode is electrically connected to the wire is smaller than that of the electrode in the other portion.
    Type: Grant
    Filed: December 4, 2009
    Date of Patent: January 14, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Patent number: 8586988
    Abstract: [Summary] [Problem] A TFT is manufactured using at least five photomasks in a conventional liquid crystal display device, and therefore the manufacturing cost is high. [Solving Means] By performing the formation of the pixel electrode 127, the source region 123 and the drain region 124 by using three photomasks in three photolithography steps, a liquid crystal display device prepared with a pixel TFT portion, having a reverse stagger type n-channel TFT, and a storage capacitor can be realized.
    Type: Grant
    Filed: June 5, 2012
    Date of Patent: November 19, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hideaki Kuwabara, Yasuyuki Arai
  • Patent number: 8552481
    Abstract: An object of the present invention is to prevent a sensitivity difference between pixels. There are disposed plural unit cells each including plural photodiodes 101A and 101B, plural transfer MOSFETs 102A and 102B arranged corresponding to the plural photodiodes, respectively, and a common MOSFET 104 which amplifies and outputs signals read from the plural photodiodes. Each pair within the unit cell, composed of the photodiode and the transfer MOSFET provided corresponding to the photodiode, has translational symmetry with respect to one another. Within the unit cell, there are included a reset MOSFET and selecting MOSFET.
    Type: Grant
    Filed: November 17, 2009
    Date of Patent: October 8, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroki Hiyama, Masanori Ogura, Seiichiro Sakai
  • Patent number: 8536625
    Abstract: An electronic image sensor includes a semiconductor substrate having a first surface configured for accepting illumination to a pixel array disposed in the substrate. An electrically-doped channel region for each pixel is disposed at a second substrate surface opposite the first substrate surface. The channel regions are for collecting photogenerated charge in the substrate. An electrically-doped channel stop region is at the second substrate surface between each channel region. An electrically-doped shutter buried layer, disposed in the substrate at a depth from the second substrate surface that is greater than that of the pixel channel regions, extends across the pixel array. An electrically-doped photogenerated-charge-extinguishment layer, at the first substrate surface, extends across the pixel array.
    Type: Grant
    Filed: September 9, 2010
    Date of Patent: September 17, 2013
    Assignee: Massachusetts Institute of Technology
    Inventor: Barry E. Burke
  • Patent number: 8507961
    Abstract: A solid-state imaging device has improved operating characteristics including a greater withstand voltage and a decrease in the operational noise for the transistors of the device. The solid-state imaging device includes at least a photoelectric converting portion and a plurality of field effect transistors, preferably a thickness of a gate insulating film for the readout and amplifier transistors are different than gate thicknesses of other transistors.
    Type: Grant
    Filed: March 2, 2006
    Date of Patent: August 13, 2013
    Assignee: Sony Corporation
    Inventors: Noriko Takagi, Hiroyuki Mori
  • Patent number: 8502232
    Abstract: A highly reliable capacitor, a semiconductor device having high operating performance and reliability, and a manufacturing method thereof are provided. A capacitor formed of a first conductive film 102, a dielectric 103 made of an insulating material, and a second conductive film 104 is characterized in that a pin hole 106 formed by chance in the dielectric 103 is filled up with an insulating material (filler) 107 made of a resin material. This can prevent short circuit between the first conductive film 102 and the second conductive film 104. The capacitor is used as a storage capacitor provided in a pixel of a semiconductor device.
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: August 6, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Murakami, Yoshiharu Hirakata, Etsuko Fujimoto, Yu Yamazaki, Shunpei Yamazaki
  • Patent number: 8502389
    Abstract: An integrated circuit structure includes an interconnect structure that includes a plurality of metal layers, wherein the interconnect structure is under a semiconductor substrate. A metal pad is formed in one of the plurality of metal layers. A dielectric pad extends from a bottom surface of the semiconductor substrate up into the semiconductor substrate. An opening extends from a top surface of the semiconductor substrate down to penetrate through the semiconductor substrate and the dielectric pad. An edge of the semiconductor substrate in the opening is vertically aligned to an edge of the dielectric pad in the opening. The opening stops on a top surface of the metal pad. A dielectric spacer is disposed in the opening, wherein the dielectric spacer is formed on the edge of the semiconductor substrate and the edge of the dielectric pad.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: August 6, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Ying Ho, Dun-Nian Yaung, Jen-Cheng Liu, Jeng-Shyan Lin, Wen-De Wang, Shih Pei Chou
  • Patent number: 8487349
    Abstract: The invention describes in detail the structure of a CMOS image sensor pixel that senses color of impinging light without having absorbing filters placed on its surface. The color sensing is accomplished by having a vertical stack of three-charge detection nodes placed in the silicon bulk, which collect electrons depending on the depth of their generation. The small charge detection node capacitance and thus high sensitivity with low noise is achieved by using fully depleted, potential well forming, buried layers instead of undepleted junction electrodes. Two embodiments of contacting the buried layers without substantially increasing the node capacitances are presented.
    Type: Grant
    Filed: April 24, 2009
    Date of Patent: July 16, 2013
    Assignee: Foveon, Inc.
    Inventors: Jaroslav Hynecek, Richard B. Merrill, Russel A. Martin
  • Patent number: 8476627
    Abstract: Provided is an oxide thin-film transistor (TFT) substrate that may enhance the display quality of a display device and a method of fabricating the same via a simple process. The oxide TFT substrate includes: a substrate, a gate line, a data line, an oxide TFT, and a pixel electrode. An oxide layer of the oxide TFT includes a first region that has semiconductor characteristics and a channel, and a second region that is conductive and surrounds the first region. A portion of the first region is electrically connected to the pixel electrode, and the second region is electrically connected to the data line.
    Type: Grant
    Filed: March 11, 2011
    Date of Patent: July 2, 2013
    Inventors: Pil-Sang Yun, Young-Wook Lee, Woo-Geun Lee
  • Patent number: 8466402
    Abstract: An imaging system may include imaging pixels. Each imaging pixel may include floating diffusion metal lines associated with a floating diffusion node in that imaging pixel, pixel output metal lines associated with a pixel output, and additional metal lines. The floating diffusion metal lines node may be at least partially surrounded by the pixel output metal lines. Because the floating diffusion metal lines are at least partially surrounded by the pixel output metal lines, the parasitic capacitance between the floating diffusion metal lines and the additional metal lines may be reduced. A source-follower transistor in each imaging pixel may provide a gain between the floating diffusion metal lines and the pixel output metal lines. Due to the Miller effect, the gain induced by the source-follower transistor may reduce the parasitic capacitance between the floating diffusion metal lines and the pixel output metal lines.
    Type: Grant
    Filed: October 25, 2010
    Date of Patent: June 18, 2013
    Assignee: Aptina Imaging Corporation
    Inventors: Chung Chun Wan, Xiangli Li
  • Patent number: 8415724
    Abstract: A photoelectric conversion apparatus includes a photoelectric conversion unit with a semiconductor region of a first conduction type, an amplifying transistor, and a contact. The contact supplies, via a semiconductor region of a second conduction type arranged along a side surface and a bottom surface of an element isolation region, a reference voltage to the semiconductor region of the second conduction-type arranged below source and drain regions of the amplifying transistor in a region below a gate electrode of the amplifying transistor.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: April 9, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koichiro Iwata, Hidekazu Takahashi
  • Patent number: 8389922
    Abstract: A sensing device is provided. The sensing device includes a sensing pixel array and a memory unit. The sensing pixel array is formed in a substrate and includes a plurality of pixels for sensing light. The substrate has a first side and a second side opposite to the first side and receives the light through the first side for sensing the light. The memory unit is formed on the second side of the substrate for memorization.
    Type: Grant
    Filed: August 4, 2010
    Date of Patent: March 5, 2013
    Assignee: Himax Imaging, Inc.
    Inventors: Ping-Hung Yin, Shuenn-Ren Hsiao
  • Patent number: 8389997
    Abstract: The invention provides a light emitting device which is capable of displaying on both sides, has a small volume, and is capable of being used as a module. A light emitting element represented by an EL element and the like is used in a pixel portion, and two pixel portions are provided in one light emitting device. A first pixel portion has a structure to emit light only from a counter electrode side of the light emitting element. A second pixel portion has a structure to emit light only from a pixel electrode side of the light emitting element. That is, in the first pixel portion and the second pixel portion, directions of light emission are reverse in front and back.
    Type: Grant
    Filed: October 8, 2009
    Date of Patent: March 5, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yu Yamazaki, Aya Anzai, Tomoyuki Iwabuchi
  • Publication number: 20130032918
    Abstract: An image sensor may include a semiconductor substrate, a plurality of light receiving devices formed within the semiconductor substrate, and a plurality of device isolation films for isolating the light receiving devices from each other. When an arrangement direction of a pixel array may be formed by arranging the light receiving devices is a horizontal direction, the pixel array may be formed by alternately arranging a first type light receiving device and a second type light receiving device having different horizontal lengths.
    Type: Application
    Filed: July 12, 2012
    Publication date: February 7, 2013
    Applicant: Dongbu HiTek Co., Ltd.
    Inventor: Hoon JANG
  • Patent number: 8367444
    Abstract: A display substrate includes a gate line, a gate insulation layer, a data line, a switching element, a protection insulation layer, a gate pad portion and a data pad portion. The gate insulation layer is disposed on the gate line. The switching element is connected to the gate line and the data line. The protection insulation layer is disposed on the switching element. The gate pad portion includes a first gate pad electrode which makes contact with an end portion of the gate line through a first hole formed through the gate insulation layer, and a second gate pad electrode which makes contact with the first gate pad electrode through a second hole formed through the protection insulation layer. The data pad portion includes a data pad electrode which makes contact with an end portion of the data line through a third hole formed through the protection insulation layer.
    Type: Grant
    Filed: October 12, 2010
    Date of Patent: February 5, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Young-Min Kim, Bo-Sung Kim, Seon-Pil Jang, Seung-Hwan Cho, Kang-Moon Jo
  • Patent number: 8344389
    Abstract: An optoelectonice device array includes a plurality of packages, each enclosing an optoelectronic device, and positioned in at least one row. Each package overlaps at least one adjacent package, and may be hermetically sealed.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: January 1, 2013
    Assignee: General Electric Company
    Inventors: Donald Seton Farquhar, Michael Scott Herzog
  • Publication number: 20120235272
    Abstract: A range image sensor 1 is provided with a semiconductor substrate 1A having a light incident surface 1BK and a surface 1FT opposite to the light incident surface 1BK, a photogate electrode PG, first and second gate electrodes TX1, TX2, first and second semiconductor regions FD1, FD2, and a third semiconductor region SR1. The photogate electrode PG is provided on the surface 1FT. The first and second gate electrodes TX1, TX2 are provided next to the photogate electrode PG. The first and second semiconductor regions FD1, FD2 accumulate respective charges flowing into regions immediately below the respective gate electrodes TX1, TX2. The third semiconductor region SR1 is located away from the first and second semiconductor regions FD1, FD2 and on the light incident surface 1BK side and has the conductivity type opposite to that of the first and second semiconductor regions FD1, FD2.
    Type: Application
    Filed: June 4, 2012
    Publication date: September 20, 2012
    Inventors: Mitsuhito MASE, Takashi SUZUKI, Tomohiro YAMAZAKI
  • Publication number: 20120238051
    Abstract: The image sensor includes a substrate; a wiring structure formed on a front side of the substrate and including a plurality of wiring layers and a plurality of insulating films; a first well formed within the substrate and having a first conductivity type; and a first metal wiring layer directly contacting a backside of the substrate and configured to apply a first well bias to the first well.
    Type: Application
    Filed: June 4, 2012
    Publication date: September 20, 2012
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Byung Jun PARK
  • Patent number: 8242520
    Abstract: A pixel structure including a pair of first sub-pixels, a pair of second sub-pixels and an electrical tunable photonic crystal layer is provided. The pair of first sub-pixels are substantially identical in area, and the pair of second sub-pixels are substantially identical in area. The area of each second sub-pixel is twice the area of each first sub-pixel. In addition, the electrical tunable photonic crystal layer is disposed over the pair of first sub-pixels and the pair of second sub-pixels.
    Type: Grant
    Filed: May 4, 2011
    Date of Patent: August 14, 2012
    Assignee: Au Optronics Corporation
    Inventors: Syuan-Ling Yang, Ching-Huan Lin
  • Patent number: 8228411
    Abstract: A method of operation of a backside illuminated (BSI) pixel array includes acquiring an image signal with a first photosensitive region of a first pixel within the BSI pixel array. The image signal is generated in response to light incident upon a backside of the first pixel. The image signal acquired by the first photosensitive region is transferred to pixel circuitry of the first pixel disposed on a frontside of the first pixel opposite the backside. The pixel circuitry at least partially overlaps the first photosensitive region of the first pixel and extends over die real estate above a second photosensitive region of a second pixel adjacent to the first pixel such that the second pixel donates die real estate unused by the second pixel to the first pixel to accommodate larger pixel circuitry than would fit within the first pixel.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: July 24, 2012
    Assignee: OmniVision Technologies, Inc.
    Inventors: Tiejun Dai, Hsin-Chih Tai, Sohei Manabe, Hidetoshi Nozaki, Howard E. Rhodes
  • Publication number: 20120181650
    Abstract: A range image sensor 1 is provided with a semiconductor substrate 1A having a light incident surface 1BK and a surface 1FT opposite to the light incident surface 1BK, a photogate electrode PG, first and second gate electrodes TX1, TX2, first and second semiconductor regions FD1, FD2, and a third semiconductor region SR1. The photogate electrode PG is provided on the surface 1FT. The first and second gate electrodes TX1, TX2 are provided next to the photogate electrode PG The first and second semiconductor regions FD1, FD2 accumulate respective charges flowing into regions immediately below the respective gate electrodes TX1, TX2. The third semiconductor region SR1 is located away from the first and second semiconductor regions FD1, FD2 and on the light incident surface 1BK side and has the conductivity type opposite to that of the first and second semiconductor regions FD1, FD2.
    Type: Application
    Filed: November 18, 2010
    Publication date: July 19, 2012
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Mitsuhito Mase, Takashi Suzuki, Tomohiro Yamazaki
  • Patent number: 8198630
    Abstract: A TFT is manufactured using at least five photomasks in a conventional liquid crystal display device, and therefore the manufacturing cost is high. By performing the formation of the pixel electrode, the source region and the drain region by using three photomasks in three photolithography steps, a liquid crystal display device prepared with a pixel TFT portion, having a reverse stagger type n-channel TFT, and a storage capacitor can be realized, FIG. 2.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: June 12, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hideaki Kuwabara, Yasuyuki Arai
  • Patent number: 8198636
    Abstract: A light-emitting device includes a power feeding line to which a predetermined voltage is supplied; a light-emitting element formed of a first electrode, a second electrode, and a light-emitting layer interposed between the first electrode and the second electrode; and a driving transistor that controls the amount of current supplied to the light-emitting element from the power feeding line. The power feeding line includes a portion interposed between the first electrode and the driving transistor.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: June 12, 2012
    Assignee: Seiko Epson Corporation
    Inventors: Takehiko Kubota, Eiji Kanda, Ryoichi Nozawa
  • Patent number: 8193023
    Abstract: A unit pixel of an image sensor having a three-dimensional structure includes a first chip and a second chip which are stacked, one of the first chip and the second chip having a photodiode, and the other of the first chip and the second chip having a circuit for receiving information from the photodiode and outputting received information. The first chip includes a first pad which is projectedly disposed on an upper surface of the first chip in such a way as to define a concavo-convex structure, and the second chip includes a second pad which is depressedly disposed on an upper surface of the second chip in such a way as to define a concavo-convex structure corresponding to the concavo-convex structure of the first chip. The first chip and the second chip are mated with each other through bonding of the first pad and the second pad.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: June 5, 2012
    Assignee: Siliconfile Technologies Inc.
    Inventor: Heui-Gyun Ahn
  • Patent number: 8188479
    Abstract: A pixel electrode structure includes a transparent substrate, a data line, a common line, a first array pixel, and a second array pixel disposed on the transparent substrate. The first/second array pixels respectively include a thin film transistor, a pixel electrode, and a gate line, and the common line is disposed at a lateral side of the gate line. A first via hole and a second via hole are respectively disposed on common line and in contact with an extending portion of the first thin film transistor and an extending portion of the second thin film transistor. A dummy line is disposed at a side of the data line, and a third via hole is disposed both on the dummy line and on the common line. The present invention can not only increase the aperture ratio of the pixel, but have a better stability of the common voltage signal.
    Type: Grant
    Filed: August 26, 2010
    Date of Patent: May 29, 2012
    Assignee: Century Display(Shenzhen)Co., Ltd.
    Inventor: Chih-Chung Liu
  • Publication number: 20120119271
    Abstract: According to one embodiment, a solid-state imaging device includes an imaging region including unit pixels which are two-dimensionally arranged on a semiconductor layer and each of which includes a photoelectric conversion unit and a signal scanning circuit unit. The unit pixel includes a transfer gate provided on the semiconductor layer, a photogate provided on the semiconductor layer, a first semiconductor layer of a first conductivity type, which is provided in the semiconductor layer below the photogate, and a second semiconductor layer of the first conductivity type, which is adjacent to the first semiconductor layer and provided in the semiconductor layer between the transfer gate and the photogate.
    Type: Application
    Filed: September 18, 2011
    Publication date: May 17, 2012
    Inventors: Ai MOCHIZUKI, Takeshi Yoshida
  • Patent number: 8178880
    Abstract: An active matrix display device having a pixel structure in which pixel electrodes, gate wirings and source wirings are suitably arranged in the pixel portions to realize a high numerical aperture without increasing the number of masks or the number of steps. The device comprises a gate electrode and a source wiring on an insulating surface, a first insulating layer on the gate electrode and on the source wiring, a semiconductor layer on the first insulating film, a second insulating layer on the semiconductor film, a gate wiring connected to the gate electrode on the second insulating layer, a connection electrode for connecting the source wiring and the semiconductor layer together, and a pixel electrode connected to the semiconductor layer.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: May 15, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai
  • Patent number: 8164151
    Abstract: The present invention is directed toward a detector structure, detector arrays, and a method of detecting incident radiation. The present invention comprises a photodiode array and method of manufacturing a photodiode array that provides for reduced radiation damage susceptibility, decreased affects of crosstalk, reduced dark current (current leakage) and increased flexibility in application.
    Type: Grant
    Filed: May 7, 2007
    Date of Patent: April 24, 2012
    Assignee: OSI Optoelectronics, Inc.
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Patent number: 8154055
    Abstract: A complementary metal-oxide semiconductor (CMOS) image sensor includes a photodiode formed in a substrate structure, first to fourth gate electrodes formed over the substrate structure, spacers formed on both sidewalls of the first to fourth gate electrodes and filled between the third and fourth gate electrodes, a first ion implantation region formed in a portion of the substrate structure below the spacers filled between the third and fourth gate electrodes, and second ion implantation regions formed in portions of the substrate structure exposed between the spacers, the second ion implantation regions having a higher concentration than the first ion implantation region.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: April 10, 2012
    Assignee: Intellectual Ventures II LLC
    Inventor: Man-Lyun Ha
  • Patent number: 8143685
    Abstract: An image sensor includes a plurality of pixels disposed in an array, each pixel comprising a first region and a second region, the first region and the second region separated from each other in a semiconductor layer, and doped with impurities having different conductivities from each other, a photoelectric conversion region formed between the first and second regions, and at least one metal nanodot that focuses an incident light onto the photoelectric conversion region.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: March 27, 2012
    Assignee: Samsung Electronics CP., Ltd.
    Inventors: Dae-kil Cha, Young-gu Jin, Bok-ki Min, Yoon-dong Park
  • Patent number: 8120032
    Abstract: A fabrication method of an active device array substrate is disclosed. A first metal material layer, a gate insulation material layer, a channel material layer, a second metal material layer, and a first photoresist layer are formed over a substrate sequentially. The first photoresist layer is patterned with a multi-tone mask to form a first patterned photoresist layer with two thicknesses. A first and second removing processes are performed sequentially using the first patterned photoresist layer as a mask to form a gate, a gate insulation layer, a channel layer, and a source/drain. The first patterned photoresist layer is removed. A passivation layer and a second patterned photoresist layer are formed over the substrate. A third removing process is performed to form a plurality of contact holes. A pixel electrode material layer is formed over the substrate. The second patterned photoresist layer is lifted off to form a pixel electrode.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: February 21, 2012
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Shih-Chin Chen, Wen-Chuan Wang
  • Patent number: 8110885
    Abstract: Provided is a MOS type solid state imaging device, including a semiconductor substrate, a plurality of pixels arranged on the semiconductor substrate, each pixel having a light receiving element for generating a signal charge due to incident light, and a MOS transistor for reading the signal charge, and a hydrogen supply film arranged on the semiconductor substrate over the plurality of pixels and having a region corresponding to the light receiving element at least a part of which has a film thickness greater than the other part of the region.
    Type: Grant
    Filed: September 1, 2005
    Date of Patent: February 7, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Satoko Iida, Takanori Watanabe
  • Patent number: 8106342
    Abstract: A solid-state image capturing device includes a multilayer wiring layer to open regions above a plurality of respective light receiving sections for performing photoelectric conversion on incident light to generate a signal charge; a color filter of each color provided above the multilayer wiring layer in a corresponding manner to each light receiving section; and a microlens provided on the color filter of each color, for focusing the incident light at each light receiving section, wherein a wiring layer within one layer among the multilayer wiring layer limits an area of a light receiving region for incident light that enters the light receiving section, equally among the light receiving sections.
    Type: Grant
    Filed: September 3, 2008
    Date of Patent: January 31, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Tomohiko Kawamura
  • Patent number: 8071980
    Abstract: A radiation detector that includes a charge conversion layer, a substrate, an electrode layer, an intermediary layer and wiring is provided. The substrate includes a lower electrode portion that collects charge generated by the charge conversion layer. The electrode layer includes an upper electrode portion and an extended electrode portion. The upper electrode portion is laminated on the charge conversion layer. The extended electrode portion extends from the upper electrode portion down a side face of the charge conversion layer to a region on the substrate at which the charge conversion layer is not present. The intermediary layer is formed from between the charge conversion layer and the upper electrode portion to between the extended electrode portion and the substrate. The wiring is electrically connected with the extended electrode portion at the region on the substrate at which the charge conversion layer is not present.
    Type: Grant
    Filed: January 30, 2008
    Date of Patent: December 6, 2011
    Assignee: FUJIFILM Corporation
    Inventor: Nobuyuki Iwazaki
  • Patent number: 8059077
    Abstract: A display device which can ensure the correction of a black spot, for example, in forming an opening portion in a portion of a scanning signal line where the scanning signal line intersects a video signal line and forming a semiconductor layer and a conductor layer by a resist reflow method is provided. A conductor layer includes a video signal line, a drain electrode, a source electrode, and a connecting line. A semiconductor layer is formed so as to cover at least a region of the insulation film which is larger than a region where the video signal line and the connecting line are formed. The connecting line is connected with the video signal line over an opening portion which is formed in the scanning signal line. A cutout portion, a projecting portion or an enlarged-width portion is formed on the video signal line and/or the connecting line in a region which corresponds to the opening portion or in the vicinity of the region.
    Type: Grant
    Filed: April 24, 2009
    Date of Patent: November 15, 2011
    Assignee: Panasonic Liquid Crystal Display Co., Ltd.
    Inventor: Junichi Uehara
  • Patent number: 8053800
    Abstract: A reflection-type photointerrupter of the present invention includes a substrate, a light emitting element and a light receiving element. The substrate includes a first surface, a second surface opposite the first surface, and a first and a second recesses that are open in the first surface side. The light emitting element is arranged in the first recess, while the light receiving element is arranged in the second recess. The light emitting element is capable of emitting light. The light receiving element is capable of receiving the light emitted from the light emitting element and reflected by an object to be detected.
    Type: Grant
    Filed: November 3, 2009
    Date of Patent: November 8, 2011
    Assignee: Rohm Co., Ltd.
    Inventor: Tomoharu Horio
  • Patent number: 8044478
    Abstract: Provided is an image sensor. The image sensor can include a readout circuitry on a first substrate. An interlayer dielectric is formed on the first substrate, and comprises a lower line therein. A crystalline semiconductor layer is bonded to the interlayer dielectric. A photodiode can be formed in the crystalline semiconductor layer, and comprises a first impurity region and a second impurity region. A via hole can be formed passing through the crystalline semiconductor layer and the interlayer dielectric to expose the lower line. A plug is formed inside the first via hole to connect with only the lower line and the first impurity region. A device isolation region can be formed in the crystalline semiconductor layer to separate the photodiode according to unit pixel.
    Type: Grant
    Filed: September 5, 2008
    Date of Patent: October 25, 2011
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Joon Hwang
  • Patent number: 8030653
    Abstract: Embodiments relate to an image sensor that may include transistors, a first dielectric, a crystalline semiconductor layer on and/or over the first dielectric, a photodiode, a dummy region, via contacts, and a second dielectric. A photodiode may be formed by implanting impurity ions into a crystalline semiconductor layer to correspond the pixel region. A dummy region may be formed in the crystalline semiconductor layer excepting a region for the photodiode. Via contacts may penetrate the dummy region, and may be connected to the first metal interconnections. A second dielectric may include a plurality of second metal interconnections on and/or over the crystalline semiconductor layer. The plurality of second metal interconnections may electrically connect the via contacts to the photodiode.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: October 4, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Hag-Dong Kim
  • Patent number: 8013369
    Abstract: A photoelectric conversion apparatus includes a photoelectric conversion unit with a semiconductor region of a first conduction type, an amplifying transistor, and a contact. The contact supplies, via a semiconductor region of a second conduction type arranged along a side surface and a bottom surface of an element isolation region, a reference voltage to the semiconductor region of the second conduction-type arranged below source and drain regions of the amplifying transistor in a region below a gate electrode of the amplifying transistor.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: September 6, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koichiro Iwata, Hidekazu Takahashi
  • Patent number: 8003424
    Abstract: A CMOS image sensor includes a photosensitive device, a floating diffusion region, a transfer transistor, and a pocket photodiode formed in a semiconductor substrate of a first conductivity type. The floating diffusion region is of a second conductivity type. The transfer transistor has a channel region disposed between the photosensitive device and the floating diffusion region. The pocket photodiode is of the second conductivity type and is formed under a first portion of a bottom surface of the channel region such that a second portion of the bottom surface of the channel region abuts the semiconductor substrate.
    Type: Grant
    Filed: November 13, 2007
    Date of Patent: August 23, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyung-Ho Lee, Yi-Tae Kim, Jung-Chak Ahn, Sae-Young Kim
  • Patent number: RE42670
    Abstract: A thin film transistor substrate for a liquid crystal display includes an insulating substrate, and a gate line assembly formed on the substrate. The gate line assembly has a double-layered structure with a lower layer exhibiting good contact characteristics with respect to indium tin oxide, and an upper layer exhibiting low resistance characteristics. A gate insulating layer, a semiconductor layer, a contact layer, and first and second data line layers are sequentially deposited onto the substrate with the gate line assembly. The first and second data line layers are patterned to form a data line assembly, and the contact layer is etched through the pattern of the data line assembly such that the contact layer has the same pattern as the data line assembly. A passivation layer is deposited onto the data line assembly, and a photoresist pattern is formed on the passivation layer by using a mask of different light transmissties mainly at a display area and a peripheral area.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: September 6, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woon-Yong Park, Jong-Soo Yoon, Chang-Oh Jeong
  • Patent number: RE44482
    Abstract: A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flight A CMOS active pixel image sensor includes a plurality of pinned photodiode photodetectors that use a common output transistor. In one configuration, the charge from two or more pinned photodiodes may be binned together and applied to the gate of an output transistor.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: September 10, 2013
    Assignee: Round Rock Research, LLC
    Inventors: Vladimir Berezin, Alexander I. Krymski, Eric R. Fossum