Abstract: Disclosed are a CMOS image sensor and a manufacturing method thereof.

Abstract: An image sensor according to an example embodiment may include a plurality of photoelectric transformation active regions, a plurality of read active regions, and/or at least one read gate. The plurality of photoelectric transformation active regions may be formed on a substrate. Each read active region may be formed adjacent to one of the plurality of photoelectric transformation active regions. Each read gate may be formed on one of the read active regions and partially overlap at least one of the adjacent photoelectric transformation active regions. Each read gate may be electrically isolated from the overlapping portion of the photoelectric transformation active region.

Abstract: A duty correction circuit includes: a C-element including a first input and a second input; and an inverter connected to the second input of the C-element, wherein the C-element obtains an output of a logic “1” when both inputs are the logic “1”, obtains an output of a logic “0” when both inputs are the logic “0”, and maintains the output to a previous state in other conditions, and complementary clocks having a phase difference of an approximately half cycle are inputted to the first input of the C-element and the inverter respectively.

Abstract: A semiconductor device and method of making comprises providing an active device region and an isolation region, the isolation region forming a boundary with the active device region. A patterned gate material overlies the active device region between first and second portions of the boundary. The patterned gate material defines a channel within the active device region, the gate material having a gate length dimension perpendicular to a centerline along a principal dimension of the gate material which is larger proximate the first and second portions of the boundary than in-between the first and second portions of the boundary. The channel includes a first end proximate the first portion of the boundary and a second end proximate the second portion of the boundary, further being characterized by gate length dimension tapering on both ends of the channel.

Abstract: An image sensor with a plurality of photodiode pixels supported by a substrate. At least one of the photodiode pixels includes a reflective element that prevents light from traveling onto an adjacent photodiode pixel. The reflective element may be a floating contact on a dielectric barrier that insulates the contact from a substrate. The reflective element may be a via that may or may not be an essential part of an electrical connection between two or more integrated devices. The reflective element may be elongated in a horizontal section parallel to the substrate to maximize the reflective surface area and thus longer than standard vias and contacts. The reflective element may be non-rectilinear. The via may be directly above but insulated from a conductor by a dielectric layer thinner than an inter-metal dielectric (IMD) thickness between interconnect layers, and may straddle one or more conductors.

Abstract: A display device includes a main body, a support stand, and a display portion. The display portion includes a pixel having a TFT and a capacitor. The capacitor includes a capacitor electrode on an insulating surface, an insulating film on the capacitor electrode, and a pixel electrode of the TFT on the insulating film.

Abstract: A method of providing metal extension in a backside illuminated image sensor is provided in the present disclosure. In one embodiment, a first set of pads and a second set of pads, and a metal layer are provided in a backside illuminated image sensor. The first set of pads are electrically coupled to the second set of pads through the metal layer, and a pad in the second set of pads is exposed to the surface of the backside illuminated image sensor for testing. In an alternative embodiment, a first set of pads, at least one second pad directly positioned over the first set of pads are provided in a backside illuminated image sensor. The first set of pads are electrically coupled to the at least one second pad and the at least one second pad is exposed to the surface of the backside illuminated image sensor for testing.

Abstract: The disclosed embodiments employ shared pixel component architectures that arrange the shared pixel components for a group of pixels within different pixels of the group.

Abstract: The present invention provides providing a substrate, forming a sensor array on the substrate, forming a structured array of uncommitted logic surrounding the sensor array on the substrate, and providing electrical interconnects to the structured array of uncommitted logic, wherein the structured array of uncommitted logic forms functions that support the operation of the sensor array.

Abstract: A thin film transistor array panel is provided, which includes: a gate line, a gate insulating layer, and a semiconductor layer sequentially formed on a substrate; a data line and a drain electrode formed at least on the semiconductor layer; a first passivation layer formed on the data line and the drain electrode and having a first contact hole exposing the drain electrode at least in part; a second passivation layer formed on the first passivation layer and having a second contact hole that is disposed on the first contact hole and has a first bottom edge placed outside the first contact hole and a second bottom edge placed inside the first contact hole; and a pixel electrode formed on the second passivation layer and connected to the drain electrode through the first and the second contact holes.

Abstract: A pixel structure is disclosed. The pixel structure includes a substrate, a first data line having at least one end formed on the substrate, a first insulation layer overlying the first data line and exposing a part of the end of the first data line, a shielding electrode disposed on the first insulation layer and overlapped with the first data line, a second data line formed on the first insulation layer and electrically connected to the exposed end of the first data line, a second insulation layer overlying the shielding electrode and the second data line, and a pixel electrode formed on the second insulation layer and overlapped with the shielding electrode. The invention also provides a method for fabricating the pixel structure.

Abstract: The invention provides an LCD panel with main slits corresponding to alignment protrusions. The gate lines are shielded by the electrode portion and do not overlap the main slits. Because the gate line and the major slits do not overlap, the liquid crystal molecule arrangement of the liquid crystal layer is not affected by the operating voltage of the gate line.

Abstract: A display device includes a first pixel and a second pixel. The first pixel and the second pixel are defined by a first gate bus line, a second gate bus line, a first power supply line and a second power supply line. A data bus line between the first supply line and the second supply line divides the first pixel from the second pixel line. Accordingly, the pixel shares a data bus line or a power supply line with adjacent pixel. Advantageously, thereby, more space between lines prevents defects caused during fabricating the display device and improve a reliability of the display device.

Abstract: A solid-state imaging device includes a first wiring layer, a second wiring layer, a substrate contact, and a first contact. The arrangement of the substrate contact with respect to a light-receiving section forming a peripheral pixel is shifted, or not shifted, from the arrangement of the substrate contact with respect to a light-receiving section forming a central pixel, by a shift amount r from the peripheral portion toward the central portion. The arrangement of the first contact with respect to the light-receiving section of the peripheral pixel is shifted from the arrangement of the first contact with respect to the light-receiving section of the central pixel, by a shift amount s1 from the peripheral portion toward the central portion. The shift amount s1 is greater than the shift amount r.

Abstract: A means of forming unevenness for preventing specular reflection of a pixel electrode, without increasing the number of process steps, is provided. In a method of manufacturing a reflecting type liquid crystal display device, the formation of unevenness (having a radius of curvature r in a convex portion) in the surface of a pixel electrode is performed by the same photomask as that used for forming a channel etch type TFT, in which the convex portion is formed in order to provide unevenness to the surface of the pixel electrode and give light scattering characteristics.

Abstract: In a lower substrate, a display apparatus having the lower substrate and a method of manufacturing the lower substrate, the lower substrate includes a pixel area and a circuit area. An image is displayed in the pixel area. A first signal electrode is disposed in a circuit area. A first insulating layer includes an opening, through which the first signal electrode is exposed. A second signal electrode is disposed on the first insulating layer in the circuit area, and spaced apart from the first signal electrode. A second insulating layer is disposed on the first insulating layer, and includes a contact hole, through which the first and second signal electrodes are exposed. A conductive layer electrically connects the first signal electrode to the second signal electrode. Therefore, a manufacturing process is simplified so that a yield of the lower substrate is increased.

Abstract: A thin film transistor substrate includes a color filter layer and a gate line. The color filter layer has a reverse taper shape, which is used to pattern the gate line without a separate mask. Thus, the total number of masks used to manufacture the thin film transistor substrate can be reduced, thereby reducing the manufacturing cost and improving the productivity.

Abstract: A complementary metal-oxide semiconductor (CMOS) active pixel sensor includes a photodiode, a transfer transistor with a coupled gate, a reset transistor and a signal transfer circuit, where the photodiode generates electric charges in response to incident light, the transfer transistor transfers the electric charges integrated in the photodiode to a floating diffusion node, wherein the transfer transistor has a first transfer gate and a second transfer gate, and the first and second transfer gates have a coupled gate structure, the reset transistor resets a potential level of the floating diffusion node by a given voltage level, the signal transfer circuit transfers the potential level of the floating diffusion node to an internal circuit in response to a selection signal, and the CMOS active pixel sensor with the coupled gate may increase a capacity of the photodiode and reduce an image lag by using a voltage coupling effect of the coupled gate.

Abstract: The present invention provides a display comprising a panel having a display region for displaying an image and a peripheral region defined therein, a plurality of thin film transistors (TFTs) formed in the display region, p-type and n-type TFTs formed in the peripheral region, and at least one photo diode formed in a horizontal structure in the display or peripheral region; and a method of manufacturing the display. According to the present invention, n-type and p-type TFTs and a photo diode can be together formed without an additional process when forming the TFTs using a polycrystalline silicon thin film, and various peripheral circuits can be configured using such elements.

Abstract: A thin film transistor array panel and a method of its manufacture are presented. The thin film transistor array panel according to an embodiment includes a substrate, a gate line extending in a first direction on the substrate, a data line extending in a second direction on the substrate and intersecting and insulated from the gate line, a thin film transistor including a control terminal connected to the gate line, an input terminal connected to the data line and an output terminal, a color filter formed on the thin film transistor, a light blocking member formed on the thin film transistor, defining the space for storing the color filter, and including a first protection portion surrounding at least the region of the output terminal of the thin film transistor, and a pixel electrode formed on the light blocking member and the color filter and contacting the region of the output terminal surrounded by the first protection portion of the light blocking member.

Abstract: An array substrate includes a substrate, a gate line on the substrate, a data line crossing the gate line to define a pixel region, a thin film transistor connected to the gate and data lines, a pixel electrode in the pixel region, and a common electrode including first, second, third, fourth and fifth portions, wherein the first and second portions are disposed at both sides of the data line, each of the third and fourth portions is connected to the first and second portions, and the fifth portion is connected to the second portion and is extended into a next pixel region adjacent to the pixel region.

Abstract: A Silicon photodetector contains an insulating substrate having a top surface and a bottom surface. A Silicon layer is located on the top surface of the insulating substrate, where the Silicon layer contains a center region, the center region being larger in thickness than the rest of the Silicon layer. A top Silicon dioxide layer is located on a top surface of the center region. A left wing of the center region and a right wing of the center region are doped. The Silicon photodetector also has an active region located within the center region, where the active region contains a tailored crystal defect-impurity combination and Oxygen atoms.

Abstract: An integrated circuit includes at least one photodiode associated with a read transistor. The photodiode is formed from a stack of three semiconductor layers comprising a buried layer, an floating substrate layer and an upper layer. The drain region and/or the source region of the transistor are incorporated within the upper layer. The buried layer is electrically isolated from the upper layer so as to allow the buried layer to be biased independently of the upper layer.

Abstract: A light-emitting device includes a power feeding line to which a predetermined voltage is supplied; a light-emitting element formed of a first electrode, a second electrode, and a light-emitting layer interposed between the first electrode and the second electrode; and a driving transistor that controls the amount of current supplied to the light-emitting element from the power feeding line. The power feeding line includes a portion interposed between the first electrode and the driving transistor.

Abstract: An image pickup device, wherein a part of the carriers overflowing from the photoelectric conversion unit for a period of photoelectrically generating and accumulating the carriers may be flowed into the floating diffusion region, and a pixel signal generating unit generating a pixel signal according to the carriers stored in the photoelectric conversion unit and the carriers having overflowed into the floating diffusion region, is provided. The expansion of a dynamic range and the improvement of an image quality can be provided by controlling a ratio of the carriers flowing into the floating diffusion region to the carriers overflowing from such a photoelectric conversion unit at high accuracy.

Abstract: An array substrate for a liquid crystal display device includes a substrate, a gate line over the substrate, a data line crossing the gate line to define a pixel region and including a transparent conductive layer and an opaque conductive layer, a data pad at one end of the data line and including a transparent conductive layer, a thin film transistor connected to the gate line and the data line and including a gate electrode, an active layer, an ohmic contact layer, a buffer metallic layer, a source electrode and a drain electrode, and a pixel electrode in the pixel region and connected to the thin film transistor, the pixel electrode including a transparent conductive layer.

Abstract: Provided is a method for fabricating an image sensor device that includes providing a substrate having a front side and a back side; patterning a photoresist on the front side of the substrate to define an opening having a first width, the photoresist having a first thickness correlated to the first width; performing an implantation process through the opening using an implantation energy correlated to the first thickness thereby forming a first doped isolation feature; forming a light sensing feature adjacent to the first doped isolation feature, the light sensing feature having a second width; and thinning the substrate from the back side so that the substrate has a second thickness that does not exceed twice a depth of the first doped isolation feature. A pixel size is substantially equal to the first and second widths.

Abstract: A CMOS image sensor and method for fabricating the same, wherein the CMOS image sensor has minimized dark current at the boundary area between a photodiode and an isolation layer. The present invention includes a first-conductivity-type doping area formed in the device isolation area of the substrate, the first-conductivity-type doping area surrounding the isolation area and a dielectric layer formed between the isolation layer and the first-conductivity-type doping area, wherein the first-conductivity-type doping area and the dielectric layer are located between the isolation layer and a second-conductivity-type diffusion area.

Abstract: A pixel and imager device, and method of forming the same, where the pixel has a transfer transistor gate associated with a photoconversion device and is isolated in a substrate by shallow trench isolation. The transfer transistor gate does not overlap the shallow trench isolation region.

Abstract: The present invention provides a display device which can obviate the occurrence of a leak current in a thin film transistor. In a display device including a substrate, and gate signal lines, an insulation film, semiconductor layers and conductor layers which are sequentially stacked on the substrate, the conductor layer forms at least a drain electrode which is connected to a drain signal line and a source electrode which is connected to a pixel electrode, and the semiconductor layer is formed in a pattern in which the semiconductor layer has a protruding portion which protrudes outwardly from the conductor layer at a portion thereof except for a distal end of the drain electrode as viewed in a plan view.

Abstract: An E-ink display and method for repairing the same is provided. The method is for repairing a thin film transistor array substrate of the E-ink display. The thin film transistor array substrate having a plurality of pixel units is provided initially. Each of the pixel unit includes a thin film transistor and a pixel electrode. The thin film transistor has a gate electrode, a source electrode and a drain electrode. The gate electrode, the source electrode and the drain electrode are connected electrically to a scan line, a data line and the pixel electrode respectively. A portion of the pixel electrode is located above the data line. Next, a repairing portion is formed at the space between the data line and the pixel electrode. The repairing portion is utilized to electrically connect the pixel electrode and the data line.

Abstract: An image sensor includes a semiconductor substrate including a pixel region and a peripheral circuit region; interlayer insulating films including metal wires arranged on the pixel region and the peripheral circuit region; and a photodiode and an upper electrode disposed on the interlayer insulating film of the pixel region. Further, the image sensor includes a protective layer disposed on the semiconductor substrate including the upper electrode and the interlayer insulating film of the peripheral circuit region and having a sloping portion in a region corresponding to the sidewall of the photodiode; via holes disposed on the protective layer so as to selectively expose the upper electrode and the metal wires of the peripheral circuit region; and upper wiring disposed on the protective layer including the via holes.

Abstract: A method and apparatus for reducing cross-talk between pixels in a semiconductor based image sensor. The apparatus includes neighboring pixels separated by a homojunction barrier to reduce cross-talk, or the diffusion of electrons from one pixel to another. The homojunction barrier being deep enough in relation to the other pixel structures to ensure that cross-pixel electron diffusion is minimized.

Abstract: Imaging devices utilizing sub-wavelength gratings to separate the spectral components of the natural white light are disclosed. This disclosed method and apparatus redirects the light to be collected onto separate photosensors for different wavelengths to provide improved quantum efficiency.

Abstract: The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a sensor element disposed in a semiconductor substrate; an inter-level dielectric (ILD) disposed on the semiconductor substrate; and a trench disposed in the ILD, overlying and enclosing the sensor element, and filled with a first dielectric material.

Abstract: A pixel cell array architecture having ion implant regions as isolation regions between adjacent active areas of pixels in the array. In one exemplary embodiment, the invention provides an ion-doped p-well region separating n-type photosensitive areas of neighboring pixel cells. The pixel cells have increased fill factor without encountering the disadvantages associated with conventional shallow trench isolation regions.

Abstract: A liquid crystal display includes first pixels and second pixels, a plurality of gate lines to transmit gate signals, and a plurality of pairs of first and second data lines crossing the gate lines, the pairs of first data lines and second data lines facing each other with a pixel interposed there between. Each of the first pixels and the second pixels includes pixel electrode and each pixel electrode includes a first sub-pixel electrode and a second sub-pixel electrode. A first drain is electrode disposed on the right of the first data line, and a second drain electrode is disposed on the left of the second data line. The first drain electrode is connected to the first sub-pixel electrode while the second drain electrode is connected to the second sub-pixel electrode in the first pixels, and the first drain electrode is connected to the second sub-pixel electrode while the second drain electrode is connected to the first sub-pixel electrode in the second pixels.

Abstract: A CMOS image sensor array and method of fabrication. The CMOS imager sensor array comprises a substrate; an array of light receiving pixel structures formed above the substrate, the array having formed therein “m” levels of conductive structures, each level formed in a corresponding interlevel dielectric material layer; a dense logic wiring region formed adjacent to the array of light receiving pixel structures having “n” levels of conductive structures, each level formed in a corresponding interlevel dielectric material layer, where n>m. A microlens array having microlenses and color filters formed above the interlevel dielectric material layer, a microlens and respective color filter in alignment with a respective light receiving structure formed at a surface of the substrate. A top surface of the interlevel dielectric material layer beneath the microlens array is recessed from a top surface of the interlevel dielectric material layers of the dense logic wiring region.

Abstract: The invention provides an LCD panel with main slits corresponding to alignment protrusions. The gate lines are shielded by the electrode portion and do not overlap the main slits. Because the gate line and the major slits do not overlap, the liquid crystal molecule arrangement of the liquid crystal layer is not affected by the operating voltage of the gate line.

Abstract: An array substrate for a liquid crystal display device comprises a gate line on a substrate having a pixel region; a gate insulating layer on the gate line; a data line crossing the gate line to define the pixel region and formed on the gate insulating layer; a thin film transistor in the pixel region and connected to the gate line and the data line; a passivation layer on the thin film transistor and the data line and having a groove extending along boundary portion of the pixel region and exposing the gate insulating layer; and a pixel electrode in the pixel region and connected to the thin film transistor.

Abstract: An image sensor and fabricating method thereof are disclosed by which damage to a protective layer can be prevented in a manner of reducing thermal stress of an uppermost metal line in performing thermal treatment for enhancing the dark characteristic. Such damage can be prevented by forming a poly layer pattern in an insulating interlayer on at least one side of the uppermost layer metal line.

Abstract: Provided is a method of fabricating a semiconductive oxide thin-film transistor (TFT) substrate. The method includes forming gate wiring on an insulation substrate; and forming a structure in which a semiconductive oxide film pattern and data wiring are stacked on the gate wiring, wherein the semiconductive oxide film pattern is selectively patterned to have channel regions of first thickness and source/drain regions of greater second thickness and where image data is coupled to the source regions by data wiring formed on the source regions. According to a 4-mask embodiment, the data wiring and semiconductive oxide film pattern are defined by a shared etch mask.

Abstract: Provided are a poly crystalline silicon semiconductor device and a method of fabricating the same. Portions of a silicon layer except for gates are removed to reduce a parasitic capacitance caused from the silicon layer existing on gate bus lines. The silicon layer exists under the gates only, thus the parasitic capacitance is reduced and the deterioration and the delay of signals are prevented. Accordingly, the poly crystalline silicon semiconductor device, such as a thin film transistor, has excellent electric characteristics.

Abstract: An electro-optical device provided with a plurality of pixel sections, includes: a first substrate having a plurality of light-emitting elements to configure the plurality of pixel sections; a second substrate having a driving circuit to control light emission of the plurality of light-emitting elements, respectively, and disposed so as to face an element forming surface of the first substrate; and a plurality of conductive connectors provided between the first substrate and the second substrate, and electrically connect the plurality of light-emitting elements, respectively, to the driving circuit. The plurality of conductive connectors are disposed in a staggered manner at least along a first arrangement direction of the plurality of pixel sections.

Abstract: A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed.

Abstract: A method for manufacturing a liquid crystal display, the method includes steps of depositing a transparent conductive layer, forming a pixel electrode, and four bottom layers, depositing a semiconductor insulation layer on the pixel electrode and the four bottom layers, defining the semiconductor insulation layer to form two contact openings two of the bottom layers, depositing and defining two top layers and two scanning lines both with an indentation at an edge thereof, and the indentations face the first pixel electrode by an opposite direction, and forming four metal-insulation-metal (MIM) diodes.

Abstract: In a semiconductor device and a method of manufacturing the semiconductor device, the source wires 126 of a pixel portion 205 are formed of material having low resistance (representatively, aluminum, silver, copper). The source wires of a driving circuit are formed in the same process as the gate wires 162 of the pixel portion and a pixel electrode 163.

Abstract: A CMOS image sensor with an effectively increased aperture ratio and moreover with improved optical sensitivity, and a method of manufacture of such a CMOS image sensor is provided a first aspect of the invention is an image sensor, has a pixel region 10 in which are formed a plurality of pixels each having at least a photodiode, a reset transistor, and a source-follower transistor; and a peripheral circuit region 12 in which are formed peripheral circuits which process read-out signals read out from the pixel region, a well region PW2 in the pixel region PW1 is formed to be more shallow than a well region in the peripheral circuit region. Also, reset transistors or source-follower transistors are formed in the shallow well region PW2 of the pixel region 10, and a photodiode region PHD2 is embedded below the transistor well region PW2.

Abstract: A semiconductor device of the present invention has a first conductive layer, a second conductive layer, an insulating layer which is formed between the first conductive layer and the second conductive layer and which has a contact hole, and a third conductive layer which is connected to the first conductive layer and the second conductive layer and of which at least a part of an end portion is formed inside the contact hole. Near a contact hole where the second conductive layer is connected to the third conductive layer, the third conductive layer does not overlap with the second conductive layer with the first insulating layer interposed therebetween and an end portion of the third conductive layer is not formed over the first insulating layer. This allows suppression of depression and projection of the third conductive layer.

Abstract: A method for manufacturing a solid state imaging device includes steps of forming a photodiode layer buried in a semiconductor substrate by ion injection and of forming a shielding layer buried in the photodiode layer by ion injection. At least in the ion injection process in the step of forming the shielding layer, an ion injection pause period is provided at least one time during whole ion injection step. According to the method, crystal defects are prevented from generating even if ion injection is performed with high energy, thereby suppressing dark current without complexity in manufacturing process.