Abstract: A solid state imaging device comprises: a photoelectric converting portion provided on a semiconductor substrate; a charge transfer path, formed in an adjacent position to the photoelectric converting portion, that receives a signal charge generated in the photoelectric converting portion and transfers the signal charge in a predetermined direction; and a gate electrode that transfers the signal charge from the photoelectric converting portion to the charge transfer path, wherein the gate electrode comprises polysilicon having a different conductive type from that of a semiconductor region forming a charge storing portion of the charge transfer path.

Abstract: A fabricating method of a TFT includes first forming a source on a substrate. Then, a first insulation pattern layer is formed to cover parts of the source and the substrate. The first insulation pattern layer has an opening exposing a part of the source. Thereafter, a gate pattern layer is formed on the first insulation pattern layer. Then, the gate pattern layer and a second insulation pattern layer formed thereon surround the opening. Moreover, a second lateral protection wall is formed on an edge of the gate pattern layer in the opening. Afterwards, a channel layer is formed in the opening and covers the second lateral protection wall and the source. Then, a passivation layer with a contact window is formed on the channel layer and the second insulation pattern layer to expose a portion of the channel layer. Thereafter, a drain is formed on the exposed channel layer.

Abstract: According to the present invention, which is a display device in which a light-emitting element where an organic substance generating luminescence referred to as electroluminescence or a medium including a mixture of an organic substance and an inorganic substance is sandwiched between electrodes is connected to a TFT, the invention is to manufacture a display panel by forming at least one or more of a conductive layer which forms a wiring or an electrode and a pattern necessary for manufacturing a display panel such as a mask layer for forming a predetermined pattern is formed by a method capable of selectively forming a pattern. A droplet discharge method capable of forming a predetermined pattern by selectively discharging a droplet of a composition in accordance with a particular object and by forming a conductive layer or an insulating layer is used as a method capable of selectively forming a pattern.

Abstract: A display device includes a main body, a support stand, and a display portion. The display portion includes a pixel having a TFT and a capacitor. The capacitor includes a capacitor electrode on an insulating surface, an insulating film on the capacitor electrode, and a pixel electrode of the TFT on the insulating film.

Abstract: Methods of forming thin-film transistor display devices including forming a gate line and a gate electrode on a face of a substrate and forming a semiconductor layer that is insulated from the gate line. A data line and a source/drain electrode are formed on the semiconductor layer. The data line and the source/drain electrode are formed as composites of at least two different metal conductive layers. A transparent pixel electrode is formed that is electrically coupled to the drain electrode.

Abstract: An array substrate includes a substrate, a data line formed on the substrate, a passivation layer formed on the data line, a gate line including a gate electrode and a capacitor line formed on the passivation layer, a gate insulation layer formed on the gate electrode and the capacitor line, a semiconductor layer formed on the gate insulation layer, a contact hole formed through the passivation layer and the gate insulation layer to expose the data line and a source electrode and a drain electrode formed on the semiconductor layer. The capacitor electrode is overlapped with the data line. The source electrode is connected to the data line through the contact hole and the source electrode and the drain electrode include a transparent conductive material.

Abstract: A silicide layer (first silicide layer, second silicide layer) is laminated on top laminate surfaces of gates of a transmission transistor and a reset transistor, respectively. Each of the first silicide layer and the second silicide layer respectively formed on each of the gates extends in a direction along the main surface of the semiconductor substrate among at least a portion of a plurality of image pixels, connecting gates with one another among the respective image pixels. On the other hand, a signal outputter is not in contact with any silicide layers, has the top laminate surface that is covered with an insulating layer, and is connected with other transistors via a metal wiring layer.

Abstract: A pixel with a photosensor and a transfer transistor having a split transfer gate. A first section of the transfer gate is connectable to a first voltage source while a second section of the transfer gate is connectable to a second voltage source. Thus, during a charge integration period of a photosensor, the two sections of the transfer gate may be oppositely biased to decrease dark current while controlling blooming of electrons within and out of the pixel cell. During charge transfer the two gate sections may be commonly connected to a positive voltage sufficient to transfer charge from the photosensor to a floating diffusion region.

Abstract: A semiconductor structure and method wherein a recess is disposed in a surface portion of a semiconductor structure and a dielectric film is disposed on and in contract with the semiconductor. The dielectric film has an aperture therein. Portions of the dielectric film are disposed adjacent to the aperture and overhang underlying portions of the recess. An electric contact has first portions thereof disposed on said adjacent portions of the dielectric film, second portions disposed on said underlying portions of the recess, with portions of the dielectric film being disposed between said first portion of the electric contact and the second portions of the electric contact, and third portions of the electric contact being disposed on and in contact with a bottom portion of the recess in the semiconductor structure. The electric contact is formed by atomic layer deposition of an electrically conductive material over the dielectric film and through the aperture in such dielectric film.

Abstract: An LCD panel includes a plurality of gate lines and gate electrodes formed on a substrate and a gate insulating film formed on the substrate including the gate lines and the gate electrodes. A semiconductor film is formed in a region on the gate insulating film and an ohmic contact film formed on the semiconductor film. A plurality of data lines cross the gate lines; a source electrode is formed on the ohmic contact film; and a pixel electrode is formed in a pixel region defined by the gate and data lines. A drain electrode is formed on the ohmic contact film, and has an uneven width. Since a portion of drain electrode that overlaps with the gate electrode has a smaller width than a width of other portions of the drain electrode, variation in an area of the drain electrode overlapped with the gate electrode is small, so that variation of the parasitic capacitance can be reduced, thereby improving picture quality.

Abstract: An E-ink display and method for repairing the same is provided. The method is for repairing a thin film transistor array substrate of the E-ink display. The thin film transistor array substrate having a plurality of pixel units is provided initially. Each of the pixel unit includes a thin film transistor and a pixel electrode. The thin film transistor has a gate electrode, a source electrode and a drain electrode. The gate electrode, the source electrode and the drain electrode are connected electrically to a scan line, a data line and the pixel electrode respectively. A portion of the pixel electrode is located above the scan line. Next, a repairing portion is formed at the space between the scan line and the pixel electrode. The repairing portion is utilized to electrically connect the pixel electrode and the scan line.

Abstract: An image sensor has a plurality of pixels each with a photoelectric conversion element and a detection transistor the threshold voltage of which fluctuates in accordance with electrical charge generated in the photoelectric conversion element. The image sensor includes a second conductivity type shield region and a first conductivity type photoelectric conversion region; a first conductivity type well region linked to the photoelectric conversion region; a ring-like gate electrode; a second conductivity type source region at the inside of the ring-like gate electrode; a second conductivity type drain region. The image sensor further includes a potential pocket region that is formed in the well region below the ring-like gate electrode and accumulates the electrical charge, wherein the width of the gate electrode is formed narrower in the part adjacent to the photoelectric conversion region than in other parts.

Abstract: There is disclosed a method of fabricating a thin-film transistor having excellent characteristics. Nickel element is held in contact with selected regions of an amorphous silicon film. Then, thermal processing is performed to crystallize the amorphous film. Subsequently, thermal processing is carried out in an oxidizing ambient containing a halogen element to form a thermal oxide film. At this time, the crystallinity is improved. Also, gettering of the nickel element proceeds. This crystalline silicon film consists of crystals grown radially from a number of points. Consequently, the thin-film transistor having excellent characteristics can be obtained.

Abstract: A display device includes a first pixel and a second pixel. The first pixel and the second pixel are defined by a first gate bus line, a second gate bus line, a first power supply line and a second power supply line. A data bus line between the first supply line and the second supply line divides the first pixel from the second pixel line. Accordingly, the pixel shares a data bus line or a power supply line with adjacent pixel. Advantageously, thereby, more space between lines prevents defects caused during fabricating the display device and improve a reliability of the display device.

Abstract: An image sensor includes a photoelectric conversion section in a semiconductor substrate, the photoelectric conversion section having a capping layer of a first conductivity type and a photodiode of a second conductivity type below the capping layer, the photodiode having an upper surface deeper than about 1 ?m, as measured from an upper surface of the semiconductor substrate, a charge detection section receiving charges stored in the photoelectric conversion through a charge transfer section and converting the received charges into respective electrical signals, a voltage application section adapted to apply voltage to the capping layer and to a lower portion of the semiconductor substrate to control a width of a depletion layer on the photodiode, and a signal operation section adapted to generate red, green, and blue, signals according to signals from the charge detection section.

Abstract: A repairable pixel structure includes a substrate, at least a data line, at least a gate line, a transparent pixel electrode, a TFT, and a transparent pre-repair electrode. The TFT includes a gate, a drain, and a source. The transparent pre-repair electrode is disposed corresponding to the electrode in a vertical direction and is electrically connected to the drain. When a broken circuit occurs in the pixel structure, a laser beam is provided to perform a welding process on the transparent pre-repair electrode for repairing the pixel structure.

Abstract: A display device includes a display panel, first and second gate drivers and a data driver. The display panel includes pixel regions respectively having first, second and third pixels. The first pixel is coupled to first, second gate lines and a data line. The second gate line is adjacent to the first gate line. The second pixel is coupled to the first gate line and a first data line. The third pixel is coupled to the first gate line and a second data line. The first gate driver provides the first gate line with a first gate driving signal, and the second gate driver provides the second gate line with a second gate driving signal. The data driver provides first and second data lines with image signal. The display quality of the display device may be enhanced and the number of the data lines may be reduced.

Abstract: A thin film transistors (TFTs) substrate is structured to maintain as constant across the area of the substrate a kickback voltage due to Miller capacitance between the drain and gate of each TFT even in the presence of manufacturing induced misalignments between the drain electrodes and corresponding gate lines. Each thin film transistor includes a gate electrode, an active layer formed on the gate electrode so as to overlap the gate electrode, first and second source electrodes respectively connected to first and second data lines each of which crosses the gate line while being insulated from the gate line, and an elongated drain electrode located between the first and second source electrodes and disposed over the gate electrode so as to a crossing length of the drain electrode is larger than an underlying width of the gate electrode such that misalignment induced shifts of the position of the gate electrode relative to the drain electrode does not substantially change overlap area between the two.

Abstract: The reduction in size, noise and voltage is realized in a MOS solid-state imaging device. A gate electrode in a pixel part is formed in a two-level structure. An amplifier gate of an amplifier transistor is formed in the first level while a select gate of a select transistor is formed in the second level. The both are structurally partly overlapped. With the first-level amplifier gate as self-alignment, ions are implanted for a select gate in the second level. Although the gate electrode if formed in one level as in the conventional requires a space of nearly a design rule between the amplifier gate and the select gate, the structure of the invention can eliminate such a dead space. Meanwhile, because the diffusion layer does not exist between the amplifier gate and the select gate, the diffusion layer is eliminated of sheet resistance and voltage drop.

Abstract: In view of the problem that a reduced thickness of an EL film causes a short circuit between an anode and a cathode and malfunction of a transistor, the invention provides a display device that has a light emitting element including an electrode and an electroluminescent layer, a wire electrically connected to the electrode of the light emitting element, a transistor provided with an active layer including a source, a drain and a channel forming region, and a power supply line electrically connected to one of the source and the drain of the transistor, wherein the wire is electrically connected to the other of the source and the drain of the transistor, and the width of a part of the electrode in the vicinity of a portion where the electrode is electrically connected to the wire is smaller than that of the electrode in the other portion.

Abstract: An object of the present invention is to prevent a sensitivity difference between pixels. There are disposed plural unit cells each including plural photodiodes 101A and 101B, plural transfer MOSFETs 102A and 102B arranged corresponding to the plural photodiodes, respectively, and a common MOSFET 104 which amplifies and outputs signals read from the plural photodiodes. Each pair within the unit cell, composed of the photodiode and the transfer MOSFET provided corresponding to the photodiode, has translational symmetry with respect to one another. Within the unit cell, there are included a reset MOSFET and selecting MOSFET.

Abstract: An image sensor can include a gate insulation layer, a gate electrode, a photodiode, and a floating diffusion region. The gate insulation layer can be formed on and/or over a semiconductor substrate for a transfer transistor. The gate insulation layer includes a first gate insulation layer having a central opening and a second gate insulation layer formed on and/or over an uppermost surface of the first gate insulation layer including the opening. The gate electrode can be formed on and/or over the gate insulation layer. The photodiode can be formed in the semiconductor substrate at one side of the gate electrode so as to generate an optical charge. The floating diffusion region can be formed in the semiconductor at the other side of the gate electrode opposite to the photodiode. The floating diffusion region can be electrically connected to the photodiode through a channel so as to store the optical charge generated from the photodiode.

Abstract: A well region of a first conductivity type located in a substrate of the first conductivity type and below about half the channel length of an electrically active portion of a transistor gate is disclosed. The well region is laterally displaced from a charge collection region of a second conductivity type of a pinned photodiode.

Abstract: A method for manufacturing a CMOS image sensor that independently forms a poly routing line connected to a gate poly of a reset transistor is provided. In an embodiment, a semiconductor substrate is prepared defining a device isolation region and an active region. Subsequently, a plurality of gate polys are formed on a predetermined portion of the active region. A photodiode is formed in a portion of the semiconductor substrate located at one side of one of the plurality of gate polys. After an oxide layer is deposited on the semiconductor substrate including the gate polys, the oxide layer is selectively removed to form oxide layer patterns for exposing a portion of the plurality of gate polys. After a polysilicon layer is deposited on the oxide layer pattern, the polysilicon layer is selectively removed to form a routing line connected to the portion of the plurality of gate polys.

Abstract: An imager having a photodiode with a shallow doping profile with respect to the top surface of a substrate is disclosed. An imager with a graded pinned surface layer, self-aligned to a gate stack is provided. A photodiode with a shallow doping profile with respect to the top surface of a substrate and a graded pinned surface layer, self-aligned to a gate stack is provided. These photodiodes exhibit reduced image lag, transfer gate leakage, and photodiode dark current generation.

Abstract: An imager pixel utilizing a silicon-on-insulator substrate, a photodiode in said substrate below the buried oxide, and a dual contact to said photodiode and methods of forming said imager pixel. The photodiode has an increased fill factor due to its increased size relative to the pixel.

Abstract: An image sensor and a manufacturing method thereof are provided. The image sensor includes a plurality of sensors, an inter-layer dielectric layer formed over the sensors, a first inter-metal dielectric layer formed over the inter-layer dielectric layer, and a plurality of first via walls formed in the first inter-metal dielectric layer, wherein each of the first via walls is formed around each of the sensors. In addition, the image sensor further includes a second inter-metal dielectric layer formed over the first inter-metal dielectric layer and a plurality of second via walls formed in the second inter-metal dielectric layer, wherein each of the second via walls is formed around each of the sensors. Therefore, the light leakage between different pixels and the problem of crosstalk are solved, and the spatial resolution and the photo sensitivity of the image sensor are enhanced.

Abstract: Methods and apparatuses are disclosed which provide imager devices having a light blocking material layer formed over peripheral circuitry outside a pixel cell array.

Abstract: The present invention relates to light emitting diode (LED) packages and methods of manufacturing the same, and more particularly, to an LED package and a method of manufacturing the same that can reduce a variation of color coordinates of mass-produced LED packages.

Abstract: A thin film transistor has a semiconductor thin film including zinc oxide, a protection film formed on entirely the upper surface of the semiconductor thin film, a gate insulating film formed on the protection film, a gate electrode formed on the gate insulating film above the semiconductor thin film, and a source electrode and drain electrode formed under the semiconductor thin film so as to be electrically connected to the semiconductor thin film.

Abstract: A thin film transistor array includes a substrate, scan lines, data lines, thin film transistors, upper electrodes and pixel electrodes. The scan lines and the data lines are disposed on the substrate to define pixel areas on the substrate. The thin film transistors are disposed inside corresponding pixel areas and are driven through corresponding scan line and data lines. The upper electrodes are disposed within various pixel areas above the scan lines. The upper electrode has a protrusion protruding beyond the edge of a corresponding scan line. The pixel electrode is disposed within a corresponding pixel area and electrically connected to a corresponding thin film transistor and upper electrode, wherein each pixel electrode has at least a slit formed therein, the slit has an end portion near the corresponding scan line, and the end portion is completely shielded by the protrusion of the corresponding upper electrode.

Abstract: A method of forming a micro pattern in a semiconductor device is disclosed. An oxide film mask is divided into a cell oxide film mask and a peri oxide film mask. Therefore, a connection between the cell and the peri region can be facilitated. A portion of a top surface of a first oxide film pattern between a region in which a word line will be formed and a region in which a select source line will be formed is removed. Accordingly, the space can be increased and program disturbance in the region in which the word line will be formed can be prevented. Furthermore, a pattern having a line of 50 nm and a space of 100 nm or a pattern having a line of 100 nm and a space of 50 nm, which exceeds the limitation of the ArF exposure equipment, can be formed using a pattern, which has a line of 100 nm and a space of 200 nm and therefore has a good process margin and a good critical dimension regularity.

Abstract: A CMOS image sensor and a method of fabricating the same are provided. In the CMOS image sensor, a device isolation layer is formed in a substrate to define an active region, and a photodiode is formed in the active region. A floating diffusion region is formed at a position spaced apart from the photodiode, and first and second gates are overlapped with one end of the photodiode and one end of the floating diffusion region, respectively. A third gate is disposed between the first gate and the second gate and overlapped with an upper portion of the device isolation layer and a predetermined portion of the floating diffusion region. An insulating layer is formed on the resulting structure where the third gate is formed. A buried contact has a first contact and a second contact, which are sequentially stacked to pass through the insulating layer and the third gate and to connect the third gate to the floating diffusion region disposed under the third gate.

Abstract: A thin film transistor array panel is provided, which includes a substrate; a gate line formed on the substrate and including a gate electrode; a gate insulating layer formed on the gate line; a semiconductor layer formed on the gate insulating layer; a plurality of ohmic contacts formed on the semiconductor layer; source and drain electrodes formed on the ohmic contacts; a passivation layer formed on the source and the drain electrodes and having a first contact hole exposing a portion of the drain electrode and an opening exposing a first portion of the semiconductor layer and having edges that coincide with edges of the source and the drain electrodes; and a pixel electrode formed on the passivation layer and contacting the drain electrode through the first contact hole.

Abstract: A thin film transistor has a semiconductor thin film including zinc oxide, a protection film formed on entirely the upper surface of the semiconductor thin film, a gate insulating film formed on the protection film, a gate electrode formed on the gate insulating film above the semiconductor thin film, and a source electrode and drain electrode formed under the semiconductor thin film so as to be electrically connected to the semiconductor thin film.

Abstract: A manufacturing method of a display device having TFTs capable of high-speed operation with few variations of threshold voltage is provided, in which materials are used with high efficiency and a small number of photomasks is required.

Abstract: The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.

Abstract: An active pixel sensor is proposed by the invention. The position of the gate of the reset transistor is kept away from the interface of the isolation region and the silicon so that the depletion region does not reach the isolation. Accordingly, dark currents caused by isolation region damages can be avoided.

Abstract: An active matrix display device having a pixel structure in which pixel electrodes, gate wirings and source wirings are suitably arranged in the pixel portions to realize a high numerical aperture without increasing the number of masks or the number of steps. The device comprises a gate electrode and a source wiring on an insulating surface, a first insulating layer on the gate electrode and on the source wiring, a semiconductor layer on the first insulating film, a second insulating layer on the semiconductor film, a gate wiring connected to the gate electrode on the second insulating layer, a connection electrode for connecting the source wiring and the semiconductor layer together, and a pixel electrode connected to the semiconductor layer.

Abstract: Methods of fabricating a microlens and/or array of microlenses used to focus light on photosensors, by forming a protective coating over a microlenses precursor material, and etching the protective coating and microlens precursor material to obtain a predetermined shape.

Abstract: It is provided a contacting method when a plurality of films to be peeled are laminating. Reduction of total layout area, miniaturization of a module, weight reduction, thinning, narrowing a frame of a display device, or the like can be realized by sequentially laminating a plurality of films to be peeled which are once separately formed over a plastic film or the like. Moreover, reliable contact having high degree of freedom is realized by forming each layer having a connection face of a conductive material and by patterning with the use of a photomask having the same pattern.

Abstract: Disclosed are a CMOS image sensor and a manufacturing method thereof.

Abstract: The invention describes in detail the structure of a CMOS image sensor pixel that senses color of impinging light without having absorbing filters placed on its surface. The color sensing is accomplished by having a vertical stack of three-charge detection nodes placed in the silicon bulk, which collect electrons depending on the depth of their generation. The small charge detection node capacitance and thus high sensitivity with low noise is achieved by using fully depleted, potential well forming, buried layers instead of undepleted junction electrodes. Two embodiments of contacting the buried layers without substantially increasing the node capacitances are presented.

Abstract: A method for fabricating a complementary metal-oxide semiconductor (CMOS) image sensor includes performing an ion implantation process onto a photodiode region in a first conductivity type semiconductor layer to form a second conductivity type first impurity region, and performing an annealing process in a gas atmosphere including first conductivity type impurity atoms to form a first conductivity type second impurity region underneath a surface of the first conductivity type semiconductor layer in the second conductivity type first impurity region, wherein the first conductivity type second impurity region is doped with the diffused first conductivity impurity atoms.

Abstract: The invention provides a flat panel display having an insulating substrate; a data line formed on the insulating substrate; an interlayer insulating film formed on the data line having a first contact opening exposing the data line; a connecting member formed in a part of the first contact opening; an interlayer insulating film around the first contact opening; a gate insulating film formed on the connecting member having a second contact opening exposing the connecting member; and an organic semiconductor layer formed on the gate insulating film.

Abstract: The present invention relates to a complementary metal oxide semiconductor (CMOS) image sensor. Particularly, a unit pixel of the complementary metal oxide semiconductor (CMOS) image sensor, wherein the unit pixel has a rectangular shape and is defined with the top region and the bottom region of which area is larger than that of the top region, the unit pixel including: a photodiode region disposed in entire areas of a bottom region of the unit pixel; a reset gate, a drive gate and a selection gate disposed in an upper part of a top region of the unit pixel; a multi-floating diffusion region disposed with a uniform size at least at two corners of the photodiode region; and a transfer gate disposed in an upper part of the photodiode region to thereby define the multi-floating diffusion region.

Abstract: The invention provides an LCD panel with main slits corresponding to alignment protrusions. The gate lines are shielded by the electrode portion and do not overlap the main slits. Because the gate line and the major slits do not overlap, the liquid crystal molecule arrangement of the liquid crystal layer is not affected by the operating voltage of the gate line.

Abstract: An optical sensor is disclosed. Each sensor pixel circuit of the optical sensor includes a first readout TFT for reading out voltage of a charge node, a second readout TFT for controllably resetting the charge node to a first reset voltage, and a photo TFT for discharging the voltage at the charge node to a second reset voltage in absence of an object(s).

Abstract: A thin film array panel is provided, which includes: a gate line formed on a substrate; a first insulating layer formed on the gate line; a semiconductor layer formed on the gate insulating layer; a data line formed on the gate insulating layer and intersecting the gate line; a drain electrode formed at least on the semiconductor layer; a conductor arranged in parallel to the data line; a second insulating layer formed on the data line, the drain electrode, and the conductor and having a first contact hole exposing a portion of the drain electrode; and a pixel electrode formed on the second insulating layer, connected to the drain electrode through the first contact hole, fully covering the data line.

Abstract: A novel pixel sensor structure formed on a substrate of a first conductivity type includes a photosensitive device of a second conductivity type and a surface pinning layer of the first conductivity type. A trench isolation structure is formed adjacent to the photosensitive device pinning layer. The trench isolation structure includes a dopant region comprising material of the first conductivity type selectively formed along a sidewall of the isolation structure that is adapted to electrically couple the surface pinning layer to the underlying substrate. The corresponding method for forming the dopant region selectively formed along the sidewall of the isolation structure comprises an out-diffusion process whereby dopant materials present in a doped material layer formed along selected portions in the trench are driven into the underlying substrate during an anneal.