Abstract: A photoelectric conversion apparatus includes a semiconductor layer including a photoelectric conversion portion, a charge holding portion configured to hold electric charge generated from the photoelectric conversion portion, and a charge detection portion to which the electric charge held by the charge holding portion is transferred. A gate electrode of a transistor and a light shielding film including a first portion covering the charge holding portion and a second portion covering an upper surface of the gate electrode are disposed above the semiconductor layer. The distance between the second portion of the light shielding film and the upper surface of the gate electrode is greater than the distance between the first portion of the light shielding film and the semiconductor layer.

Abstract: The effective photosensitive area of a solid-state photosensor is controlled with a multitude of electrodes (E1, . . . , Ei, . . . , En) on top of an insulator layer (O) covering a semiconductor substrate (S). Photogenerated charge carriers move laterally under the influence of the voltage distribution on the various electrodes (E1, . . . , Ei, . . . , En), and they are collected at the two ends of the photosensor in diffusions (D1, D2). The voltage distribution on the electrodes (E1, . . . , Ei, . . . , En) is such that the voltage at the two furthermost electrodes (E1, En) is maximum (if photoelectrons are collected), minimum at an interior electrode (Ei), and monotonously decreasing in between. The lateral position of the electrode (Ei) with minimum voltage defines the effective photosensitive area of the photosensor.

Abstract: This invention provides a type of solid-state image pickup device characterized by the fact that for a solid-state image pickup device with a broad dynamic range, it is possible to suppress the dark current than photoelectrons overflowing from the photodiode, as well as its driving method. Plural pixels are integrated in an array configuration on a semiconductor substrate. Each pixel has the following parts: photodiode (CPD), transfer transistor (?T), floating diffusion (CFD), accumulating capacitive element (CS), accumulating transistor (?S), and a reset transistor. During the accumulating period of photoelectric charge, voltage (?) over that applied on the semiconductor substrate, or ?0.6 V or lower than the voltage applied on the semiconductor substrate, is applied as an OFF potential on the gate electrode of at least one transfer transistor, the accumulating transistor and the reset transistor.

Abstract: In a method for forming a lens according to the present invention, a digging step of digging a depression includes a depositing substep of depositing a pattern film on a surface of a base film, the pattern film being made of a second material and in an inverted shape of the depression, a forming substep of forming an embedding film to flatten the surface of the pattern film, the embedding film being made of a third material and embedding therein the pattern film, and an etch-back substep of conducting etch-back on a surface of the embedding film toward the base film to dig the depression, and an etch rate of the second material is higher than an etch rate of the third material.

Abstract: An HCCD includes a channel 21 that transfers electric charges in an X direction, a channel 25 that transfers the electric charges in a Z1 direction, a channel 23 that transfers the electric charges in a Z2 direction, and a channel 22 that connects the channels 23, 25 to the channel 21. The following relation is satisfied in impurity concentration of the channels: channel 21 channel 22 channel 23, 25. A fixed DC voltage is applied to branch electrodes 12a, 12b above the channel 22. The channel 22 has protrusion portions 19 that protrude inward from an outer circumference, which connects T1 and T2, and an outer circumference, which connects T3 and T4. The protrusion portions 19 causes charges below the transfer electrode 11b to move near the center of the channel 22 in a Y direction. Thereby, the travel distance of the charges in the channel 22 is reduced.

Abstract: A solid-state imaging device is provided. The imaging device includes an imaging portion which includes light receiving portions and vertical transfer registers, a horizontal transfer portion, an output part for outputting an electrical signal converted from electric charges transferred from the horizontal transfer portion, a first reference potential applying means, and a second reference potential applying means. The imaging portion, the horizontal transfer portion and the output part are formed in a first conductivity type semiconductor substrate having a second conductivity type region, and a reference potential is applied to the second conductivity type semiconductor region. The first reference potential applying means applies a reference potential to the second conductivity type semiconductor region corresponding to an area where the output part is formed.

Abstract: A frame shutter type device provides a separated well in which the storage node is located. The storage node is also shielded by a light shield to prevent photoelectric conversion.

Abstract: When capacity coupling between an output gate electrode (OG) and a last-stage transfer electrode is large at an output end of a CCD shift register, an electric potential of the OG is varied according to transfer clocks with the result that noise is liable to generate in an output signal. As measures for this, convex portions projecting horizontally are formed in those positions of the last-stage transfer electrode and the OG, which correspond to a channel region, and overlap between the both electrodes is caused only on the portions. A clearance is formed between the OG and the transfer electrode except those locations, in which the convex portions are provided. In particular, in that location, in which the OG and the transfer electrode, respectively, are extended relatively lengthily toward wirings, the both electrodes do not overlap each other. In this manner, capacity coupling between the both electrodes is reduced.

Abstract: An image sensor system using offset analog to digital converters. The analog to digital converters require a plurality of clock cycles to carry out the actual conversion. These conversions are offset in time from one another, so that at each clock cycle, new data is available. A CMOS image sensor converts successive analog signals, representing at least a portion of an image, into successive digital signals using an analog to digital circuit block. Multiple clock cycles may be used by the circuit block to fully convert an analog signal into a corresponding digital signal. The conversion of one analog signal into a corresponding digital signal by the circuit block may be offset in time and partially overlapping with the conversion of a successive analog signal into its corresponding successive digital signal by the circuit block.