Of Charge Coupled Devices (epo) Patents (Class 257/E29.058)
  • Patent number: 8952432
    Abstract: Disclosed herein is a solid-state imaging device including a photoelectric conversion element operable to generate electric charge according to the amount of incident light and to accumulate the electric charge in the inside thereof, an electric-charge holding region in which the electric charge generated through photoelectric conversion by the photoelectric conversion element is held until read out, and a transfer gate having a complete transfer path through which the electric charge accumulated in the photoelectric conversion element is completely transferred into the electric-charge holding region, and an intermediate transfer path through which the electric charge generated by the photoelectric conversion element during an exposure period and being in excess of a predetermined charge amount is transferred into the electric-charge holding region. The complete transfer path and the intermediate transfer path are formed in different regions.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: February 10, 2015
    Assignee: Sony Corporation
    Inventors: Yusuke Oike, Takahiro Kawamura, Shinya Yamakawa, Ikuhiro Yamamura, Takashi Machida, Yasunori Sogoh, Naoki Saka
  • Patent number: 7663175
    Abstract: A semiconductor integrated circuit device provided with a plurality of power supply wire layers including a first potential power supply wire and a second potential power supply wire formed in different layers. At least one capacitor contact wire extends from one of the first and second potential power supply wires toward the other one of the first and second potential power supply wires so as to form a capacitor between each capacitor contact wire and its surrounding wires.
    Type: Grant
    Filed: May 30, 2006
    Date of Patent: February 16, 2010
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Kazufumi Komura, Takayoshi Nakamura, Keiichi Fujimura, Masahito Hirose, Keigo Nakashima, Masaki Nagato
  • Patent number: 7557390
    Abstract: A solid image capturing element comprising a plurality of vertical shift registers arranged to each correspond to a column of a plurality of light receiving pixels in a matrix arrangement, a horizontal shift register provided on an output side of the plurality of vertical shift registers, and an output section provided on an output side of the horizontal shift register. In this solid image capturing element, a reverse conductive semiconductor region is formed over one major surface of one conductive semiconductor substrate, the plurality of light receiving pixels, the plurality of vertical shift registers, the horizontal shift register, and the output section are formed in the semiconductor region, and a portion of the semiconductor region where the output section is formed has a higher dopant concentration than the portion of the semiconductor region where the horizontal shift register is formed.
    Type: Grant
    Filed: October 17, 2003
    Date of Patent: July 7, 2009
    Assignee: Sanyo Electric co., Ltd.
    Inventors: Yoshihiro Okada, Yuzo Otsuru